TS912, TS912A, TS912B
Rail-to-rail CMOS dual operational amplifier
Datasheet − production data
Features
■
Rail-to-rail input and output voltage ranges
■
Single (or dual) supply operation
from 2.7 to 16 V
■
Extremely low input bias current: 1 pA typ.
■
Low input offset voltage: 2 mV max.
■
Specified for 600 Ω and 100 Ω loads
■
Low supply current: 200 μA/amplifier
(VCC = 3 V)
■
Latch-up immunity
■
ESD tolerance: 3 kV
■
Spice macromodel included in this specification
D
SO-8
(plastic micropackage)
Related products
■
N
DIP8
(plastic package)
Pin connections (top view)
See TS56x series for better accuracy and
smaller packages
Description
The TS912 device is a rail-to-rail CMOS dual
operational amplifier designed to operate with
a single or dual supply voltage.
The input voltage range Vicm includes the two
supply rails VCC+ and VCC-.
The output reaches VCC- +30 mV, VCC+ -40 mV,
with RL = 10 kΩ and VCC- +300 mV,
VCC+ -400 mV, with RL = 600 Ω .
This product offers a broad supply voltage
operating range from 2.7 to 16 V and a supply
current of only 200 μA/amp. (VCC = 3 V).
Source and sink output current capability is
typically 40 mA (at VCC = 3 V), fixed by an internal
limitation circuit.
November 2012
This is information on a product in full production.
Doc ID 2325 Rev 7
1/21
www.st.com
21
Contents
TS912, TS912A, TS912B
Contents
1
Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 3
2
Schematic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4
Macromodel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5
4.1
Important note concerning this macromodel . . . . . . . . . . . . . . . . . . . . . . 13
4.2
Macromodel code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.1
DIP8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.2
SO-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
7
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2/21
Doc ID 2325 Rev 7
TS912, TS912A, TS912B
Absolute maximum ratings and operating conditions
1
Absolute maximum ratings and operating conditions
Table 1.
Absolute maximum ratings
Symbol
VCC
Vid
Parameter
Supply voltage(1)
Differential input voltage
(2)
(3)
Value
Unit
18
V
±18
V
-0.3 to 18
V
Vi
Input voltage
Iin
Current on inputs
±50
mA
Io
Current on outputs
±130
mA
-65 to +150
°C
Maximum junction temperature
150
°C
Rthja
Thermal resistance junction-to-ambient(4)
DIP8
SO-8
85
125
°C/W
Rthjc
Thermal resistance junction to case(4)
DIP8
SO-8
41
40
°C/W
HBM: human body model(5)
3
kV
200
V
1500
V
Tstg
Tj
ESD
Storage temperature
MM: machine
model(6)
CDM: charged device model(7)
1. All voltage values, except differential voltage are with respect to network ground terminal.
2. Differential voltages are non-inverting input terminal with respect to the inverting input terminal.
3. The magnitude of input and output voltages must never exceed VCC+ +0.3 V.
4. Short-circuits can cause excessive heating. Destructive dissipation can result from simultaneous short-circuits on all
amplifiers. These values are typical.
5. Human body model: a 100 pF capacitor is charged to the specified voltage, then discharged through a 1.5 kΩ resistor
between two pins of the device. This is done for all couples of connected pin combinations while the other pins are floating.
6. Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the
device with no external series resistor (internal resistor < 5 Ω). This is done for all couples of connected pin combinations
while the other pins are floating.
7. Charged device model: all pins and the package are charged together to the specified voltage and then discharged directly
to ground through only one pin. This is done for all pins.
Table 2.
Operating conditions
Symbol
Parameter
VCC
Supply voltage
Vicm
Common mode input voltage range
Toper
Operating free air temperature range
Doc ID 2325 Rev 7
Value
Unit
2.7 to 16
V
VCC--0.2 to VCC++0.2
V
-40 to + 125
°C
3/21
Schematic diagram
TS912, TS912A, TS912B
2
Schematic diagram
Figure 1.
Schematic diagram (1/2 TS912)
input
input
4/21
Doc ID 2325 Rev 7
TS912, TS912A, TS912B
Electrical characteristics
3
Electrical characteristics
Table 3.
VCC+ = 3 V, VCC- = 0 V, RL, CL connected to VCC/2, Tamb = 25 °C
(unless otherwise specified)
Symbol
Vio
ΔVio
Parameter
Min.
Typ.
Input offset voltage (Vic = Vo = VCC/2)
TS912
TS912A
TS912B
Tmin ≤ Tamb ≤ Tmax
TS912
TS912A
TS912B
Max.
10
5
2
Unit
mV
12
7
3
Input offset voltage drift
μV/°C
5
current(1)
Iio
Input offset
Tmin ≤ Tamb ≤ Tmax
1
100
200
pA
Iib
Input bias current(1)
Tmin ≤ Tamb ≤ Tmax
1
150
300
pA
ICC
Supply current (per amplifier, AVCL = 1, no load)
Tmin ≤ Tamb ≤ Tmax
200
300
400
μA
CMR
Common mode rejection ratio
Vic = 0 to 3 V, Vo = 1.5 V
SVR
Supply voltage rejection ratio (VCC+ = 2.7 to 3.3 V, Vo = VCC/2)
Avd
Large signal voltage gain (RL = 10 kΩ, Vo = 1.2 V to 1.8 V)
Tmin ≤ Tamb ≤ Tmax
VOH
High level output voltage (Vid = 1 V)
RL = 100 kΩ
RL = 10 kΩ
RL = 600 Ω
RL = 100 Ω
Tmin ≤ Tamb ≤ Tmax
RL = 10 kΩ
RL = 600 Ω
VOL
Io
GBP
70
dB
50
80
dB
3
2
10
2.95
2.9
2.3
V/mV
2.96
2.6
2
V
2.8
2.1
Low level output voltage (Vid = -1 V)
RL = 100 kΩ
RL = 10 kΩ
RL = 600 Ω
RL = 100 Ω
Tmin ≤ Tamb ≤ Tmax
RL = 10 kΩ
RL = 600 Ω
30
300
900
50
70
400
mV
100
600
Output short-circuit current (Vid = ±1 V)
Source (Vo = VCC-)
Sink (Vo = VCC+)
Gain bandwidth product
(AVCL = 100, RL = 10 kΩ, CL = 100 pF, f = 100 kHz)
Doc ID 2325 Rev 7
20
20
40
40
mA
0.8
MHz
5/21
Electrical characteristics
Table 3.
TS912, TS912A, TS912B
VCC+ = 3 V, VCC- = 0 V, RL, CL connected to VCC/2, Tamb = 25 °C
(unless otherwise specified) (continued)
Symbol
Parameter
Min.
Typ.
Max.
Unit
+
Slew rate (AVCL = 1, RL = 10 kΩ, C L = 100 pF, Vi = 1.3 V to 1.7 V)
0.4
V/μs
SR-
Slew rate (AVCL = 1, RL = 10 kΩ, C L = 100 pF, Vi = 1.3 V to 1.7 V)
0.3
V/μs
φm
Phase margin
30
Degrees
en
Equivalent input noise voltage (R s = 100 Ω, f = 1 kHz)
30
nV/√Hz
SR
1. Maximum values include unavoidable inaccuracies of the industrial tests.
6/21
Doc ID 2325 Rev 7
TS912, TS912A, TS912B
Table 4.
VCC+ = 5 V, VCC- = 0 V, RL, CL connected to VCC/2, Tamb = 25 °C
(unless otherwise specified)
Symbol
Vio
ΔVio
Electrical characteristics
Parameter
Min.
Typ.
Input offset voltage (Vic = Vo = VCC/2)
TS912
TS912A
TS912B
Tmin ≤ Tamb ≤ Tmax
TS912
TS912A
TS912B
Max.
10
5
2
Unit
mV
12
7
3
Input offset voltage drift
μV/°C
5
current(1)
Iio
Input offset
Tmin ≤ Tamb ≤ Tmax
1
100
200
pA
Iib
Input bias current(1)
Tmin ≤ Tamb ≤ Tmax
1
150
300
pA
ICC
Supply current (per amplifier, AVCL = 1, no load)
Tmin ≤ Tamb ≤ Tmax
230
350
450
μA
CMR
Common mode rejection ratio
Vic = 1.5 to 3.5 V, Vo = 2.5 V
60
85
dB
SVR
Supply voltage rejection ratio (VCC+ = 3 to 5 V, Vo = VCC/2)
55
80
dB
Avd
Large signal voltage gain (RL = 10 kΩ, Vo = 1.5 V to 3.5 V)
Tmin ≤ Tamb ≤ Tmax
10
7
40
VOH
High level output voltage (Vid = 1 V)
RL = 100 kΩ
RL = 10 kΩ
RL = 600 Ω
RL = 100 Ω
Tmin ≤ Tamb ≤ Tmax
RL = 10 kΩ
RL = 600 Ω
VOL
Io
4.95
4.9
4.25
V/mV
4.95
4.55
3.7
V
4.8
4.1
Low level output voltage (Vid = -1 V)
RL = 100 kΩ
RL = 10 kΩ
RL = 600 Ω
RL = 100 Ω
Tmin ≤ Tamb ≤ Tmax
RL = 10 kΩ
RL = 600 Ω
Output short-circuit current (Vid = ±1 V)
Source (Vo = VCC-)
Sink (Vo = VCC+)
40
350
1400
50
100
500
mV
150
750
45
45
65
65
mA
1
MHz
GBP
Gain bandwidth product
(AVCL = 100, R L = 10 kΩ, CL = 100 pF, f = 100 kHz)
SR+
Slew rate (AVCL = 1, RL = 10 kΩ, CL = 100 pF, Vi = 1 V to 4 V)
0.8
V/μs
SR-
Slew rate (AVCL = 1, RL = 10 kΩ, CL = 100 pF, Vi = 1 V to 4 V)
0.6
V/μs
Doc ID 2325 Rev 7
7/21
Electrical characteristics
Table 4.
VCC+ = 5 V, VCC- = 0 V, RL, CL connected to VCC/2, Tamb = 25 °C
(unless otherwise specified) (continued)
Symbol
en
VO1/VO2
φm
TS912, TS912A, TS912B
Parameter
Typ.
Max.
Unit
Equivalent input noise voltage (Rs = 100 Ω, f = 1 kHz)
30
nV/√Hz
Channel separation (f = 1 kHz)
120
dB
Phase margin
30
Degrees
1. Maximum values include unavoidable inaccuracies of the industrial tests.
8/21
Min.
Doc ID 2325 Rev 7
TS912, TS912A, TS912B
Table 5.
VCC+ = 10 V, VCC- = 0 V, RL, CL connected to VCC/2, Tamb = 25 °C
(unless otherwise specified)
Symbol
Vio
ΔVio
Electrical characteristics
Parameter
Min.
Typ.
Input offset voltage (Vic = Vo = VCC/2)
TS912
TS912A
TS912B
Tmin ≤ Tamb ≤ Tmax
TS912
TS912A
TS912B
Max.
10
5
2
Unit
mV
12
7
3
Input offset voltage drift
μV/°C
5
current(1)
Iio
Input offset
Tmin ≤ Tamb ≤ Tmax
1
100
200
pA
Iib
Input bias current(1)
Tmin ≤ Tamb ≤ Tmax
1
150
300
pA
ICC
Supply current (per amplifier, AVCL = 1, no load)
Tmin ≤ Tamb ≤ Tmax
400
600
700
μA
CMR
Common mode rejection ratio
Vic = 3 to 7 V, Vo = 5 V
Vic = 0 to 10 V, Vo = 5 V
60
50
90
75
dB
SVR
Supply voltage rejection ratio (VCC+ = 5 to 10 V, Vo = VCC/2)
60
90
dB
Avd
Large signal voltage gain (RL = 10 kΩ, Vo = 2.5 V to 7.5 V)
Tmin ≤ Tamb ≤ Tmax
15
10
50
VOH
High level output voltage (Vid = 1V)
RL = 100 kΩ
RL = 10 kΩ
RL = 600 Ω
RL = 100 Ω
Tmin ≤ Tamb ≤ Tmax
RL = 10 kΩ
RL = 600 Ω
VOL
Io
GBP
9.95
9.85
9
V/mV
9.95
9.35
7.8
V
9.8
8.8
Low level output voltage (Vid = -1 V)
RL = 100 kΩ
RL = 10 kΩ
RL = 600 Ω
RL = 100 Ω
Tmin ≤ Tamb ≤ Tmax
RL = 10 kΩ
RL = 600 Ω
50
650
2300
50
150
800
mV
150
900
Output short-circuit current (Vid = ±1 V)
Source (Vo = VCC-)
Sink (Vo = VCC+)
Gain bandwidth product
(AVCL = 100, RL = 10 kΩ, CL = 100 pF, f = 100 kHz)
Doc ID 2325 Rev 7
45
50
65
75
mA
1.4
MHz
9/21
Electrical characteristics
Table 5.
TS912, TS912A, TS912B
VCC+ = 10 V, VCC- = 0 V, RL, CL connected to VCC/2, Tamb = 25 °C
(unless otherwise specified) (continued)
Symbol
Parameter
Min.
Typ.
Max.
Unit
SR+
Slew rate
(AVCL = 1, RL = 10 kΩ, CL = 100 pF, Vi = 2.5 V to 7.5 V)
1.3
V/μs
SR-
Slew rate
(AVCL = 1, RL = 10 kΩ, CL = 100 pF, Vi = 2.5 V to 7.5 V)
0.8
V/μs
φm
Phase margin
40
Degrees
en
Equivalent input noise voltage (R s = 100 Ω, f = 1 kHz)
30
nV/√Hz
Total harmonic distortion
(AVCL = 1, RL = 10 kΩ, CL = 100 pF, Vo = 4.75 V to 5.25 V,
f = 1 kHz)
0.02
%
Input capacitance
1.5
pF
THD
Cin
1. Maximum values include unavoidable inaccuracies of the industrial tests.
10/21
Doc ID 2325 Rev 7
TS912, TS912A, TS912B
Supply current (each amplifier)
vs. supply voltage
Figure 3.
High level output voltage vs. high
level output current
(VCC = +5 V, VCC = +3 V)
Output voltage
Supply current
Figure 2.
Electrical characteristics
Output current
Supply voltage
Figure 5.
Temperature
Output current
Figure 7.
Low level output voltage vs. low
level output current
(VCC = 16 V, VCC = 10 V)
Output voltage
High level output voltage vs. high
level output current
(VCC = +16 V, VCC = +10 V)
Output voltage
Figure 6.
Input bias current vs. temperature
Input bias current
Low level output voltage vs. low
level output current
(VCC = +3 V, VCC = +5 V)
Output voltage
Figure 4.
Output current
Output current
Doc ID 2325 Rev 7
11/21
Electrical characteristics
Figure 8.
TS912, TS912A, TS912B
Gain and phase vs. frequency
(RL = 10 kΩ)
Figure 9.
Gain bandwidth product vs. supply
voltage (RL = 10 kΩ)
Gain
Gain bandw. prod.
Phase
Gain
Phase
Frequency
Supply voltage
Figure 10. Phase margin vs. supply voltage
(RL = 10 kΩ)
Figure 11. Gain and phase vs. frequency
(RL = 600 Ω)
Gain
Supply voltage
Phase
Phase margin
Gain
Phase
Frequency
Phase margin
Gain bandw. prod.
Figure 12. Gain bandwidth product vs. supply Figure 13. Phase margin vs. supply voltage
voltage (RL = 600 Ω)
(RL = 600 Ω)
Supply voltage
12/21
Supply voltage
Doc ID 2325 Rev 7
TS912, TS912A, TS912B
Macromodel
Figure 14. Input voltage noise vs. frequency
Frequency
4
Macromodel
4.1
Important note concerning this macromodel
●
All models are a trade-off between accuracy and complexity (i.e. simulation time).
●
Macromodels are not a substitute to breadboarding; rather, they confirm the validity of
a design approach and help to select surrounding component values.
●
A macromodel emulates the nominal performance of a typical device within specified
operating conditions (temperature, supply voltage, for example). Thus the
macromodel is often not as exhaustive as the datasheet, its purpose is to illustrate the
main parameters of the product.
Data derived from macromodels used outside of the specified conditions (VCC, temperature,
for example) or even worse, outside of the device operating conditions (VCC, Vicm, for
example), is not reliable in any way.
Doc ID 2325 Rev 7
13/21
Macromodel
4.2
TS912, TS912A, TS912B
Macromodel code
** Standard Linear Ics Macromodels, 1993.
** CONNECTIONS :
* 1 INVERTING INPUT
* 2 NON-INVERTING INPUT
* 3 OUTPUT
* 4 POSITIVE POWER SUPPLY
* 5 NEGATIVE POWER SUPPLY
.SUBCKT TS912 1 2 3 4 5
**********************************************************
.MODEL MDTH D IS=1E-8 KF=6.563355E-14 CJO=10F
* INPUT STAGE
CIP 2 5 1.500000E-12
CIN 1 5 1.500000E-12
EIP 10 5 2 5 1
EIN 16 5 1 5 1
RIP 10 11 6.500000E+00
RIN 15 16 6.500000E+00
RIS 11 15 7.655100E+00
DIP 11 12 MDTH 400E-12
DIN 15 14 MDTH 400E-12
VOFP 12 13 DC 0.000000E+00
VOFN 13 14 DC 0
IPOL 13 5 4.000000E-05
CPS 11 15 3.82E-08
DINN 17 13 MDTH 400E-12
VIN 17 5 -0.5000000e+00
DINR 15 18 MDTH 400E-12
VIP 4 18 -0.5000000E+00
FCP 4 5 VOFP 7.750000E+00
FCN 5 4 VOFN 7.750000E+00
* AMPLIFYING STAGE
FIP 5 19 VOFP 5.500000E+02
FIN 5 19 VOFN 5.500000E+02
RG1 19 5 5.087344E+05
RG2 19 4 5.087344E+05
CC 19 29 2.200000E-08
HZTP 30 29 VOFP 12.33E+02
HZTN 5 30 VOFN 12.33E+02
DOPM 19 22 MDTH 400E-12
DONM 21 19 MDTH 400E-12
HOPM 22 28 VOUT 3135
VIPM 28 4 150
HONM 21 27 VOUT 3135
VINM 5 27 150
EOUT 26 23 19 5 1
VOUT 23 5 0
ROUT 26 3 65
COUT 3 5 1.000000E-12
DOP 19 68 MDTH 400E-12
VOP 4 25 1.924
14/21
Doc ID 2325 Rev 7
TS912, TS912A, TS912B
Macromodel
HSCP 68 25 VSCP1 1E8
DON 69 19 MDTH 400E-12
VON 24 5 2.4419107
HSCN 24 69 VSCN1 1.5E8
VSCTHP 60 61 0.1375
DSCP1 61 63 MDTH 400E-12
VSCP1 63 64 0
ISCP 64 0 1.000000E-8
DSCP2 0 64 MDTH 400E-12
DSCN2 0 74 MDTH 400E-12
ISCN 74 0 1.000000E-8
VSCN1 73 74 0
DSCN1 71 73 MDTH 400E-12
VSCTHN 71 70 -0.75
ESCP 60 0 2 1 500
ESCN 70 0 2 1 -2000
.ENDS
Doc ID 2325 Rev 7
15/21
Package information
5
TS912, TS912A, TS912B
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com. ECOPACK
is an ST trademark.
16/21
Doc ID 2325 Rev 7
TS912, TS912A, TS912B
5.1
Package information
DIP8 package information
Figure 15. DIP8 package outline
Table 6.
DIP8 package mechanical data
Dimensions
Symbol
Millimeters
Min.
Typ.
A
Inches
Max.
Min.
Typ.
5.33
Max.
0.210
A1
0.38
0.015
A2
2.92
3.30
4.95
0.115
0.130
0.195
b
0.36
0.46
0.56
0.014
0.018
0.022
b2
1.14
1.52
1.78
0.045
0.060
0.070
c
0.20
0.25
0.36
0.008
0.010
0.014
D
9.02
9.27
10.16
0.355
0.365
0.400
E
7.62
7.87
8.26
0.300
0.310
0.325
E1
6.10
6.35
7.11
0.240
0.250
0.280
e
2.54
0.100
eA
7.62
0.300
eB
L
10.92
2.92
3.30
3.81
Doc ID 2325 Rev 7
0.430
0.115
0.130
0.150
17/21
Package information
5.2
TS912, TS912A, TS912B
SO-8 package information
Figure 16. SO-8 package outline
Table 7.
SO-8 package mechanical data
Dimensions
Symbol
Millimeters
Min.
Typ.
A
Max.
Min.
Typ.
1.75
0.25
Max.
0.069
A1
0.10
A2
1.25
b
0.28
0.48
0.011
0.019
c
0.17
0.23
0.007
0.010
D
4.80
4.90
5.00
0.189
0.193
0.197
E
5.80
6.00
6.20
0.228
0.236
0.244
E1
3.80
3.90
4.00
0.150
0.154
0.157
e
0.004
0.010
0.049
1.27
0.050
h
0.25
0.50
0.010
0.020
L
0.40
1.27
0.016
0.050
L1
k
ccc
18/21
Inches
1.04
0
0.040
8°
0.10
Doc ID 2325 Rev 7
1°
8°
0.004
TS912, TS912A, TS912B
6
Ordering information
Ordering information
Table 8.
Order codes
Part number
Temperature
range
Package
Packing
DIP8
Tube
Marking
TS912IN
TS912IN
TS912AIN
TS912AIN
TS912ID
TS912IDT
912I
TS912AID
TS912AIDT
912AI
SO-8
-40 °C, +125 °C
Tube or
tape and reel
TS912BID
TS912BIDT
TS912IYDT(1)
TS912AIYDT(1)
TS912BIYDT
912BI
912IY
SO-8
(automotive grade level)
(1)
912AIY
912BY
1. Qualified and characterized according to AEC Q100 and Q003 or equivalent, advanced screening
according to AEC Q001 and Q 002 or equivalent.
Doc ID 2325 Rev 7
19/21
Revision history
7
TS912, TS912A, TS912B
Revision history
Table 9.
Document revision history
Date
Revision
04-Dec-2001
1
First release.
31-Jul-2005
2
PPAP references inserted in the datasheet, see order codes table.
ESD protection inserted in AMR table.
03-Oct-2005
3
Some errors in the Order Codes table were corrected.
Reorganization of Section 4: Macromodel.
13-Feb- 2006
4
Parameters added in AMR table (Tj, ESD, Rthja, Rthjc).
16-Oct-2007
5
Corrected units and ESD footnotes in Table 1: Absolute maximum
ratings.
Corrected misalignments in electrical characteristics table.
Updated Section 4: Macromodel.
Added missing automotive grade order codes and footnote in
Table 8: Order codes.
Format update.
01-Feb-2010
6
Added TS912A and TS912B part numbers on cover page.
7
Updated Features (added Related products).
Updated Figure 3, Figure 4, Figure 6 to Figure 13 (added conditions
to differentiate them).
Removed TS912IYD, TS912AIYD, and TS912BIYD device from
Table 8.
Minor corrections throughout document.
06-Nov-2012
20/21
Changes
Doc ID 2325 Rev 7
TS912, TS912A, TS912B
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