TS912BID

TS912 Rail-to-rail CMOS dual operational amplifier Features ■ ■ ■ ■ ■ ■ ■ ■ ■ Rail-to-rail input and output voltage ranges Single (or dual) supply operation from 2.7V to 16V Extremely low input bias current: 1pA typ. Low input offset voltage: 2mV max. Specified for 600Ω and 100Ω loads Low supply current: 200μA/ampli (VCC = 3V) Latch-up immunity ESD tolerance: 3kV Spice macromodel included in this specification D SO-8 (Plastic micropackage) N DIP-8 (Plastic package) Description The TS912 is a rail-to-rail CMOS dual operational amplifier designed to operate with a single or dual supply voltage. The input voltage range Vicm includes the two supply rails VCC+ and VCC-. The output reaches: ■ ■ Pin connections (top view) Output 1 Inverting Input 1 Non-inverting Input 1 V CC 1 2 3 4 + + + 8V CC 7 Output 2 6 Inverting Input 2 5 Non-inverting Input 2 VCC- +30mV, VCC+ -40mV, with RL = 10kΩ VCC- +300mV, VCC+ -400mV, with RL = 600Ω This product offers a broad supply voltage operating range from 2.7V to 16V and supply current of only 200μA/amp (VCC = 3V). Source and sink output current capability is typically 40mA (at VCC = 3V), fixed by an internal limitation circuit. October 2007 Rev 5 1/18 www.st.com 18 Absolute maximum ratings and operating conditions TS912 1 Table 1. Symbol VCC Vid Vi Iin Io Tstg Tj Rthja Absolute maximum ratings and operating conditions Absolute maximum ratings Parameter Supply voltage (1) Differential input voltage Input voltage (3) (2) Value 18 ±18 -0.3 to 18 ±50 ±130 -65 to +150 150 85 125 41 40 3 200 1500 Unit V V V mA mA °C °C °C/W Current on inputs Current on outputs Storage temperature Maximum junction temperature Thermal resistance junction to ambient (4) DIP8 SO-8 Thermal resistance junction to case (4) DIP8 SO-8 HBM: human body model(5) Rthjc °C/W kV V V ESD MM: machine model(6) CDM: charged device model(7) 1. All voltage values, except differential voltage are with respect to network ground terminal. 2. Differential voltages are non-inverting input terminal with respect to the inverting input terminal. 3. The magnitude of input and output voltages must never exceed VCC+ +0.3V. 4. Short-circuits can cause excessive heating. Destructive dissipation can result from simultaneous short-circuits on all amplifiers. These values are typical. 5. Human body model: A 100pF capacitor is charged to the specified voltage, then discharged through a 1.5kΩ resistor between two pins of the device. This is done for all couples of connected pin combinations while the other pins are floating. 6. Machine model: A 200pF capacitor is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5Ω). This is done for all couples of connected pin combinations while the other pins are floating. 7. Charged device model: all pins and the package are charged together to the specified voltage and then discharged directly to the ground through only one pin. This is done for all pins. Table 2. Symbol VCC Vicm Toper Operating conditions Parameter Supply voltage Common mode input voltage range Operating free air temperature range - Value 2.7 to 16 VCC -0.2 to VCC +0.2 -40 to + 125 + Unit V V °C 2/18 TS912 Schematic diagram 2 Figure 1. Schematic diagram Schematic diagram (1/2 TS912) VCC Non-inverting Input Internal Vref Inverting Input Output VCC 3/18 Electrical characteristics TS912 3 Table 3. Symbol Electrical characteristics VCC+ = 3V, VCC- = 0V, RL, CL connected to VCC/2, Tamb = 25°C (unless otherwise specified) Parameter Input offset voltage (Vic = Vo = VCC/2) TS912 TS912A TS912B Tmin ≤ Tamb ≤ Tmax TS912 TS912A TS912B Input offset voltage drift Input offset current Tmin ≤ Tamb ≤ Tmax (1) Min. Typ. Max. Unit Vio 10 5 2 12 7 3 5 1 1 200 100 200 150 300 300 400 mV ΔVio Iio Iib ICC CMR SVR Avd μV/°C pA pA μA dB dB V/mV Input bias current (1) Tmin ≤ Tamb ≤ Tmax Supply current (per amplifier, AVCL = 1, no load) Tmin ≤ Tamb ≤ Tmax Common mode rejection ratio Vic = 0 to 3V, Vo = 1.5V Supply voltage rejection ratio (VCC+ = 2.7 to 3.3V, Vo = VCC/2) Large signal voltage gain (RL = 10kΩ Vo = 1.2V to 1.8V) , Tmin ≤ Tamb ≤ Tmax High level output voltage (Vid = 1V) RL = 100kΩ RL = 10kΩ RL = 600Ω RL = 100Ω Tmin ≤ Tamb ≤ Tmax RL = 10kΩ RL = 600Ω Low level output voltage (Vid = -1V) RL = 100kΩ RL = 10kΩ RL = 600Ω RL = 100Ω Tmin ≤ Tamb ≤ Tmax RL = 10kΩ RL = 600Ω Output short-circuit current (Vid = ±1V) Source (Vo = VCC-) Sink (Vo = VCC+) Gain bandwidth product , (AVCL = 100, RL = 10kΩ CL = 100pF, f = 100kHz) 20 20 50 3 2 70 80 10 VOH 2.95 2.9 2.3 2.96 2.6 2 V 2.8 2.1 VOL 30 300 900 50 70 400 mV 100 600 40 40 0.8 mA Io GBP MHz 4/18 TS912 Table 3. Symbol SR+ SRφm en Electrical characteristics VCC+ = 3V, VCC- = 0V, RL, CL connected to VCC/2, Tamb = 25°C (unless otherwise specified) (continued) Parameter Slew rate , (AVCL = 1, RL = 10kΩ CL = 100pF, Vi = 1.3V to 1.7V) Slew rate , (AVCL = 1, RL = 10kΩ CL = 100pF, Vi = 1.3V to 1.7V) Phase margin Equivalent input noise voltage (Rs = 100Ω f = 1kHz) , Min. Typ. 0.4 0.3 30 30 Max. Unit V/μs V/μs Degrees nV/√ Hz 1. Maximum values include unavoidable inaccuracies of the industrial tests. 5/18 Electrical characteristics Table 4. Symbol TS912 VCC+ = 5V, VCC- = 0V, RL, CL connected to VCC/2, Tamb = 25°C (unless otherwise specified) Parameter Input offset voltage (Vic = Vo = VCC/2) TS912 TS912A TS912B Tmin ≤ Tamb ≤ Tmax TS912 TS912A TS912B Input offset voltage drift Input offset current Tmin ≤ Tamb ≤ Tmax (1) Min. Typ. Max. Unit Vio 10 5 2 12 7 3 5 1 1 230 100 200 150 300 350 450 mV ΔVio Iio Iib ICC CMR SVR Avd μV/°C pA pA μA dB dB V/mV Input bias current (1) Tmin ≤ Tamb ≤ Tmax Supply current (per amplifier, AVCL = 1, no load) Tmin ≤ Tamb ≤ Tmax Common mode rejection ratio Vic = 1.5 to 3.5V, Vo = 2.5V Supply voltage rejection ratio (VCC+ = 3 to 5V, Vo = VCC/2) Large signal voltage gain (RL = 10kΩ Vo = 1.5V to 3.5V) , Tmin ≤ Tamb ≤ Tmax High level output voltage (Vid = 1V) RL = 100kΩ RL = 10kΩ RL = 600Ω RL = 100Ω Tmin ≤ Tamb ≤ Tmax RL = 10kΩ RL = 600Ω Low level output voltage (Vid = -1V) RL = 100kΩ RL = 10kΩ RL = 600Ω RL = 100Ω Tmin ≤ Tamb ≤ Tmax RL = 10kΩ RL = 600Ω Output short-circuit current (Vid = ±1V) Source (Vo = VCC-) Sink (Vo = VCC+) Gain bandwidth product , (AVCL = 100, RL = 10kΩ CL = 100pF, f = 100kHz) Slew rate (AVCL = 1, RL = 10kΩ CL = 100pF, Vi = 1V to 4V) , Slew rate (AVCL = 1, RL = 10kΩ CL = 100pF, Vi = 1V to 4V) , 45 45 60 55 10 7 4.95 4.9 4.25 85 80 40 VOH 4.95 4.55 3.7 V 4.8 4.1 50 100 500 VOL 40 350 1400 mV 150 750 65 65 1 0.8 0.6 mA Io GBP SR+ SR - MHz V/μs V/μs 6/18 TS912 Table 4. Symbol en VO1/VO2 φm Electrical characteristics VCC+ = 5V, VCC- = 0V, RL, CL connected to VCC/2, Tamb = 25°C (unless otherwise specified) (continued) Parameter Equivalent input noise voltage (Rs = 100Ω f = 1kHz) , Channel separation (f = 1kHz) Phase margin Min. Typ. 30 120 30 Max. Unit nV/√ Hz dB Degrees 1. Maximum values include unavoidable inaccuracies of the industrial tests. 7/18 Electrical characteristics Table 5. Symbol TS912 VCC+ = 10V, VCC- = 0V, RL, CL connected to VCC/2, Tamb = 25°C (unless otherwise specified) Parameter Input offset voltage (Vic = Vo = VCC/2) TS912 TS912A TS912B Tmin ≤ Tamb ≤ Tmax TS912 TS912A TS912B Input offset voltage drift Input offset current Tmin ≤ Tamb ≤ Tmax (1) Min. Typ. Max. Unit Vio 10 5 2 12 7 3 5 1 1 400 100 200 150 300 600 700 mV ΔVio Iio Iib ICC μV/°C pA pA μA Input bias current (1) Tmin ≤ Tamb ≤ Tmax Supply current (per amplifier, AVCL = 1, no load) Tmin ≤ Tamb ≤ Tmax Common mode rejection ratio Vic = 3 to 7V, Vo = 5V Vic = 0 to 10V, Vo = 5V Supply voltage rejection ratio (VCC+ = 5 to 10V, Vo = VCC/2) Large signal voltage gain (RL = 10kΩ Vo = 2.5V to 7.5V) , Tmin ≤ Tamb ≤ Tmax High level output voltage (Vid = 1V) RL = 100kΩ RL = 10kΩ RL = 600Ω RL = 100Ω Tmin ≤ Tamb ≤ Tmax RL = 10kΩ RL = 600Ω Low level output voltage (Vid = -1V) RL = 100kΩ RL = 10kΩ RL = 600Ω RL = 100Ω Tmin ≤ Tamb ≤ Tmax RL = 10kΩ RL = 600Ω Output short circuit current (Vid = ±1V) Source (Vo = VCC-) Sink (Vo = VCC+) Gain bandwidth product , (AVCL = 100, RL = 10kΩ CL = 100pF, f = 100kHz) 45 50 60 50 60 15 10 9.95 9.85 9 CMR SVR Avd 90 75 90 50 dB dB V/mV VOH 9.95 9.35 7.8 V 9.8 8.8 50 150 800 VOL 50 650 2300 mV 150 900 65 75 1.4 mA Io GBP MHz 8/18 TS912 Table 5. Symbol SR+ SRφm en THD Cin Electrical characteristics VCC+ = 10V, VCC- = 0V, RL, CL connected to VCC/2, Tamb = 25°C (unless otherwise specified) (continued) Parameter Slew rate , (AVCL = 1, RL = 10kΩ CL = 100pF, Vi = 2.5V to 7.5V) Slew rate , (AVCL = 1, RL = 10kΩ CL = 100pF, Vi = 2.5V to 7.5V) Phase margin Equivalent input noise voltage (Rs = 100Ω f = 1kHz) , Total harmonic distortion , (AVCL = 1, RL = 10kΩ CL = 100pF, Vo = 4.75V to 5.25V, f = 1kHz) Input capacitance Min. Typ. 1.3 0.8 40 30 0.02 1.5 Max. Unit V/μs V/μs Degrees nV/√ Hz % pF 1. Maximum values include unavoidable inaccuracies of the industrial tests. 9/18 Electrical characteristics TS912 Figure 2. Supply current (each amplifier) vs. supply voltage Figure 3. High level output voltage vs. high level output current SUPPLY CURRENT, I CC ( m A) 600 500 400 300 200 100 OUTPUT VOLTAGE, VOH (V) Tamb = 25°C A VCL = 1 V O = VCC / 2 5 4 3 2 1 0 T amb = 25 °C V id = 100mV VCC = +5V VCC = +3V 0 4 8 12 16 -70 -56 -42 -28 -14 0 SUPPLY VOLTAGE, V CC (V) OUTPUT CURRENT, I OH (mA) Figure 4. Low level output voltage vs. low level output current Figure 5. 100 INPUT BIAS CURRENT, I ib (pA) Input bias current vs. temperature 5 OUTPUT VOLTAGE, V OL (V) 4 3 2 1 T amb = 25 ° C V id = -100mV V CC = 10V V i = 5V No load VCC = +3V VCC = +5V 10 0 14 28 42 56 70 1 25 50 75 100 125 OUTPUT CURRENT, I OL (mA) TEMPERATURE, T amb ( °C) Figure 6. High level output voltage vs. high level output current Figure 7. Low level output voltage vs. low level output current OUTPUT VOLTAGE, VOH (V) 16 12 8 4 0 -70 T amb = 25° C Vid = 100mV VCC = +16V OUTPUT VOLTAGE, VOL (V) 20 10 8 6 4 2 T amb = 25 ° C V id = -100mV V CC = 16V V CC = 10V VCC = +10V -56 -42 -28 -14 0 0 14 28 42 56 70 OUTPUT CURRENT, IOH (mA) OUTPUT CURRENT, I OL (mA) 10/18 TS912 Electrical characteristics Figure 8. 50 40 GAIN (dB) 30 20 10 0 -10 Gain and phase vs. frequency Figure 9. GAIN BANDW. PROD., GBP (kHz) Gain bandwidth product vs. supply voltage GAIN PHASE Tamb = 25°C VCC = 10V R L = 10k W C L = 100pF A VCL = 100 Phase Margin PHASE (Degrees) 0 45 90 135 180 1800 1400 1000 600 200 Tamb = 25°C R L = 10kW C L = 100pF Gain Bandwidth Product 10 2 10 3 10 10 10 FREQUENCY, f (Hz) 4 5 6 10 7 0 4 8 12 16 SUPPLY VOLTAGE, VCC (V) Figure 10. Phase margin vs. supply voltage PHASE MARGIN, f m (Degrees) 60 50 40 30 20 0 4 8 12 16 Tamb = 25°C R L = 10kW C L = 100pF Figure 11. Gain and phase vs. frequency 50 40 GAIN (dB) 30 20 10 0 10 PHASE Tamb = 25°C V CC = 10V R L = 600W C L = 100pF A VCL = 100 GAIN 45 Phase Margin Gain Bandwidth Product 90 135 180 10 2 10 3 SUPPLY VOLTAGE, VCC (V) 10 10 10 FREQUENCY, f (Hz) 4 5 6 10 7 Figure 12. Gain bandwidth product vs. supply Figure 13. Phase margin vs. supply voltage voltage GAIN BANDW. PROD., GBP (kHz) 1800 1400 1000 600 200 0 4 8 12 16 SUPPLY VOLTAGE, VCC (V) PHASE MARGIN, fm (Degrees) 60 50 40 30 20 0 4 8 12 16 Tamb = 25°C R L = 600W C L = 100pF Tamb = 25°C R L = 600W C L = 100pF SUPPLY VOLTAGE, VCC (V) 11/18 PHASE (Degrees) 0 Macromodel TS912 Figure 14. Input voltage noise vs. frequency 150 EQUIVALENT INPUT VOLTAGE NOISE (nV/VHz) 100 VCC = 10V Tamb = 25°C RS = 100W 50 0 10 100 1000 10000 FREQUENCY (Hz) 4 4.1 Macromodel Important note concerning this macromodel Please consider the following remarks before using this macromodel. ● ● ● All models are a trade-off between accuracy and complexity (i.e. simulation time). Macromodels are not a substitute to breadboarding; rather, they confirm the validity of a design approach and help to select surrounding component values. A macromodel emulates the nominal performance of a typical device within specified operating conditions (temperature, supply voltage, for example). Thus the macromodel is often not as exhaustive as the datasheet, its purpose is to illustrate the main parameters of the product. Data derived from macromodels used outside of the specified conditions (VCC, temperature, for example) or even worse, outside of the device operating conditions (VCC, Vicm, for example), is not reliable in any way. 12/18 TS912 Macromodel 4.2 Macromodel code ** Standard Linear Ics Macromodels, 1993. ** CONNECTIONS : * 1 INVERTING INPUT * 2 NON-INVERTING INPUT * 3 OUTPUT * 4 POSITIVE POWER SUPPLY * 5 NEGATIVE POWER SUPPLY .SUBCKT TS912 1 2 3 4 5 ********************************************************** .MODEL MDTH D IS=1E-8 KF=6.563355E-14 CJO=10F * INPUT STAGE CIP 2 5 1.500000E-12 CIN 1 5 1.500000E-12 EIP 10 5 2 5 1 EIN 16 5 1 5 1 RIP 10 11 6.500000E+00 RIN 15 16 6.500000E+00 RIS 11 15 7.655100E+00 DIP 11 12 MDTH 400E-12 DIN 15 14 MDTH 400E-12 VOFP 12 13 DC 0.000000E+00 VOFN 13 14 DC 0 IPOL 13 5 4.000000E-05 CPS 11 15 3.82E-08 DINN 17 13 MDTH 400E-12 VIN 17 5 -0.5000000e+00 DINR 15 18 MDTH 400E-12 VIP 4 18 -0.5000000E+00 FCP 4 5 VOFP 7.750000E+00 FCN 5 4 VOFN 7.750000E+00 * AMPLIFYING STAGE FIP 5 19 VOFP 5.500000E+02 FIN 5 19 VOFN 5.500000E+02 RG1 19 5 5.087344E+05 RG2 19 4 5.087344E+05 CC 19 29 2.200000E-08 HZTP 30 29 VOFP 12.33E+02 HZTN 5 30 VOFN 12.33E+02 DOPM 19 22 MDTH 400E-12 DONM 21 19 MDTH 400E-12 HOPM 22 28 VOUT 3135 VIPM 28 4 150 HONM 21 27 VOUT 3135 VINM 5 27 150 EOUT 26 23 19 5 1 VOUT 23 5 0 ROUT 26 3 65 COUT 3 5 1.000000E-12 DOP 19 68 MDTH 400E-12 VOP 4 25 1.924 13/18 Package information HSCP 68 25 VSCP1 1E8 DON 69 19 MDTH 400E-12 VON 24 5 2.4419107 HSCN 24 69 VSCN1 1.5E8 VSCTHP 60 61 0.1375 DSCP1 61 63 MDTH 400E-12 VSCP1 63 64 0 ISCP 64 0 1.000000E-8 DSCP2 0 64 MDTH 400E-12 DSCN2 0 74 MDTH 400E-12 ISCN 74 0 1.000000E-8 VSCN1 73 74 0 DSCN1 71 73 MDTH 400E-12 VSCTHN 71 70 -0.75 ESCP 60 0 2 1 500 ESCN 70 0 2 1 -2000 .ENDS TS912 5 Package information In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. 14/18 TS912 Package information 5.1 DIP-8 package mechanical data Figure 15. DIP8 package mechanical data Dimensions Ref. Min. A A1 A2 b b2 c D E E1 e eA eB L 2.92 3.30 0.38 2.92 0.36 1.14 0.20 9.02 7.62 6.10 3.30 0.46 1.52 0.25 9.27 7.87 6.35 2.54 7.62 10.92 3.81 0.115 0.130 4.95 0.56 1.78 0.36 10.16 8.26 7.11 Millimeters Typ. Max. 5.33 0.015 0.115 0.014 0.045 0.008 0.355 0.300 0.240 0.130 0.018 0.060 0.010 0.365 0.310 0.250 0.100 0.300 0.430 0.150 0.195 0.022 0.070 0.014 0.400 0.325 0.280 Min. Inches Typ. Max. 0.210 15/18 Package information TS912 5.2 SO-8 package mechanical data Figure 16. SO-8 package mechanical data Dimensions Ref. Min. A A1 A2 b c D H E1 e h L k ccc 0.25 0.40 1° 0.10 1.25 0.28 0.17 4.80 5.80 3.80 4.90 6.00 3.90 1.27 0.50 1.27 8° 0.10 0.010 0.016 1° 0.48 0.23 5.00 6.20 4.00 Millimeters Typ. Max. 1.75 0.25 0.004 0.049 0.011 0.007 0.189 0.228 0.150 0.193 0.236 0.154 0.050 0.020 0.050 8° 0.004 0.019 0.010 0.197 0.244 0.157 Min. Inches Typ. Max. 0.069 0.010 16/18 TS912 Ordering information 6 Ordering information Table 6. Order codes Temperature range Package Packing Marking TS912IN DIP8 TS912AIN TS912ID TS912IDT TS912AID TS912AIDT TS912BID TS912BIDT TS912IYD TS912IYDT(1) TS912AIYD TS912AIYDT(1) TS912BIYD TS912BIYDT(1) 1. Qualified and characterized according to AEC Q100 and Q003 or equivalent, advanced screening according to AEC Q001 & Q 002 or equivalent. Part number TS912IN Tube TS912AIN 912I SO-8 -40°C, +125°C Tube or Tape & reel 912AI 912BI 912IY SO-8 (Automotive grade level) 912AIY 912BY 7 Revision history Table 7. Date 4-Dec.-2001 31-Jul-2005 3-Oct-2005 13-Feb- 2006 Document revision history Revision 1 2 3 4 First release. PPAP references inserted in the datasheet, see order codes table. ESD protection inserted in AMR table. Some errors in the Order Codes table were corrected. Reorganization of Section 4: Macromodel. Parameters added in AMR table (Tj, ESD, Rthja, Rthjc). Corrected units and ESD footnotes in Table 1: Absolute maximum ratings. Corrected misalignments in electrical characteristics table. Updated Section 4: Macromodel. Added missing automotive grade order codes and footnote in Table 6: Order codes. Format update. Changes 16-Oct-2007 5 17/18 TS912 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. 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