TS914IYDT

TS914, TS914A Rail-to-rail CMOS quad operational amplifier Datasheet −production data Features ■ Rail-to-rail input and output voltage ranges ■ Single (or dual) supply operation from 2.7 to 16 V ■ Extremely low input bias current: 1 pA typical ■ Low input offset voltage: 5 mV max. (A grade) ■ Specified for 600 Ω and 100 Ω loads ■ Low supply current: 200 μA/ampli. (VCC = 3 V) ■ Latch-up immunity ■ Spice macromodel included in this specification D SO-14 (plastic micropackage) Pin connections (top view) Related products ■ See TS56x series for better accuracy and smaller packages Description The TS914 device is a rail-to-rail CMOS quad operational amplifier designed to operate with a single or dual supply voltage. The input voltage range Vicm includes the two supply rails VCC+ and VCC-. The output reaches VCC- +50 mV, VCC+ -50 mV, with RL = 10 kΩ, and VCC- +350 mV, VCC+ 350 mV, with RL = 600 Ω. This product offers a broad supply voltage operating range from 2.7 to 16 V and a supply current of only 200 μA/amp. (VCC = 3 V). The source and sink output current capability is typically 40 mA (at VCC = 3 V), fixed by an internal limitation circuit. November 2012 This is information on a product in full production. Doc ID 4475 Rev 8 1/17 www.st.com 17 Absolute maximum ratings and operating conditions 1 TS914, TS914A Absolute maximum ratings and operating conditions Table 1. Absolute maximum ratings Symbol VCC Vid Parameter Supply voltage(1) (2) Differential input voltage (3) Value Unit 18 V ±18 V -0.3 to 18 V Vin Input voltage Iin Current on inputs ±50 mA Io Current on outputs ±130 mA Tj Maximum junction temperature 150 °C -65 to +150 °C Tstg Storage temperature Rthja Thermal resistance junction to ambient(4) 103 °C/W Rthjc Thermal resistance junction to case 31 °C/W HBM: human body model(5) 1 kV MM: machine model 50 V CDM: charged device model(7) 1.5 kV ESD (6) 1. All voltage values, except differential voltage are with respect to network ground terminal. 2. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal. 3. The magnitude of input and output voltages must never exceed VCC+ +0.3 V. 4. Short-circuits can cause excessive heating. Destructive dissipation can result from simultaneous shortcircuit on all amplifiers. These are typical values. 5. Human body model: a 100 pF capacitor is charged to the specified voltage, then discharged through a 1.5 kΩ resistor between two pins of the device. This is done for all couples of connected pin combinations while the other pins are floating. 6. Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 Ω). This is done for all couples of connected pin combinations while the other pins are floating. 7. Charged device model: all pins and the package are charged together to the specified voltage and then discharged directly to ground through only one pin. This is done for all pins. Table 2. Operating conditions Symbol 2/17 Parameter VCC Supply voltage Vicm Common mode input voltage range Toper Operating free air temperature range Doc ID 4475 Rev 8 Value Unit 2.7 to 16 V VCC- -0.2 to VCC+ +0.2 V -40 to + 125 °C TS914, TS914A Schematic diagram 2 Schematic diagram Figure 1. Schematic diagram Doc ID 4475 Rev 8 3/17 Electrical characteristics TS914, TS914A 3 Electrical characteristics Table 3. VCC+ = 3 V, VCC- = 0 V, RL, CL connected to VCC/2, Tamb = 25 °C (unless otherwise specified) Symbol Parameter Vio Input offset voltage (Vicm = Vo = VCC/2) ΔVio Input offset voltage drift Iio Iib Input offset current Test conditions Min. Typ. TS914 TS914A Tmin ≤ Tamb ≤ Tmax, TS914 Tmin ≤ Tamb ≤ Tmax, TS914A Max. Unit 10 5 12 7 mV μV/°C 5 (1) 1 100 200 pA 1 150 300 pA 200 300 400 μA Tmin ≤ Tamb ≤ Tmax Input bias current(1) Tmin. ≤ Tamb ≤ Tmax Supply current per amplifier, AVCL = 1, no load Tmin ≤ Tamb ≤ Tmax CMR Common mode rejection ratio Vicm = 0 to 3 V, Vo = 1.5 V 70 dB SVR Supply voltage rejection ratio VCC+ = 2.7 to 3.3 V, Vo = VCC/2 80 dB Avd Large signal voltage gain RL = 10 kΩ, Vo = 1.2 V to 1.8 V Tmin ≤ Tamb ≤ Tmax High level output voltage Vid = 1 V, RL = 10 kΩ RL = 600 Ω RL = 100 Ω Vid = 1V, Tmin ≤ Tamb ≤ Tmax RL = 10 kΩ RL = 600 Ω ICC VOH VOL Low level output voltage Vid = -1 V, RL = 10 kΩ RL = 600 Ω RL = 100 Ω Vid = -1 V, Tmin ≤ Tamb ≤ Tmax RL = 10 kΩ RL = 600 Ω Output short-circuit current Vid = ±1 V Source (Vo = VCC-) Sink (Vo = VCC+) Gain bandwidth product SR Slew rate φm Phase margin en Equivalent input noise voltage Io GBP VO1/VO2 Channel separation 10 2.9 2.2 2.97 2.7 2 V/mV V 2.8 2.1 50 300 900 100 600 mV 150 900 40 40 mA AVCL = 100, RL = 10 kΩ, CL = 100 pF, f = 100 kHz 0.8 MHz AVCL = 1, RL = 10 kΩ, CL = 100 pF, Vin = 1.3 V to 1.7 V 0.5 V/μs 30 ° Rs = 100 Ω, f = 1 kHz 30 nV/√Hz f = 1 kHz 120 dB 1. Maximum values include unavoidable inaccuracies of the industrial tests. 4/17 3 2 Doc ID 4475 Rev 8 TS914, TS914A Table 4. Electrical characteristics VCC+ = 5 V, VCC- = 0 V, RL, CL connected to VCC/2, Tamb = 25 °C (unless otherwise specified) Symbol Parameter Vio Input offset voltage (Vicm = Vo = VCC/2) ΔVio Input offset voltage drift Test conditions Min. Typ. TS914 TS914A Tmin ≤ Tamb ≤ Tmax, TS914 Tmin ≤ Tamb ≤ Tmax, TS914A Max. Unit 10 5 12 7 mV μV/°C 5 1 100 200 pA 1 150 300 pA per amplifier, AVCL = 1, no load Tmin ≤ Tamb ≤ Tmax 230 350 450 μA Common mode rejection ratio Vicm = 1.5 to 3 V, Vo = 2.5 V 85 dB SVR Supply voltage rejection ratio VCC+ = 3 to 5 V, Vo = VCC/2 80 dB Avd Large signal voltage gain R L = 10 kΩ, Vo = 1.5 V to 3.5 V Tmin ≤ Tamb ≤ Tmax High level output voltage Vid = 1 V, RL = 10 kΩ RL = 600 Ω RL = 100 Ω Vid = 1 V, Tmin ≤ Tamb ≤ Tmax RL = 10 kΩ RL = 600 Ω Iio Input offset current (1) Iib Input bias current (1) ICC Supply current CMR VOH VOL Low level output voltage Tmin ≤ Tamb ≤ Tmax Tmin ≤ Tamb ≤ Tmax Vid = -1 V, RL = 10 kΩ RL = 600 Ω RL = 100 Ω Vid = -1 V, Tmin ≤ Tamb ≤ Tmax RL = 10 kΩ RL = 600 Ω Output short-circuit current Vid = ±1 V Source (Vo = VCC-) Sink (Vo = VCC+) Gain bandwidth product AVCL = 100, RL = 10 kΩ, CL = 100 pF, f = 100 kHz SR Slew rate AVCL = 1, RL = 10 kΩ, CL = 100 pF, Vin = 1 V to 4 V φm Phase margin en Equivalent input noise voltage Io GBP VO1/VO2 Channel separation 10 7 40 4.85 4.20 4.95 4.65 3.7 V/mV V 4.8 4.1 50 350 1400 100 680 mV 150 900 60 60 mA 1 MHz 0.8 V/μs 30 ° R s = 100 Ω, f = 1 kHz 30 nV/√Hz f = 1 kHz 120 dB 1. Maximum values include unavoidable inaccuracies of the industrial tests. Doc ID 4475 Rev 8 5/17 Electrical characteristics Table 5. Symbol TS914, TS914A VCC+ = 10 V, VDD = 0 V, RL, C L connected to VCC/2, Tamb = 25 °C (unless otherwise specified) Parameter Vio Input offset voltage (Vicm = Vo = VCC/2) ΔVio Input offset voltage drift Iio Input offset current(1) Iib Input bias current(1) Test conditions Vicm = 3 to 7 V, Vo = 5 V Vicm = 0 to 10 V, Vo = 5 V Avd Large signal voltage gain RL = 10 kΩ, Vo = 2.5 V to 7.5 V Tmin ≤ Tamb ≤ Tmax High level output voltage Vid = 1 V, RL = 10 kΩ RL = 600 Ω RL = 100 Ω Vid = 1 V, Tmin ≤ Tamb ≤ Tmax RL = 10 kΩ RL = 600 Ω 150 300 pA Vid = -1 V, RL = 10 kΩ RL = 600 Ω RL = 100 Ω Vid = -1 V, Tmin ≤ Tamb ≤ Tmax RL = 10 kΩ RL = 600 Ω 90 75 dB 90 dB 15 10 60 9.85 9 9.95 9.35 7.8 V/mV V 9.8 9 50 650 2300 180 800 mV 150 900 60 ICC Supply current / operator AVCL = 1, no load, Tmin ≤ Tamb ≤ Tmax 400 GBP Gain bandwidth product AVCL = 100, RL = 10 kΩ, CL = 100 pF, f = 100 kHz SR Slew rate φm en 6/17 μV/°C 1 Vid = ±1 V Cin mV pA Output short-circuit current THD 10 5 12 7 100 200 Tmin ≤ Tamb ≤ Tmax Supply voltage rejection ratio VCC+= 5 to 10 V, Vo = VCC/2 Io Unit 1 Tmin ≤ Tamb ≤ Tmax SVR Low level output voltage Max. 5 Common mode rejection ratio VOL Typ. TS914 TS914A Tmin ≤ Tamb ≤ Tmax, TS914 Tmin ≤ Tamb ≤ Tmax, TS914A CMR VOH Min. mA 600 700 μA 1.4 MHz AVCL = 1, RL = 10 kΩ, CL = 100 pF, Vi = 2.5 V to 7.5 V 1 V/μs Phase margin Rs = 100 Ω, f = 1 kHz 40 ° Equivalent input noise voltage Rs = 100 Ω, f = 1 kHz 30 nV/√Hz Total harmonic distortion AVCL = 1, RL = 10 kΩ, CL = 100 pF, Vo = 4.75 to 5.25 V, f = 1 kHz 0.02 % 1.5 pF Input capacitance Doc ID 4475 Rev 8 TS914, TS914A Table 5. Symbol Rin VO1/VO2 Electrical characteristics VCC+ = 10 V, VDD = 0 V, RL, C L connected to VCC/2, Tamb = 25 °C (unless otherwise specified) (continued) Parameter Test conditions Input resistance Channel separation f = 1 kHz Min. Typ. Max. Unit >10 Tera Ω 120 dB 1. Maximum values include unavoidable inaccuracies of the industrial tests. Doc ID 4475 Rev 8 7/17 Electrical characteristics Supply current (each amplifier) vs. supply voltage Figure 3. Supply current Supply voltage Output current Temperature Output current Figure 7. Low level output voltage vs. low level output current (VCC = 16 V, VCC = 10 V) Output voltage High level output voltage vs. high level output current (VCC = +16 V, VCC = +10 V) Output voltage Figure 6. Input bias current vs. temperature Input bias current Low level output voltage vs. low level Figure 5. output current (VCC = +5 V, VCC = +3 V) Output voltage Figure 4. Output curent 8/17 High level output voltage vs. high level output current (VCC = +5 V, VCC = +3 V) Output voltage Figure 2. TS914, TS914A Output current Doc ID 4475 Rev 8 TS914, TS914A Gain and phase vs. frequency (RL = 10 kΩ) Gain Phase Gain bandwidth product vs. supply voltage (RL = 10 kΩ) Gain bandw. prod. Figure 9. Phase (degrees) Figure 8. Electrical characteristics Supply voltage Frequency Figure 10. Phase margin vs. supply voltage (RL = 10 kΩ) Figure 11. Gain and phase vs. frequency (RL = 600 Ω) d Phase (degrees) Gain Gain Phase margin Phase Supply voltage Frequency Phase margin Gain bandw. prod. d Figure 12. Gain bandwidth product vs. supply Figure 13. Phase margin vs. supply voltage voltage (RL = 600 Ω) (RL = 600 Ω) Supply voltage Supply voltage Doc ID 4475 Rev 8 9/17 Electrical characteristics TS914, TS914A Figure 14. Input voltage noise vs. frequency Frequency 10/17 Doc ID 4475 Rev 8 TS914, TS914A Macromodels 4 Macromodels 4.1 Important note concerning this macromodel ● All models are a trade-off between accuracy and complexity (that is, simulation time). Macromodels are not a substitute for breadboarding; rather, they confirm the validity of a design approach and help to select surrounding component values. ● A macromodel emulates the nominal performance of a typical device within specified operating conditions (such as temperature or supply voltage, etc.). Thus, the macromodel is often not as exhaustive as the datasheet, its purpose is to illustrate the main parameters of the product. ● Data derived from macromodels used outside of the specified conditions (such as VCC, or temperature) or even worse, outside of the device’s operating conditions (such as VCC or Vicm) is not reliable in any way. The values provided in Table 6 are derived from this macromodel. Table 6. VCC+ = 3 V, VCC- = 0 V, RL, CL connected to VCC/2, Tamb = 25 °C (unless otherwise specified) Symbol Conditions Vio Value Unit 0 mV Avd RL = 10 kΩ 10 V/mV ICC No load, per operator 100 μA -0.2 to 3.2 V Vicm VOH RL = 600 Ω 2.96 V VOL RL = 60 Ω 300 mV Isink VO = 3 V 40 mA Isource VO = 0 V 40 mA GBP RL = 10 kΩ, CL = 100 pF 0.8 MHz SR RL = 10 kΩ, CL = 100 pF 0.3 V/μs φm Phase margin 30 Degrees Doc ID 4475 Rev 8 11/17 Macromodels 4.2 TS914, TS914A Macromodel code * Standard Linear Ics Macromodels, 1993. ** CONNECTIONS : * 1 INVERTING INPUT * 2 NON-INVERTING INPUT * 3 OUTPUT * 4 POSITIVE POWER SUPPLY * 5 NEGATIVE POWER SUPPLY * .SUBCKT TS914 1 2 3 4 5 ************************************************* .MODEL MDTH D IS=1E-8 KF=6.564344E-14 CJO=10F CIP 2 5 1.000000E-12 CIN 1 5 1.000000E-12 EIP 10 5 2 5 1 EIN 16 5 1 5 1 RIP 10 11 6.500000E+00 RIN 15 16 6.500000E+00 RIS 11 15 7.322092E+00 DIP 11 12 MDTH 400E-12 DIN 15 14 MDTH 400E-12 VOFP 12 13 DC 0.000000E+00 VOFN 13 14 DC 0 IPOL 13 5 4.000000E-05 CPS 11 15 2.498970E-08 DINN 17 13 MDTH 400E-12 VIN 17 5 0.000000e+00 DINR 15 18 MDTH 400E-12 VIP 4 18 0.000000E+00 FCP 4 5 VOFP 5.750000E+00 FCN 5 4 VOFN 5.750000E+00 * AMPLIFYING STAGE FIP 5 19 VOFP 4.400000E+02 FIN 5 19 VOFN 4.400000E+02 RG1 19 5 4.904961E+05 RG2 19 4 4.904961E+05 CC 19 29 2.200000E-08 HZTP 30 29 VOFP 1.8E+03 HZTN 5 30 VOFN 1.8E+03 DOPM 19 22 MDTH 400E-12 DONM 21 19 MDTH 400E-12 HOPM 22 28 VOUT 3800 VIPM 28 4 230 HONM 21 27 VOUT 3800 VINM 5 27 230 EOUT 26 23 19 5 1 VOUT 23 5 0 ROUT 26 3 82 COUT 3 5 1.000000E-12 DOP 19 68 MDTH 400E-12 VOP 4 25 1.724 12/17 Doc ID 4475 Rev 8 TS914, TS914A Macromodels HSCP 68 25 VSCP1 0.8E+8 DON 69 19 MDTH 400E-12 VON 24 5 1.7419107 HSCN 24 69 VSCN1 0.8E+8 VSCTHP 60 61 0.0875 DSCP1 61 63 MDTH 400E-12 VSCP1 63 64 0 ISCP 64 0 1.000000E-8 DSCP2 0 64 MDTH 400E-12 DSCN2 0 74 MDTH 400E-12 ISCN 74 0 1.000000E-8 VSCN1 73 74 0 DSCN1 71 73 MDTH 400E-12 VSCTHN 71 70 -0.55 ESCP 60 0 2 1 500 ESCN 70 0 2 1 -2000 .ENDS Doc ID 4475 Rev 8 13/17 Package information 5 TS914, TS914A Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. Figure 15. SO-14 package outline Table 7. SO-14 package mechanical data Dimensions Millimeters Inches Symbol Min. Typ. Max. Min. Max. A 1.35 1.75 0.05 0.068 A1 0.10 0.25 0.004 0.009 A2 1.10 1.65 0.04 0.06 B 0.33 0.51 0.01 0.02 C 0.19 0.25 0.007 0.009 D 8.55 8.75 0.33 0.34 E 3.80 4.0 0.15 0.15 e 1.27 0.05 H 5.80 6.20 0.22 0.24 h 0.25 0.50 0.009 0.02 L 0.40 1.27 0.015 0.05 k ddd 14/17 Typ. 8° (max.) 0.10 Doc ID 4475 Rev 8 0.004 TS914, TS914A 6 Ordering information Ordering information Table 8. Order codes Order code Temperature range Package Packing Marking TS914ID TS914IDT SO-14 Tube and tape and reel 914I TS914AID TS914AIDT SO-14 Tube and tape and reel 914AI TS914IYDT(1) SO-14 (automotive grade level) Tube and tape and reel 914IY TS914AIYDT(1) SO-14 (automotive grade level) Tape and reel 914AIY -40, +125 °C 1. Qualified and characterized according to AEC Q100 and Q003 or equivalent, advanced screening according to AEC Q001 and Q 002 or equivalent. Doc ID 4475 Rev 8 15/17 Revision history 7 TS914, TS914A Revision history Table 9. Document revision history Date Revision 01-Dec-2001 1 Initial release. 01-Nov-2004 2 Changed Vio max. on cover page from 2 mV to 5 mV. 01-Jun-2005 3 Inserted PIPAP references (see order code table on cover page). 01-Feb-2006 4 Added parameters in Table 1: Absolute maximum ratings on page 2 (Tj, ESD, Rthja, Rthjc). 08-Jan-2007 5 Corrected package names in order codes table on cover page. Corrected macromodel. 02-Apr-2009 6 Minor text edits. Removed table of contents. Updated package information in Chapter 5. Moved Table 8: Order codes from cover page to end of datasheet. Added footnote to Table 8: Order codes. 04-Feb-2010 7 Added parameters for TS914A. Removed DIP14 package information. Removed TS914AIYD order code from Table 8. 8 Updated Features (added Related products). Updated titles of Figure 3, Figure 4, Figure 6 to Figure 13 (added conditions to differentiate them). Removed TS914IYD device from Table 8. Minor corrections throughout document. 06-Nov-2012 16/17 Changes Doc ID 4475 Rev 8 TS914, TS914A Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. 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The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. © 2012 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com Doc ID 4475 Rev 8 17/17