TSC210, TSC211, TSC212
TSC213, TSC214, TSC215
Datasheet
High/low-side, bidirectional, zero-drift current sense amplifiers
Features
•
•
•
•
•
•
•
•
•
•
Wide common mode voltage: -0.3 to 26 V
Offset voltage: ±35 µV max. (TSC210)
2.7 to 26 V supply voltage
Different gain available
–
TSC210 (200 V/V)
–
TSC211 (500 V/V)
–
TSC212 (1000 V/V)
–
TSC213 (50 V/V)
–
TSC214 (100 V/V)
–
TSC215 (75 V/V)
Gain error: ±1% max.
Offset drift: 0.1 µV/°C max.
Gain drift: 20 ppm/°C max.
Quiescent current: 100 µA
QFN10 (1.8x1.4) and SC70-6
Applications
Product status link
TSC210, TSC211, TSC212, TSC213,
TSC214 and TSC215
•
•
•
•
•
Telecom equipment
Power management
Notebook computers
Industrial applications
Battery chargers
Description
The TSC210, TSC211, TSC212, TSC213, TSC214 and TSC215 are a series of zerodrift current sense amplifiers that can sense current via a shunt resistor over a wide
range of common mode voltages from -0.3 to +26 V, whatever the supply voltage is.
They are available in three different versions, each of them having a different gain.
The TSC21x are designed with a specific zero-drift architecture, which can achieve
high precision.
The TSC21x are current sense amplifiers that may be used in various functions
such as precision current measurement, over current protection, current monitoring,
feedback loops.
These devices fully operate over the broad supply voltage range of 2.7 to 26 V and
over the industrial temperature range -40 to 125 °C.
DS13237 - Rev 5 - August 2021
For further information contact your local STMicroelectronics sales office.
www.st.com
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
Pin connections and description
1
Pin connections and description
Figure 1. Pin connections (top view)
Table 1. Pin description
Name
SC70-6
QFN10
REF
1
8
Reference voltage input
GND
2
9
Ground
Vcc
3
6
Power supply voltage
Vin+
4
2, 3
Connection to the external
sense resistor
Vin-
5
4, 5
Connection to the external
sense resistor
OUT
6
10
Output voltage
1, 7
Not connected(1)
NC
Description
1. Pins can be left floating or connected to VCC or GND.
DS13237 - Rev 5
page 2/38
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
Block diagram
2
Block diagram
Figure 2. Block diagram
Vcc
R4
Iload
Vref
R2
+
R Rshunt
Output
voltage
R1
R3
TSC21x
GND
Output voltage = ( Rshunt x Iload ) x Gain + Vref
Table 2. Resistors and gain values
DS13237 - Rev 5
Product
R1 and R2
R3 and R4
Gain
TSC210
1 MΩ
5 kΩ
200
TSC211
1 MΩ
2 kΩ
500
TSC212
1 MΩ
1 kΩ
1000
TSC213
1 MΩ
20 kΩ
50
TSC214
1 MΩ
10 kΩ
100
TSC215
1 MΩ
13.3 kΩ
75
page 3/38
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
Absolute maximum ratings and operating conditions
3
Absolute maximum ratings and operating conditions
Table 3. Absolute maximum ratings
Symbol
VCC
VIN
Parameter
Value
Unit
26
V
Supply voltage(1)
Differential voltage between input pins (In+, In-)
-26 to +26
Common mode voltage on input pins
V
Gnd-0.3 to 26
Ref
Reference input voltage
Gnd-0.3 to Vcc+0.3
V
Iin
Input current to any pin(2)
5
mA
Gnd-0.3 to Vcc+0.3
V
260
°C
-65 to 150
°C
150
°C
Vout
TLead
Output voltage
Lead temperature for 10
Tstg
Storage temperature
Tj
Junction temperature
s(3)
Thermal resistance junction to ambient
Rth-ja
(4)(5)
124
QFN10
ESD
°C/W
232
SC70-6
HBM: human body model(6)
4000
CDM: charged device model (7)
1000
V
1. All voltage values, except the differential voltage are with respect to the network ground terminal.
2. Due to AMR on input current (Iin), differential voltage may be limited.
3. Reflow at peak temperature of 260 °C. Time above 255 °C must not exceed 30 s.
4. Short-circuits can cause excessive heating and destructive dissipation.
5. Rth are typical values.
6. According to JEDEC standard JESD22-A114F.
7. According to ANSI/ESD STM5.3.1.
Table 4. Operating conditions
Symbol
Value
Unit
2.7 to 26
V
VCC
Supply voltage
Vicm
Common mode voltage on
input pins
-0.3 to +26
V
Operating free-air
temperature range
-40 to 125
°C
T
DS13237 - Rev 5
Parameter
page 4/38
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
Electrical characteristics
4
Electrical characteristics
Table 5. Electrical characteristics, T = 25 °C, VSENSE = VIN+- VIN- (unless otherwise specified),
TSC210, TSC213, TSC214, TSC215: VCC= 5 V, VIN+=12 V, VREF= VCC/2 (unless otherwise specified),
TSC211, TSC212: VCC = 12 V, VIN+ = 12 V, VREF = VCC/2 ( unless otherwise specified)
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
26
V
Power supply
Vcc
Supply voltage
Icc
Quiescent current
2.7
VSENSE = 0 mV
65
Tmin. < T < Tmax.
100
115
µA
Input
Offset voltage (RTI) (1)
VO
|Δ VO/ΔT|
TSC210, TSC211,
TSC212
VSENSE = 0 mV
-35
35
TSC214, TSC215
VSENSE = 0 mV
-60
60
TSC213
VSENSE = 0 mV
-100
100
Offset voltage variation
(RTI) vs. temperature
VSENSE = 0 mV,
0.05
Tmin.< T < Tmax.
0.3
µV
µV/°C
Common mode rejection ratio
VIN+= 0 to 26 V,
TSC210, TSC211,
TSC212
CMRR
VSENSE = 0 mV,
105
140
Tmin. < T < Tmax.
dB
Vin+= 0 to 26 V,
TSC213, TSC214,
TSC215
VSENSE = 0 mV,
100
120
Tmin. < T < Tmax.
Power supply rejection
ratio
Vcc= 2.7 to 26 V
IIB
Input bias current
VSENSE = 0 mV
IIO
Input offset current
VSENSE = 0 mV
0.02
TSC210
200
TSC211
500
TSC212
1000
TSC213
50
TSC214
100
TSC215
75
PSRR
VIN+=18 V, VSENSE = 0 mV
15
0.1
10
28
35
µV/V
µA
Output
G
DS13237 - Rev 5
Gain
VSENSE = -5 to + 5 mV
EG
Gain error
TG
Gain error vs.
temperature
Tmin. < T < Tmax.
NLE
Linearity error
VSENSE = -5 to + 5 mV
Tmin. < T < Tmax.
V/V
0.02
±1
%
7
20
ppm/°C
0.01
%
page 5/38
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
Electrical characteristics
Symbol
Parameter
Conditions
CL
Maximum capacitive load
No sustained oscillation
Vsw+
Output swing close to
VCC
RL=10 kΩ to Gnd
Vsw-
Output swing close to
Gnd
Tmin. < T < Tmax.
RLoad
Load regulation
IOUT= -10 to +10 mA
Tmin. < T < Tmax.
RL=10 kΩ to Gnd
Min.
Vcc-0.2
Typ.
Max.
Unit
470
pF
Vcc-0.05
V
5
0.5
30
mV
Ω
Dynamic performance
VCC = 5 V, Vicm = 12 V,
Cl = 100 pF
BW
Bandwidth
TSC210
25
TSC211
8
TSC212
6
TSC213
100
TSC214
40
TSC215
60
kHz
VCC = 5 V, Vicm = 12 V,
Cl = 100 pF
SR
Slew rate
TSC210
0.2
TSC211
0.075
TSC212
0.05
TSC213
0.85
TSC214
0.32
TSC215
0.42
V/µs
f = 1 kHz
EN
Noise (RTI)(1)
TSC210
40
TSC211
48
TSC212
50
TSC213
38
TSC214
40
TSC215
39
nV/√Hz
1. RTI stands for “related to input”
DS13237 - Rev 5
page 6/38
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
Typical characteristics
5
Typical characteristics
The TSC210 is used for typical characteristics, unless otherwise specified
Figure 3. Input offset voltage production
distribution
Figure 4. Input offset voltage vs. temperature
100
20
80
40
Vio (µV)
Population (%)
60
T=25°C
Vcc=5V,
Vicm=12V
15
10
20
0
-20
-40
5
-60
-80
30
35
25
20
15
5
10
0
-5
-1
0
-2
0
-1
5
-2
5
-100
-3
0
-3
5
0
Input offset voltage (µV)
Figure 5. Common-mode rejection ratio production
distribution
-25
0
25
50
75
Temperature (°C)
100
125
Figure 6. Common mode rejection ratio vs.
temperature
5
30
4
T=25°C
Vcc= 5V
25
3
2
CMRR (µV/V)
20
Population (%)
Vref=Vcc/2
Vsense=0V
Vcc=5V
15
10
1
0
-1
-2
5
-3
-4
-5
.0
-4
.5
-4
.0
-3
.5
-3
.0
-2
.5
-2
.0
-1
.5
-1
.0
-0
.5
0.
0
0.
5
1.
0
1.
5
2.
0
2.
5
3.
0
3.
5
4.
0
4.
5
5.
0
0
Common-ModeRejection Ratio (µV/V)
DS13237 - Rev 5
-5
Vref=Vcc/2
Vsense= 0 V
Vcc=5V Vicm =12V
-25
0
25
50
75
Temperature (°C)
100
125
page 7/38
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
Typical characteristics
Figure 8. Power supply rejection ratio vs.
frequency
Figure 7. Gain vs. frequency
140
120
PSRR (dB)
100
80
60
40
20
Vicm =12 V
Vripple =100 mVpp
T = 25 °C
0
10
100
1k
10k
100k
Frequency (Hz)
Figure 9. Common mode rejection ratio vs.
frequency
Figure 10. Positive output voltage swing vs. output
current VCC = 2.7 V
140
V+
120
Isource
Vcc=2.7 V
Vicm=12 V
(V+)-0.5V
Output Voltage (V)
CMRR (dB)
100
80
60
40
Vcc=5V, Vicm=12 V
Vripple=100 mVpp
T=25 °C
20
0
10
100
(V+)-1.0V
(V+)-1.5V
(V+)-2.0V
(V+)-2.5V
1k
10k
(V+)-3.0V
0.0
100k
125 °C
5.0
Frequency (Hz)
25 °C
-40 °C
10.0 15.0 20.0 25.0
Output current (mA)
30.0
35.0
Figure 11. Negative output voltage swing vs. output Figure 12. Positive output voltage swing vs. output
current VCC = 2.7 V
current V = 5 V
CC
125 °C
GND+2.5
(V+)-0.5V
GND+2.0
(V+)-1.0V
GND+1.5
GND+1.0
GND+0.5
GND
0.0
DS13237 - Rev 5
V+
25 °C -40 °C
Output Voltage (V)
Output Voltage (V)
GND+3.0
Isink
Vcc=2.7 V
Vicm=12 V
5.0
10.0 15.0 20.0 25.0
Output current (mA)
30.0
35.0
Isource
Vcc=5 V
Vicm=12 V
(V+)-1.5V
(V+)-2.0V
(V+)-2.5V
(V+)-3.0V
0.0
125 °C
5.0
25 °C
-40 °C
10.0 15.0 20.0 25.0
Output current (mA)
30.0
35.0
page 8/38
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
Typical characteristics
GND+6
GND+5.5
GND+5
GND+4.5
GND+4
GND+3.5
GND+3.0
GND+2.5
GND+2
GND+1.5
GND+1
GND+0.5
GND
0.0
V+
125 °C
25 °C
-40 °C
(V+)-1.0V
5.0
10.0 15.0 20.0 25.0
Output current (mA)
(V+)-1.5V
(V+)-2.0V
(V+)-2.5V
(V+)-3.0V
(V+)-3.5V
30.0
(V+)-4.0V
0.0
35.0
-40 °C
125 °C 25 °C
Isink
Vcc=5 V
Vicm=12 V
Figure 15. Negative output voltage swing vs. output
current VCC = 26 V
5.0
10.0 15.0 20.0 25.0
Output current (mA)
30.0
35.0
Figure 16. Input bias current vs. input common
mode voltage with supply voltage = 5 V
50
GND+6
GND+5.5
GND+5
GND+4.5
GND+4
GND+3.5
GND+3.0
GND+2.5
GND+2
GND+1.5
GND+1
GND+0.5
GND
0.0
125 °C
25 °C
-40 °C
40
Iibp, Iibn Vref=0V
30
Iib (µA)
Output Voltage (V)
Isource
Vcc=26 V
Vicm=12 V
(V+)-0.5V
Output Voltage (V)
Output Voltage (V)
Figure 13. Negative output voltage swing vs. output Figure 14. Positive output voltage swing vs. output
current VCC = 5 V
current VCC = 26 V
Iibp, Iibn Vref=2.5V
20
10
Isink
Vcc=26 V
Vicm=12 V
5.0
10.0 15.0 20.0 25.0
Output current (mA)
30.0
0
35.0
Figure 17. Input bias current vs. input common
mode voltage with supply voltage = 0 V
-10
T=25°C
Vcc=5V
0
5
10
15
Vicm (V)
20
25
30
Figure 18. Input bias current vs. temperature
35
30
30
Iibn Vref=2.5V; 0V
25
25
20
Iib (µA)
Iib (µA)
Iibp Vref=0V
15
20
15
10
10
5
Iibp Vref=2.5V
0
-5
DS13237 - Rev 5
T=25°C
Vcc=0V
0
5
10
15
Vicm (V)
20
Vref=Vcc/2
Vicm=12V
Vcc=5V
5
25
30
0
-40
-20
0
20
40
60
Temperature (°C)
80
100
120
page 9/38
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
Typical characteristics
Figure 19. Quiescent current vs. temperature
Figure 20. Input referred noise vs. frequency
100
90
80
70
Icc (µA)
60
50
40
30
20
Vref=Vcc/2
Vicm=12V
Vcc=5V
10
0
-40
-20
0
20
40
60
Temperature (°C)
80
100
120
Figure 21. 0.1 Hz to 10 Hz voltage noise
(referred to input)
Figure 22. Step response (10-mVpp input step)
800
Vout
400
200
Vout (V)
(0.5V/div)
Refered to input noise (nV)
600
0
-200
Vsense
-400
-800
Vcc = 5 V, Vicm = 12 V, Vsense =10 mVpp
T = 25 °C, Cl = 100pF
T=25°C
Vcc=5V
Vref=2.5V
-600
0
1
2
3
4
5
6
Time (s)
7
8
9
-200µ
10
Figure 23. Common mode voltage transient
response
0
200µ
400µ
600µ
Time (s)
Figure 24. Inverting differential input overloaded
Vicm
0V
-100µ
Vout
Vcc = 5 V,
Vref = 2.5 V,
Vicm = 12 V,
Vsense = 0 V,
T = 25 °C
0V
Vout
-50µ
0
50µ
100µ
150µ
Time (s)
DS13237 - Rev 5
1 V/div
Vcc = 5 V,
T = 25 °C
Output Voltage (500mV/div)
Common-Mode Voltage (1V/div)
Inverting input
200µ
250µ
300µ
350µ
Time (200 µs/div)
page 10/38
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
Typical characteristics
Figure 25. Non inverting differential input overload
Figure 26. Start-up response
6
Non inverting input
5
Vcc
4
1 V/div
1V/div
3
Vout
2
Vout
1
0
Vcc=5 V,
Vref=2.5 V,
Vicm=12 V,
Vsense=0 V,
T=25 °C
-1
0V
Vref=2.5 V,
Vsense=0 V,
T=25 °C
-2
-3
Time (100 µs/div)
Time (200 µs/div)
Figure 27. Brownout recovery
6
5
Vcc
4
1 V/div
3
2
1
Vout
0
-1
Vref = 2.5 V,
Vsense = 0 V,
T = 25 °C
-2
-3
Time (100 µs/div)
DS13237 - Rev 5
page 11/38
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
Application information
6
Application information
6.1
Overview
TSC21x series are specially designed to accurately measure current by amplifying the voltage across a shunt
resistor connected to its input. This voltage drop Vsense, is then amplified by an instrumentation amplifier
providing a max. input offset voltage of 35 µV (25 °C) for an input common voltage of 12 V for gain higher than
200.
TSC21x series with the use of thin film resistor and zero-drift architecture, offer an extremely precise input
offset voltage, gain error and very high CMRR performance even in high frequency range. Moreover, thanks
to the possibility to fix the output common mode voltage, the TSC21x can be either used as unidirectional or
bidirectional current sensing amplifier.
TSC21x provide an extended input common range from ground, and up to 26 V allowing either low-side or
high-side current sensing, while the TSC21x devices can operate from 2.7 to 26 V.
The parameters are very stable in the full VCC range and several characterization curves show the TSC21x
device characteristics at 5.0 V. Additionally, the main specifications are guaranteed in extended temperature
ranges from - 40 to 125 °C.
6.2
Theory of operation
The main particularity of the TSC21x is the ability to work with input common mode voltage largely beyond the
power supply Vcc range.
•
Vicm > 2.5 V
In this case, the power supply of the TSC21x is issued from the input and not only from the Vcc power supply.
More precisely a current is drawn from the common mode rail as depicted in Figure 28 to power it.
Figure 28. Power supply when Vicm > 2.5 V
VCC
R4
In-
-
R1
Shunt
resistor
OUT
In+
+
R2
R3
VREF
Gnd
In Figure 29 we can see that the current used to power the TSC21x is increasing with the Vicm voltage. The slope
is representing the internal common mode resistances. Part of it being Vicm / (R4 + R1) and part of it serving to
supply the input stage of the circuit, roughly 20 µA.
So due to the architecture of the TSC21x the current to be measured through the shunt resistor must be much
larger than the input bias current. In case of small current to measure the Iib, current must be taken into account.
DS13237 - Rev 5
page 12/38
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
Theory of operation
Figure 29. Input bias current vs. common mode voltage Vcc = 5 V
50
40
Iib (µA)
30
20
10
0
-10
T=25°C
Vcc=5V
Vref=2.5V
0
5
10
15
20
25
30
Vicm (V)
•
Output common mode range
The TSC21x output common mode voltage level can be set thanks to voltages applied on the Vref pin. This pin
allows to set the device either in bidirectional or in unidirectional operation. The voltage applied on this pin must
not exceed the Vcc range. The different configurations are detailed in the chapter Unidirectionnal/Bidirectionnal
operation.
As depicted by Figure 30 and using a TSC210, the Vref pin can be driven by an external voltage source capable
of sourcing/sinking a current following the below equation 1:
Iref =
Vicm − Vref
Vicm − Vref
R1 + R4 = 5kΩ + 1MΩ
(1)
Figure 30. Vref powered by an external voltage source with a TSC210
VCC
1MΩ
InShunt
resistor
-
5kΩ
OUT
+
5kΩ
1MΩ
In+
VREF
Gnd
Gnd
When the output common mode voltage is supplied by an external power supply, in order to improve the
output voltage measurement, it is recommended to measure the Vout differentially with respect to Vref voltage. It
provides a best CMRR measurement, a best noise immunity and also a more accurate Vout voltage. A decoupling
capacitance of 1 nF minimum can be also added in order to better filter the power supply, and can also be used
as a tank capacitance in case an ADC is connected to this reference voltage.
DS13237 - Rev 5
page 13/38
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
Unidirectionnal / bidirectionnal operation
6.3
Unidirectionnal / bidirectionnal operation
•
Unidirectional operation
Unidirectional mode of operation allows the device to measure the current through a shunt resistor in one
direction only. The output reference can be Ground or Vcc and can be set by using Vref pins for adjustment.
•
Ground referenced
Figure 31. Output reference to ground
VCC
R4
In-
-
R1
Shunt
resistor
OUT
In+
+
R2
R3
Current
VREF
Gnd
In this configuration the Vref pin is connected to the ground. The output common mode voltage is then
automatically set to GND when no current flows through the Rshunt resistance. This configuration allows the
full-scale output in unidirectional mode. It allows to measure a current as described in Figure 31.
•
Vcc referenced
Figure 32. Output reference to Vcc
VCC
R4
Current
In-
-
R1
Shunt
resistor
OUT
In+
+
R2
R3
VREF
Gnd
DS13237 - Rev 5
page 14/38
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
RSENSE selection
In this configuration the Vref pin is connected to the Vcc power supply. The output common mode voltage is then
automatically set to Vcc voltage when no current flows through the Rshunt resistance. This configuration allows the
full-scale output in unidirectional mode. It allows to measure a current as described in Figure 32
•
Bidirectional operation
Bidirectional mode of operation allows the device to measure currents through a shunt resistor in two directions.
The output reference can be set anywhere within the power supply range. If the output common mode voltage
is set at mid-range, the full-scale current measurement range is equal in both directions. It can be done by
connecting Vref pins to a reference voltage as suggested by Figure 33. In case the current measurement is not
equal in both directions, users can set the output in a non-symmetrical configuration, adjusting Vref according to
user needs.
Figure 33. External supply
VCC
R4
In-
-
R1
Shunt
resistor
OUT
In+
+
R2
R3
VREF
Reference
Voltage
Gnd
Another simpler way to generate the reference voltage to fix the output common mode voltage can be used.
As, for example, a resistive divider; in this case, as the VREF pin must be connected to a low impedance, it is
important to add a buffer stage between the VREF pin and the resistive divider. The buffer can be simply done with
an opamp as TSB611 in follower configuration.
If for any reason the voltage on the Vref pin exceeds the power supply by 0.5 V, the ESD diodes become
conductive and excessive current can flow through them. Without limitation this overcurrent can damage the
device. In this case, it is important to limit the current to 5 mA.
6.4
RSENSE selection
The selection of the shunt resistor is a trade-off between dynamic range and power dissipation.
Generally, in high current sensing application, the main focus is to reduce as much as possible the power
dissipation (I²R) by choosing the smallest value of shunt. It could be quite easy if full-scale current to measure is
small.
In low current application, the Rsense value could be higher, to minimize the impact of the offset voltage of the
circuit. Still keep in mind that due to input bias of several µA the TSC21x cannot measure current in the same
range, when the common mode voltage overpasses 2.5 V (refer to Section 6.2 Theory of operation).
The trade-off is mainly when a dynamic range of current to measure is large, meaning ability to measure with the
same shunt value low current to high current. Generally, the current full scale (Imax-Imin) defines the shunt value
thanks to the full output voltage range, the gain of the TSC21x.
Let’s illustrate with a simple example. In battery application a current in the range of 1 A to 10 A must be
measured. A TSC213 with a gain of 50 is chosen.
DS13237 - Rev 5
page 15/38
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
Input offset voltage drift overtemperature
Even if the TSC213 is a zero-drift current sensor allowing small shunt use, at first order the input offset voltage
(Vio) and the input bias current (Iib) should be put in with regards to the differential voltage in the shunt resistance.
Figure 34 shows the trade-off between the accuracy at minimum current and power dissipation.
Figure 34. Shunt resistor value trade-off (TSC213)
14
Vcc = 5 V, Vicm = 12 V
1.2
Shunt resistor vs input error
at minimum current (1 A)
Input error (%)
10
8
0.8
6
Shunt resistor vs power dissipation
at maximum current (10 A)
4
0.4
Power dissipationn (W)
12
2
0
0.0
0
1
2
3
4
5
6
7
8
9
10
11
12
Shunt resistor value (mW)
Increasing the shunt resistor values improves current accuracy, but also increases power dissipation!
•
If power dissipation in the shunt is the key point, RSense should be chosen as
Rsense ≤ Pmax
Imax²
and then chose the right TSC21x gain products. For example, for high current to sense, it is better to use the
TSC212 offering a gain of 1000, allowing to use a smaller shunt and so limited power losses. But accuracy
can be lower.
•
6.5
Or choose the TSC21x gain product available on the shelf, and then size the shunt resistor value
accordingly.
Input offset voltage drift overtemperature
The maximum input offset voltage drift overtemperature is defined as the offset variation related to the offset value
measured at 25 °C. The signal chain accuracy at 25 °C can be compensated during production at application
level. The maximum input voltage drift overtemperature enables the system designer to anticipate the effect of
temperature variations.
The maximum input voltage drift overtemperature is computed using equation 2:
ΔVio
Vio T − Vio 25°C
ΔT = max
T − 25°C
(2)
where T = - 40 °C and 125 °C
The TSC21x datasheet maximum value is guaranteed by measurements on a representative sample size
ensuring a Cpk (process capability index) greater than 1.3.
6.6
Error calculation
The principal source of error as input offset voltage, gain error, common mode rejection ration, are described
separately in the electrical characteristics. This section summarizes the most important error to take into account
during a design phase.
•
Input offset voltage error
In a precision domain most of the time the input offset can be a major influence in the output error. It is so
important to take it into account and also the derivation in temperature as depicted by equation 3:
DS13237 - Rev 5
page 16/38
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
Error calculation
Vio Error = ± Vio ± Dvio/Dt *Gain
(3)
The TSC21x series have a zero drift architecture allowing to present very small input offset and also an extremely
low variation in temperature.
•
Gain error and shunt resistance accuracy
Gain error = Gain 1 + εgain
(4)
Rsense error = Gain 1 + εRsense
(5)
where εgain is the gain error 1% max. for the TSC21x.
Where εRsense is the shunt resistance error. Shunt resistors from 5 mΩ to 100 mΩ are available with 1%
accuracy or better.
•
CMR error
In the electrical characteristics CMR is specified at one input common mode voltage. So in order to take into
consideration the variation of the input voltage offset depending on the Vicm, the calculus must be done till this
known point. Vicm = 12 V is the reference point.
So the error on Vout due to a common mode voltage variation can be written as in equation 6:
•
− 12V *Gain
CMR error = ± Vicm
CMR
Noise
(6)
One of the other advantages of the zero-drift architecture, is to reject the low frequency noise over the bandwidth,
and allow to have a white noise on all the bandwidth of the current sensing.
This is a real added value for the precision measurement especially in DC environment. Figure 20 express the
noise referred to the input of the TSC210. The TSC213 has white noise density of 38 nV/√Hz, on its whole
bandwidth.
The RMS value of the output noise of the TSC213 is the integration of the spectral noise over the bandwidth of
interest and can be expressed as equation 7:
enRMS =
•
Total output voltage
100000 . π
2 38 . 10−9 2 df *Gain
∫
0.1
(7)
The maximum total error that might happen on the output of the device in worst case condition can be described
as the sum of the different source described just above. The total output voltage can be written as equation (8).
Vout = G 1 + εG + dG * ∆ T . Rsℎunt 1 + εsℎunt . Isense + Vio + dVio * ∆ T +
dT
dT
Vicm − 12V + noise
CMRR
(8)
Note that the input bias currents are not considered in this section, as it has been already integrated in the Vsense.
Figure 35 below depicts the current flowing from the source to the load when the input common mode voltage is
higher than 2.5 V.
DS13237 - Rev 5
page 17/38
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
Error calculation
Figure 35. Input current
Vicm
Isource
Shunt
lib+
lib-
+
-
Load
Iload
Gnd
From a calculation approach when working with a Vicm over 2.5 V, if Isource is considered to be known rather than
the Iload, in this case the input bias current should be taken into consideration.
Figure 35 express also the fact that the TSC21x cannot measure current in the same order than input bias current
(several hundreds of µA).
•
Example
Let’s take an example to get a better understanding of the maximum total error that can happen on the output of
the TSC213.
Use case:
- Vcc = 5 V
- Vicm = 24 V
- Vocm = 2.5 V
- Temperature = 25 °C
- Iload = 5 A
- Shunt 5 mΩ with 1% accuracy
Theoretically the expected output voltage should be Vout = Rshunt * Iload * 50 + Vref = 3.75 V.
From the above equations let’s detail all the error terms by using the maximum value of the electrical
characteristic (when available), in order to express as much as possible, the worst case condition. The % error on
output of the following table is expressed in reference to Vout – Vref, so in this typical example: 1.25 V.
Table 6. Gain error
Error source
Calculus
Output voltage error
% error on
output
Gain error
50*5 . 10−3*5*1%
12.5 mV
1%
5 mV
0.4%
6 mV
0.5%
0.75 mVRMS
0.2%
Vio error
CMRR error
Noise
Total
50*100µV
12V
50* 24V −
100
10 20
50* 38nV 100kHz* π
2 − 0.1Hz
Hz
18.1 mV
+0.75 mVRMS
2.1%
1. The percentage is based on voltage peak value and is 3 times RMS value.
DS13237 - Rev 5
page 18/38
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
Stability
So the maximum output voltage in worst case condition at ambient temperature is 3.768 V + 0.75 mVRMS instead
of 3.75 V expected. This represents an error on the current reading of about 2.1%. 1% more must be added due
to the shunt accuracy.
It is important to note that this calculus has been done by using all the maximum values and all the error terms
have been added to each other, meaning that the chance of getting 2.1% precision in the above use case is
extremely low and on the whole population, the error is considerably smaller.
6.7
Stability
•
Driving switched capacitive loads
Some ADC get their signal thanks to a sample and hold capacitor. If before a sampling this capacitance is fully
discharged, a fast current load can appear on the output of the TSC21x during the sampling phase.
The scope probe below in Figure 36 shows the output voltage of the TSC213 excited through a 40 pF capacitor
with a 3.3 Vpp signal at 5 kHz to simulate the sample and hold circuit of an ADC.
Figure 36. Capacitive load response at Vcc = 3.3 V
8
800
7
700
6
600
5
500
400
Sample and hold
3
300
2
200
1
100
0
0
-1
-100
Vout
-2
-200
-3
-300
-4
Vcc = 3.3 V, Vicm = 1.65 V, Vsense = 0Vpp
T = 25 °C,
5 kHz square signal of 3.3 V amplitude
injected in the output through 47 pF
-5
-6
-7
-8
-40µ
Vout (mV)
Simulated Sample and Hold (V)
4
-20µ
0
20µ
40µ
60µ
80µ
100µ
120µ
-400
-500
-600
-700
-800
140µ
Time (s)
The graph in Figure 36 shows the behavior of the output of the TSC213 under worst case condition, as for
example, when there is an ADC channel change between two measurements.
If a single channel is used, the change on the sample and hold capacitance is certainly very small, and so the
recovery time is extremely low as described by Figure 37.
DS13237 - Rev 5
page 19/38
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
Stability
Figure 37. Capacitive load response at Vcc = 3.3 V with a step of 100 mV
100
800
700
80
600
Sample and hold
500
60
300
20
Vout
0
200
100
0
-100
-20
-200
Vout (mV)
Simulated Sample and Hold (mV)
400
40
-300
-40
-400
-60
Vcc = 3.3 V, Vicm = 1.65 V, Vsense = 0Vpp
T = 25 °C,
5 kHz square signal of 100mV amplitude
injected in the output through 47 pF
-80
-500
-600
-700
-100
-40µ
-20µ
0
20µ
40µ
60µ
80µ
100µ
120µ
-800
140µ
Time (s)
The effect of the ADC sampling and hold can be easily smoothed thanks to an RC filter. As suggested in the
schematic below in Figure 38. The capacitor of the external filter much be chosen much higher than the internal
ADC capacitor, in order to easily absorb the sudden voltage variation on the output due to the sampling and hold
of the ADC. And the resistance must be chosen according to the application speed of the system in order not to
impact the whole application. The main advantage to using an RC filter is to have an anti-aliasing system. The
ADC used must certainly have sample and hold conversion in accordance with the RC filter value, in order to let
the output recover before sampling.
Figure 38. RC filter when driving ADC
Vcc
100nF
Vref
10nF
+
Shunt
TSC21x
ADC
Ct
Load
-
Rs
In Figure 39 below an Rs = 1.3 kΩ resistance and a Ct = 470 pF capacitance have been set. Given a low pass
filter of 260 kHz and a response time of roughly 1.8 µs.
In Figure 40 below an Rs = 1.3 kΩ resistance and a Ct = 470 pF capacitance have been set. A load resistance of
10 kΩ is added in parallel of the Ct capacitance
DS13237 - Rev 5
page 20/38
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
Stability
Figure 39. Capacitive load response at Vcc = 3.3 V with
260 kHz RC filter
Figure 40. Capacitive load response at Vcc = 3.3 V with
260 kHz RC filter and Rl = 10 kΩ
Special care must be also taken on the value of the added external capacitor. Indeed, if this is chosen with an
excessive value and the serial resistance with a too small value, there is a risk of instability on the output of the
TSC213.
•
Driving large capacitive Cload
Increasing the load capacitance produces gain peaking in the frequency response, with overshoot and
ringing in the step response.
Figure 41 shows the serial resistors that must be added to the output, to make a system stable.
Figure 42 shows that the stability of the TSC213 can be improved when a load of 10k is added on the output
in order to source a small current.
Figure 41. Stability criteria with a serial resistor at
Vcc = 5 V
DS13237 - Rev 5
Figure 42. Stability criteria with a serial resistor and a
Rload = 10 kΩ at Vcc = 5 V
page 21/38
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
Improving precision
6.8
Improving precision
If the TSC21x series current sensing is used with an ADC, it can be interesting to sense the output and the
reference voltage applied on the Ref pin in a differential way as depicted in Figure 43.
There are least two benefits to realizing the measurement in this way.
Firstly, in case of the output common voltage being fixed thanks to the ref pin, done only with a resistor divider,
without any buffer, it can cancel the effect of this external impedance.
And secondly, it cancels the imprecision of the voltage reference source as well, as it serves as reference also for
the ADC.
Figure 43. ADC in differential mode
Vcc
100nF
Vref
+
Shunt
TSC21x
ADC
Ct
Load
-
Rs
6.9
Power supply recommendation
In order to decouple correctly the TSC21x, it is recommended to place a 100 nF bypass capacitor between Vcc
and Gnd. This capacitor must be placed as close as possible of the supply pins.
It is also important to take into consideration the Vref pin which is used to fix the output common mode voltage.
Effectively this pin must be driven by a low impedance voltage source and can be decoupled thanks to a 10 nF
bypass capacitor.
Larger bypass capacitor added on Vcc pin and Vref pin should help to enhance CMRR and PSRR performance.
6.10
PCB layout recommendations
Particular attention must be paid to the layout of the PCB tracks connected to the current sensing, load and power
supply. It is good practice to use short and wide PCB traces to minimize voltage drops and parasitic inductance.
When using shunt resistance lower than 1 Ω, it is important to use a 4-wire connection technique to sense
the current as described in the schematic below. Effectively, this technique allows to separate pairs of current
carrying and voltage-sensing electrodes to make more accurate measurements by eliminating the lead and
contact resistance from the measurement.
It is also important to treat the track connected to the input pin of the TSC21x as a differential pair; it must have
the same length and width, and ideally be placed on the same PCB plane, and above all must be routed as far
as possible from noisy source. As this track carries the input bias current, in a range of hundreds of µA, it can be
designed small but always by taking care of their resistivity. Any via in these input tracks are non-recommended to
avoid any parasitic resistance in this path.
To minimize parasitic impedance over the entire surface, a multi-via technique that connects the bottom and top
layer ground planes together in many locations is often used.
A ground plane generally helps to reduce EMI, which is why it is generally recommended to use a multi-layer
PCB and use the ground planes as a shield to protect the internal track. In this case, pay attention to separate
the digital from the analog ground and avoid any ground loop. To further minimize EMI impact, it is important to
reduce loop area or antenna.
DS13237 - Rev 5
page 22/38
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
EMI rejection ration (EMIRR)
Figure 44 suggests a possible routing for the TSC21x, in order to minimize as much as possible parasitic effect.
Figure 44. Recommended layout
6.11
EMI rejection ration (EMIRR)
The electromagnetic interference (EMI) rejection ratio, or EMIRR, describes the EMI immunity of a current
sensing device. An adverse effect that is common to many current sensings is a change in the offset voltage as a
result of RF signal rectification.
A first order internal low pass filter is included on the input of the TSC21x to minimize susceptibility to EMIRR.
Figure 45 shows the EMIRR on pin IN+, Figure 46 shows the EMIRR on pin IN- of the TSC21x measured from 10
MHz up to 2.4 GHz.
Figure 45. EMIRR on pin+
DS13237 - Rev 5
Figure 46. EMIRR on pin-
page 23/38
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
Filtering input stage
6.12
Filtering input stage
When a current sensing works in a high frequency noisy environment, it is mandatory to correctly filter the input
of the TSC21x device, avoiding any parasitic offset due to the high frequency spikes. Both common mode and
differential mode paths must be filtered. The best scenario is to match the capacitance between them to avoid
adding differential error on the input of the current sensing.
Otherwise, it is important to combine a common mode filter and a differential mode filter to compensate the
mismatch of the capacitance. (Refer to Application note AN4304).
Figure 47. Input filtering
Vcc
Vicm
100nF
Ccm
Vref
10nF
+
Rs
TSC21x
Cdiff
Rshunt
-
Rs
Ccm
The differential voltage error due to the mismatch of the Ccm capacitance can be written:
Vdiff ≅ Vin .
Ccm2 − Ccm1
Rs . ω3 . 2 . Cdiff . Ccm1 + Ccm12
(9)
where ω3 is the input signal frequency.
It is still possible to improve the filtering by increasing the differential capacitance value. The drawback is that the
response time increases.
The TSC21x current sensing family have some trimmed input resistance; any external resistance added in series
produces mismatches leading to both gain and CMR errors, typically calculated as follows (Rin is the specified
amplifier input resistance):
Gain error % = 100 − 100 . RinRin
+ Rs
CMR dB = 20log .
Rs . Rserror% . 2
Rin
(10)
(11)
The internal resistance of the TSC210 is 5 kΩ. Assuming that an external resistor of 100 Ω, with a tolerance of
1%, is used for filtering, the common mode rejection ratio due to these external components is 68 dB. There is a
direct impact on the whole CMR as the TSC210 has a minimum CMR of 105 dB.
The fact that Rs is quite big adds 2%. to the gain error. Therefore, care must be taken when introducing input
filters. The only way to control this additional gain error is to ensure that the input series resistor, Rs, is small
compared to Rin. Using a filter resistor that is less than 10 Ω is strongly recommended.
This ensures that the high original accuracy of the TSC21x is maintained. Other parameters such as process
variation or the temperature coefficient of the resistances must also be taken into consideration as possible
error factors of current measurement. The calculation of total error due to external resistances is detailed in the
application note AN4369.
DS13237 - Rev 5
page 24/38
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
AMR limitation
6.13
AMR limitation
In case of important differential input voltage, a high current above the maximum Iin = 5 mA specified in the AMR
table may appear on the input pins.
As shown in Figure 48, for example, when using the TSC212 current sensing device, a differential input voltage
generates a current thru the input pins defined by:
Iin =
Vdiff
Rin/ / R1 + R2
(12)
If Vdiff = 26 V, the current Iin can rise, up to 23.4 mA
Iin = 26V = 23.4mA
1.1kΩ
(13)
Figure 48. TSC212 with input differential voltage
VCC
1MΩ
R3
Iin
-
R1
1kΩ
Vdiff
Vin+
2.5kΩ
Rin
OUT
+
R2
1kΩ
R4
1MΩ
TSC212
VREF
Therefore, to avoid silicon damage, the input current must be limited to 5 mA.
The differential input voltages should be limited to:
•
Vdiff = +/- 10 V for the TSC210
•
Vdiff = +/- 7.7 V for the TSC211
•
Vdiff = +/- 5.6 V for the TSC212
•
Vdiff = +/- 11.8 V for the TSC213
•
Vdiff = +/- 11.1 V for the TSC214
•
Vdiff = +/- 11.4 V for the TSC215
To match this requirement a serial resistance can be used, but precision would be affected, see
Section 6.12 Filtering input stage.
Alternative methods can be the use of Zener diode or even application restriction.
DS13237 - Rev 5
page 25/38
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
Application example
6.14
Application example
Power supply monitoring and OCP function.
The TSC21x is used to sense the current into the load, and thus in both directions, in a very accurate way.
Figure 49. Power supply monitoring and OCP function
Rshunt
power supply
load
R
Vcc
100nF
Vcc
Vref
Current sensing
10nF
TSC21x
Over current protection
+
Vcc
Vcc
STM32
+
Ref
-
TS3021
Comparator
HCF4013YM013TR
D-latch
Microcontroller
When a short-circuit or overcurrent occurs, the application must be switched off as quickly as possible. And
moreover, after such event, the application must not restart by itself and must stay switched off until a manual
reload is applied. The TS3021 is a high speed comparator, which combined with D flip-flop HCF4013, is used to
realize a latch function in case of an overcurrent event.
In case of overcurrent, the output of the current sensing rises above the Ref voltage and so the output of the
comparator changes from a low state to a high state.
This information is directly latched because of the D flip-flop HCF4013. And after such an event, the output of the
HCF4013 (Q1) changes from high state to a low state.
The (Q1) is also supervised by a GPIO of the MCU, which can be informed in case of an overcurrent event.
To restart the application and un-latch the D flip-flop, a clock signal must be applied on pin CLOCK1 of the
HCF4013.
A first approach calculation by considering a Vcc voltage at 3.3 V.
The current sensing TSC213 has a slew rate of 0.85 V/µs. After an overcurrent event, its output is saturated and
may rise up to its maximum output voltage, here 3.3 V. If we consider the worst case the output of the TSC213 is
close to 0 V, the current sensing would need 3.9 µs to pass from 0 V to 3.3 V, after the overcurrent event.
The comparator TS3021 is a high speed comparator with a propagation delay TPLH of 75 ns max. to change its
state from low to high.
The D flip-flop has a propagation delay TPHL of 400 ns to change its state from high to low.
So after an overcurrent, the system takes, in worst condition, less than 4.4 µs to switch off the power (extra
margin should be taken considering that the propagation delay of the comparator depends on the overdrive).
DS13237 - Rev 5
page 26/38
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
Package information
7
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages,
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product
status are available at: www.st.com. ECOPACK is an ST trademark.
7.1
SC70-6 package information
Figure 50. SC70-6 package outline
Table 7. SC70-6 mechanical data
Symbol
Inches(1)
Milimeters
Min.
Typ.
Max.
Min.
Typ.
Max.
A
0.80
1.10
0.037
0.041
A1
0
0.10
0.000
0.004
A2
0.80
1.00
0.035
0.039
b
0.15
0.30
0.008
0.010
c
0.10
0.18
0.004
0.004
D
1.80
2.20
0.078
0.086
E
1.15
1.35
0.050
0.052
0.025
0.026
e
0.65
HE
1.8
2.4
0.083
0.090
L
0.10
0.40
0.013
0.015
Q1
0.10
0.40
0.011
0.013
1. Values in inches are converted from mm and rounded to 4 decimal digits.
DS13237 - Rev 5
page 27/38
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
SC70-6 package information
Figure 51. SC70-6 recommended footprint
DS13237 - Rev 5
page 28/38
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
QFN10 package information
7.2
QFN10 package information
Figure 52. QFN10 package outline
DS13237 - Rev 5
page 29/38
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
QFN10 package information
Figure 53. QFN10 detail A package outline
Table 8. QFN10 mechanical data
Symbol
mm
Min.
Typ.
A
0.70
0.75
A1
0.0
A3
0.80
0.05
0.203REF
b
0.15
0.20
0.25
D
1.35
1.40
1.45
e
DS13237 - Rev 5
Max.
0.40 BSC
E
1.75
1.80
1.85
L1
0.20
0.30
0.40
L2
0.25
0.35
0.45
L3
0.10
0.20
0.30
page 30/38
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
QFN10 package information
Figure 54. QFN10 recommended footprint
DS13237 - Rev 5
page 31/38
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
Ordering information
8
Ordering information
Table 9. Ordering information
Order code
Gain (V/V)
Temperature range
TSC210ICT
TSC210IYCT(1)
TSC210IQT
TSC212IQT
-40°C to 125°C
TSC215IYQT(1)
O12
O18
O12
Tape and reel
SC70-6
50
QFN10
SC70-6
100
QFN10
TSC215ICT
TSC215IQT
O17
QFN10
TSC214IYQT(1)
TSC215IYCT(1)
O11
1000
TSC214ICT
TSC214IQT
O17
SC70-6
TSC213IYQT(1)
TSC214IYCT(1)
O11
QFN10
TSC213ICT
TSC213IQT
O16
500
TSC212IYQT(1)
TSC213IYCT(1)
O10
SC70-6
TSC212ICT
TSC212IYCT(1)
O16
QFN10
TSC211IYQT(1)
SC70-6
75
QFN10
Marking
O10
200
TSC211ICT
TSC211IQT
Packing
SC70-6
TSC210IYQT(1)
TSC211IYCT(1)
Package
O18
O13
O19
O13
O19
O14
O1A
O14
O1A
O15
O1B
O15
O1B
1. Qualified and characterized according to the AEC Q100 and Q003 or equivalent, advanced screening according to the AEC
Q001 and Q002 or equivalent.
DS13237 - Rev 5
page 32/38
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
Revision history
Table 10. Document revision history
Date
Version
Changes
13-Feb-2020
1
Initial release.
27-Feb-2020
2
Update features in cover page and Section 4 Electrical characteristics.
Added the part numbers: TSC211, TSC214 and TSC215.
24-Nov-2020
3
Updated cover page.
Updated Table 2. Resistors and gain values, Section 4 Electrical
characteristics and Section 7 Ordering information.
DS13237 - Rev 5
29-Mar-2021
4
02-Aug-2021
5
Updated Table 3. Absolute maximum ratings and Section 4 Electrical
characteristics.
Updated Figure 7 and Figure 20
Added new Section 6 Application information.
page 33/38
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
Contents
Contents
1
Pin connections and description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
3
Absolute maximum ratings and operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
4
Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
5
Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
6
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
7
8
6.1
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
6.2
Theory of operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
6.3
Unidirectionnal / bidirectionnal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
6.4
RSENSE selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
6.5
Input offset voltage drift overtemperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
6.6
Error calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
6.7
Stability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6.8
Improving precision. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6.9
Power supply recommendation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6.10
PCB layout recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6.11
EMI rejection ration (EMIRR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
6.12
Filtering input stage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6.13
AMR limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
6.14
Application example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
7.1
SC70-6 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
7.2
QFN10 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
DS13237 - Rev 5
page 34/38
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Pin description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Resistors and gain values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics, T = 25 °C, VSENSE = VIN+- VIN- (unless otherwise specified), TSC210, TSC213, TSC214,
TSC215: VCC= 5 V, VIN+=12 V, VREF= VCC/2 (unless otherwise specified),
TSC211,
TSC212: VCC = 12 V, VIN+ = 12 V, VREF = VCC/2 ( unless otherwise specified). . . . . . . . . . . . . . . . . . . . . . . . . . 5
Gain error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
SC70-6 mechanical data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
QFN10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Ordering information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
DS13237 - Rev 5
page 35/38
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
Figure 37.
Figure 38.
Figure 39.
Figure 40.
Figure 41.
Figure 42.
Figure 43.
Figure 44.
Figure 45.
Figure 46.
Figure 47.
Figure 48.
Figure 49.
Figure 50.
Figure 51.
DS13237 - Rev 5
Pin connections (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input offset voltage production distribution . . . . . . . . . . . . . . . . . . . . . . . . . .
Input offset voltage vs. temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Common-mode rejection ratio production distribution. . . . . . . . . . . . . . . . . . .
Common mode rejection ratio vs. temperature . . . . . . . . . . . . . . . . . . . . . . .
Gain vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power supply rejection ratio vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . .
Common mode rejection ratio vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . .
Positive output voltage swing vs. output current VCC = 2.7 V . . . . . . . . . . . . .
Negative output voltage swing vs. output current VCC = 2.7 V . . . . . . . . . . . . .
Positive output voltage swing vs. output current VCC = 5 V . . . . . . . . . . . . . . .
Negative output voltage swing vs. output current VCC = 5 V . . . . . . . . . . . . . .
Positive output voltage swing vs. output current VCC = 26 V . . . . . . . . . . . . . .
Negative output voltage swing vs. output current VCC = 26 V . . . . . . . . . . . . .
Input bias current vs. input common mode voltage with supply voltage = 5 V . .
Input bias current vs. input common mode voltage with supply voltage = 0 V . .
Input bias current vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Quiescent current vs. temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input referred noise vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
0.1 Hz to 10 Hz voltage noise (referred to input) . . . . . . . . . . . . . . . . . . . . . .
Step response (10-mVpp input step) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Common mode voltage transient response. . . . . . . . . . . . . . . . . . . . . . . . . .
Inverting differential input overloaded . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Non inverting differential input overload . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Start-up response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Brownout recovery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power supply when Vicm > 2.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input bias current vs. common mode voltage Vcc = 5 V . . . . . . . . . . . . . . . . .
Vref powered by an external voltage source with a TSC210 . . . . . . . . . . . . . .
Output reference to ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output reference to Vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
External supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Shunt resistor value trade-off (TSC213) . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Capacitive load response at Vcc = 3.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Capacitive load response at Vcc = 3.3 V with a step of 100 mV . . . . . . . . . . . .
RC filter when driving ADC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Capacitive load response at Vcc = 3.3 V with 260 kHz RC filter . . . . . . . . . . . .
Capacitive load response at Vcc = 3.3 V with 260 kHz RC filter and Rl = 10 kΩ .
Stability criteria with a serial resistor at Vcc = 5 V. . . . . . . . . . . . . . . . . . . . . .
Stability criteria with a serial resistor and a Rload = 10 kΩ at Vcc = 5 V . . . . . . .
ADC in differential mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Recommended layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
EMIRR on pin+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
EMIRR on pin- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input filtering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TSC212 with input differential voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power supply monitoring and OCP function . . . . . . . . . . . . . . . . . . . . . . . . .
SC70-6 package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SC70-6 recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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page 36/38
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
List of figures
Figure 52.
Figure 53.
Figure 54.
DS13237 - Rev 5
QFN10 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
QFN10 detail A package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
QFN10 recommended footprint. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
page 37/38
TSC210, TSC211, TSC212, TSC213, TSC214, TSC215
IMPORTANT NOTICE – PLEASE READ CAREFULLY
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DS13237 - Rev 5
page 38/38
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