TSH150ID

TSH150 WIDE BANDWIDTH AND BIPOLAR INPUTS SINGLE OPERATIONAL AMPLIFIER ■ ■ ■ ■ ■ LOW DISTORTION GAIN BANDWIDTH PRODUCT : 150MHz UNITY GAIN STABLE ) s t( SLEW RATE : 190V/µs VERY FAST SETTLING TIME : 20ns (0.1%) c u d DESCRIPTION D SO8 (Plastic Micropackage) The TSH150 is a wideband monolithic operational amplifier, internally compensated for unity-gain stability. Low noise and low distortion, wide bandwidth and high linearity make this amplifier suitable for RF and video applications. Short circuit protection is provided by an internal current-limiting circuit. t c u ORDER CODE Part Number TSH150I od Package Temperature Range Pr c u d -40°C, +125°C e t e l o r o s P b e t O e l o s b O ) s t( D ) s t( c u d o r PIN CONNECTIONS (top view) o s b -O The TSH150 has internal electrostatic discharge (ESD) protection circuits and fulfills MILSTD883C-Class2. (s) e t le o r P -O l o bs P e et Offset Null 1 1 8 Inverting Input 2 7 VCC+ Non-inverting Input 3 6 Output 4 5 N.C. V CC Offset Null 2 • D = Small Outline Package (SO) - also available in Tape & Reel (DT) October 2000 1/6 TSH150 SCHEMATIC DIAGRAM 7 VCC + Internal Vref non inverting input 3 6 output Cc 2 ) s t( inverting input 1 Offset N1 8 Offset N2 4 VCC- e t le INPUT OFFSET VOLTAGE NULL CIRCUIT o s b TSH150 (s) N2 N1 t c u 100kW od V CC r P e let so VCC Vid o r eP Supply Voltage ) s t( c u d o r P e et O ) Parameter Ob let o s Ob Vi l o bs o r P s ( t c u d MAXIMUM RATINGS Symbol -O c u d Differential Input Voltage Input Voltage Value Unit ±7 V ±5 V ±5 V Toper Current On Inputs Current On Offset Null Pins Operating Free-Air Temperature range ±50 ±20 -40 to +125 °C Tstg Storage Temperature Range -65 to +150 °C Value Unit Iin V OPERATING CONDITIONS Symbol VCC Vic 2/6 Parameter Supply Voltage Common Mode Input Voltage Range ±3 to ±6 - V + -1 VCC +2 to VCC V TSH150 ELECTRICAL CHARACTERISTICS VCC = ±5V, Tamb = 25°C (unless otherwise specified) Symbol Parameter Min. Typ. Max. Unit 0.3 5 7 mV Vio Input Offset Voltage Tmin. ≤ Tamb ≤ Tmax DVio Input Offset Voltage Drift Tmin. ≤ Tamb ≤ Tmax. 10 Iib Input Bias Current. 5 30 µA Iio Input Offset Current. 0.1 2 µA 23 21 25 30 28 40 32 µV/°C Supply Current, no load VCC = VCC = VCC = VCC = ICC Tmin. ≤ Tamb ≤ Tmax ±5V ±3V ±6V ±5V Avd Large Signal Voltage Gain Vo = ±2.5V RL = ∝ RL = 100Ω RL = 50Ω Vicm CMR Input Common Mode Voltage Range Common-mode Rejection Ratio Vic = Vicm min. SVR Supply Voltage Rejection Ratio VCC = ±5V to ±3V Tmin. ≤ Tamb ≤ Tmax Io RL = 100Ω RL = 50Ω ±2.8 ) (s t c u od Pr c u d Equivalent Input Voltage Noise Rs = 50Ω so e t e l o r eP Ob let o s Ob Kov ±3 l o bs RL = 100Ω RL = 50Ω O ) t(s Slew Rate Vin = ±2V, AVCL = 1, RL = 100Ω, CL = 15pF SR en s b O Output Short Circuit Current Vid = ±1V, Vo = 0V Gain Bandwidth Product AVCL = 100, RL = 100Ω, CL = 15pF, f = 7.5MHz GBP r P e t e l o Output Voltage Vo 1300 850 650 -3 to +4 50 fo = 1kHz fo = 1k0Hz fo = 100kHz fo = 1MHz Overshoot Vin = ±2V, AVCL = 1, RL = 100Ω, CL = 15pF ±2.9 ±2.7 ±50 -3.5 to +4.5 70 P e et +3.5 -3.7 +3.3 -3.5 ±100 190 7 6.5 6.2 5.5 5 20 Rise and Fall Time (see note 1) Vin = ±100mV, AVCL = 2 3.5 Delay Time (see note 1) Vin = ±100mV, AVCL = 2 2.5 φm Phase Margin AVM = 1, RL = 100Ω, CL = 15pF 50 THD Total Harmonic Distortion AVCL = 10, f = 1kHz, Vo = ±2.5V, no load 0.02 FPB Full Power Bandwidth 2) Vo = 5Vpp, RL = 100Ω Vo = 2Vpp, RL = 100Ω tr, tf td 1. See test waveform figure 2. Full power bandwidth = ) s t( V dB dB V mA MHz V/µs nV/√Hz % 1) Settling Time 0.1% Vin = ±1V, AVCL = -1 ts V/V c u d o r 100 150 100 t c u mA od 800 300 200 60 ) s ( 12 30 ns ns ns Degrees % MHz SR -------------------Π V opp 3/6 TSH150 TEST WAVEFORM EVALUATION CIRCUIT +5V 10µF 50Ω ts 10nF 0.1% of edge amplitude Input 50Ω Output 90% 1kΩ 50% td 10nF tr -5V 10µF 1kΩ CF e t le o s b PRINTED CIRCUIT LAYOUT As for any high frequency device, a few rules must be observed when designing the PCB to get the best performances from this high speed op amp. From the most to the least important points : ❑ Each power supply lead has to be bypassed to ground with a 10nF ceramic capacitor very close to the device and a 10µF tantalum capacitor. ❑ To provide low inductance and low resistance common return, use a ground plane or common point return for power and signal. ❑ All leads must be wide and as short as possible especially for op amp inputs. This is in (s) t c u -O d ) o r s ( t P c e u t d e l o r o s P b e t O e l o s b O 4/6 ) s t( 10% Vin ❑ -O ❑ ❑ P e et c u d o r ) s t( order to decrease parasitic capacitance and inductance. Use small resistor values to decrease time constant with parasitic capacitance. Choose component sizes as small as possible (SMD). On output, decrease capacitor load so as to avoid circuit stability being degraded which may cause oscillation. You can also add a serial resistor in order to minimise its influence. One can add in parallel with feedback resistor a few pF ceramic capacitor CF adjusted to optimize the settling time. l o bs ❑ o r P c u d TSH150 MACROMODEL Applies to: TSH150I ** Standard Linear Ics Macromodels, 1993. ** CONNECTIONS : * 1 INVERTING INPUT * 2 NON-INVERTING INPUT * 3 OUTPUT * 4 POSITIVEPOWER SUPPLY * 5 NEGATIVE POWER SUPPLY .SUBCKT TSH150 1 3 2 4 5 (analog) ******************************************************** .MODEL MDTH D IS=1E-8 KF=1.568191E-15 CJO=10F * INPUT STAGE CIP 2 5 1.000000E-12 CIN 1 5 1.000000E-12 EIP 10 5 2 5 1 EIN 16 5 1 5 1 RIP 10 11 1.040000E+02 RIN 15 16 1.040000E+02 RIS 11 15 3.264539E+02 DIP 11 12 MDTH 400E-12 DIN 15 14 MDTH 400E-12 VOFP 12 13 DC -9.162265E-05 VOFN 13 14 DC 0 IPOL 13 5 1.000000E-03 CPS 11 15 5.757255E-12 DINN 17 13 MDTH 400E-12 VIN 17 5 1.5000000e+00 od t c u r P e t e l o e t le o s b l o bs o r P ) s t( c u d o r P e et O ) s ( t c u d o r eP ) s t( c u d -O (s) DINR 15 18 MDTH 400E-12 VIP 4 18 0.500000E+00 FCP 4 5 VOFP 2.200000E+01 FCN 5 4 VOFN 2.200000E+01 FIBP 2 5 VOFP 1.000000E-02 FIBN 5 1 VOFN 1.000000E-02 * AMPLIFYING STAGE FIP 5 19 VOFP 4.370000E+02 FIN 5 19 VOFN 4.370000E+02 RG1 19 5 1.124121E+03 RG2 19 4 1.124121E+03 CC 19 29 2.000000E-09 HZTP 30 29 VOFP 5.574976E+01 HZTN 5 30 VOFN 5.574976E+01 DOPM 19 22 MDTH 400E-12 DONM 21 19 MDTH 400E-12 HOPM 22 28 VOUT 5.000000E+02 VIPM 28 4 5.000000E+01 HONM 21 27 VOUT 5.000000E+02 VINM 5 27 5.000000E+01 EOUT 26 23 19 5 1 VOUT 23 5 0 ROUT 26 3 2.180423E+01 COUT 3 5 1.000000E-12 DOP 19 25 MDTH 400E-12 VOP 4 25 1.511965E+00 DON 24 19 MDTH 400E-12 VON 24 5 1.511965E+00 .ENDS ELECTRICAL CHARACTERISTICS VCC = ±5V, Tamb = 25°C (unless otherwise specificed) s b t O e l o s b O Symbol Vio Conditions Value Unit 0 mV Avd RL = 100Ω 1 V/mV ICC No load 21 mA -3.5 to 4.5 V Vicm VOH RL = 100Ω +3.6 V VOL RL = 100Ω -3.6 V mA Isink Vo = 0V 108 Isource Vo = 0V 108 mA GBP RL = 100Ω, CL = 15pF 147 MHz SR RL = 100Ω, CL = 15pF 180 V/µs φm RL = 100Ω, CL = 15pF 42 Degrees 22.6 ns ts Av = -1 at 0.1% 5/6 TSH150 PACKAGE MECHANICAL DATA 8 PINS - PLASTIC MICROPACKAGE (SO) ) s t( c u d e t le o s b -O Millimeters Dim. (s) Min. A a1 a2 a3 b b1 C c1 D E e e3 F L M S Typ. t c u 0.1 od 0.65 0.35 0.19 0.25 t e l o r P e s b t O e l o s b O 3.8 0.4 c u d o r P e et Min. O ) s ( t c u d o r eP 4.8 5.8 1.75 0.25 1.65 0.85 0.48 0.25 0.5 ) s t( Inches l o bs Max. o r P Typ. Max. 0.026 0.014 0.007 0.010 0.069 0.010 0.065 0.033 0.019 0.010 0.020 0.189 0.228 0.197 0.244 0.004 45° (typ.) 5.0 6.2 1.27 3.81 0.050 0.150 4.0 1.27 0.6 0.150 0.016 0.157 0.050 0.024 8° (max.) Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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