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TSV622AILT

TSV622AILT

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    SOT23-8

  • 描述:

    ICOPAMPGP420KHZRROSOT23-8

  • 数据手册
  • 价格&库存
TSV622AILT 数据手册
TSV62x, TSV62xA Rail-to-rail input/output, 29 µA, 420 kHz CMOS operational amplifiers Datasheet - production data Applications • Battery-powered applications • Portable devices • Signal conditioning SO8 • Active filtering • Medical instrumentation Description MiniSO8/MiniSO10 TSSOP14 The TSV622, TSV622A, TSV623, TSV623A, TSV624, TSV624A, TSV625, and TSV625A dual and quad operational amplifiers offer low voltage, low power operation, and rail-to-rail input and output. The TSV62x/TSV62xA series feature an excellent speed/power consumption ratio, offering a 420 kHz gain bandwidth product while consuming only 29 µA at 5 V supply voltage. TSSOP16 Features • Rail-to-rail input and output • Low power consumption: 29 µA typ, 36 µA max • Low supply voltage: 1.5 – 5.5 V These op-amps are unity gain stable for capacitive loads up to 100 pF. They also feature an ultra-low input bias current and low input offset voltage. TSV623 (dual) and TSV625 (quad) have two shutdown pins to reduce power consumption. These features make the TSV62x/TSV62xA family ideal for sensor interfaces, battery-supplied and portable applications, and active filtering. • Gain bandwidth product: 420 kHz typ • Unity gain stable on 100 pF capacitor • Low power shutdown mode: 5 nA typ Table 1. • Good accuracy: 800 µV max (A version) • Low input bias current: 1 pA typ Device summary Dual version Quad version • EMI hardened operational amplifiers Reference Related products TSV62x TSV622 TSV623 TSV624 TSV625 TSV62xA TSV622A TSV623A TSV624A TSV625A • See the TSV61x series for more power savings (120 kHz for 9 μA) Without With Without With standby standby standby standby • See the TSV63x series for higher gain bandwidth (880 kHz for 60 μA) May 2017 This is information on a product in full production. DocID15689 Rev 6 1/24 www.st.com Contents TSV62x, TSV62xA Contents 1 Package pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 4 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5 4.1 Operating voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.2 Rail-to-rail input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.3 Rail-to-rail output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.4 Optimization of DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.5 Shutdown function (TSV623, TSV625) . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.6 Driving resistive and capacitive loads . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.7 PCB layouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.8 Macromodel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.1 SO8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.2 MiniSO8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.3 MiniSO10 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5.4 TSSOP14 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 5.5 TSSOP16 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 6 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 2/24 DocID15689 Rev 6 TSV62x, TSV62xA 1 Package pin connections Package pin connections Figure 1. Pin connections for each package (top view) Out1 1 In1- 2 _ In1+ 3 + VCC- 4 Out1 1 10 VCC+ 8 VCC+ In1- 2 _ 7 Out2 In1+ 3 + _ 6 In2- 4 + VCC- 5 In2+ SHDN1 5 Out1 14 Out4 Out1 1 In1- 2 _ _ 13 In4- In1+ 3 + + 12 In4+ VCC+ 4 _ 8 In2- + 7 In2+ 6 SHDN2 In2+ 5 In2- 6 Out2 7 2 _ 15 In4- In1+ 3 + + 14 In4+ VCC+ 4 In2+ 5 In2- 6 Out2 7 10 Out3 SHDN1/2 8 9 In1- 10 In3+ 9 In3- 8 Out3 16 Out4 1 _ 11 VCC+ _ Out2 TSV623 MiniSO10 TSV622 SO8/MiniSO8 + _ 9 13 VCC+ _ + _ 12 In3+ 11 In3- SHDN3/4 TSV625 TSSOP16 TSV624 TSSOP14 DocID15689 Rev 6 3/24 24 Absolute maximum ratings and operating conditions 2 TSV62x, TSV62xA Absolute maximum ratings and operating conditions Table 2. Absolute maximum ratings (AMR) Symbol VCC Vid Vin Iin SHDN Tstg Rthja Tj Parameter Supply voltage Differential input voltage Input voltage (3) Input current (4) Unit 6 (2) ±VCC V (VCC-) - 0.2 to (VCC+) + 0.2 Shutdown voltage (3) 10 mA (VCC-) - 0.2 to (VCC+) + 0.2 V -65 to 150 °C Storage temperature Thermal resistance junction to ambient MiniSO8 SO8 MiniSO10 TSSOP14 TSSOP16 (5) (6) 190 125 113 100 95 Maximum junction temperature HBM: human body model ESD Value (1) MM: machine model (7) (8) CDM: charged device model (9) Latch-up immunity °C/W 150 °C 4 kV 200 V 1.5 kV 200 mA 1. All voltage values, except differential voltages are with respect to network ground terminal. 2. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal. 3. VCC-Vin must not exceed 6 V, Vin must not exceed 6V. 4. Input current must be limited by a resistor in series with the inputs. 5. Short-circuits can cause excessive heating and destructive dissipation. 6. Rth are typical values. 7. Human body model: 100 pF discharged through a 1.5 kΩ resistor between two pins of the device, done for all couples of pin combinations with other pins floating. 8. Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 Ω), done for all couples of pin combinations with other pins floating. 9. Charged device model: all pins plus package are charged together to the specified voltage and then discharged directly to ground. Table 3. Operating conditions Symbol 4/24 Parameter VCC Supply voltage Vicm Common mode input voltage range Toper Operating free air temperature range Value 1.5 to 5.5 DocID15689 Rev 6 (VCC-) - 0.1 to (VCC+) + 0.1 -40 to 125 Unit V °C TSV62x, TSV62xA Electrical characteristics 3 Electrical characteristics Table 4. Electrical characteristics at VCC+ = 1.8 V with VCC- = 0 V, Vicm = VCC/2, Tamb = 25 °C, and RL connected to VCC/2 (unless otherwise specified) Symbol Parameter Conditions Min. Typ. Max. Unit DC performance Vio ΔVio/ΔT Offset voltage 4 0.8 1 TSV62x -Tmin < Top < Tmax TSV62xA - Tmin < Top < Tmax TSV623AIST - Tmin < Top < Tmax 6 2 2.2 Input offset voltage drift Iio Input offset current (Vout = VCC/2) Iib Input bias current (Vout = VCC/2) CMR TSV62x TSV62xA TSV623AIST - MiniSO10 Common mode rejection ratio 20 log (ΔVic/ΔVio) μV/°C 2 1 Tmin < Top < Tmax Tmin < Top < Tmax 0 V to 1.8 V, Vout = 0.9 V 53 Tmin < Top < Tmax 51 RL= 10 kΩ, Vout= 0.5 V to 1.3 V 78 Tmin < Top < Tmax 73 10 (1) 1 100 1 10 (1) 1 100 dB 95 Large signal voltage gain VOH High level output voltage (VOH = VCC - Vout) RL = 10 kΩ Tmin < Top < Tmax 5 35 50 Low level output voltage RL = 10 kΩ Tmin < Top < Tmax 4 35 50 Isink Iout Isource ICC Supply current (per operator) Vout = 1.8 V 6 Tmin < Top < Tmax 4 Vout = 0 V 6 Tmin < Top < Tmax 4 No load, Vout =VCC/2 pA 74 Avd VOL mV mV 12 mA 10 25 Tmin < Top < Tmax 31 33 µA AC performance GBP Gain bandwidth product Fu Unity gain frequency φm Phase margin Gm Gain margin SR Slew rate RL = 10 kΩ, CL = 100 pF, f = 100 kHz 275 340 280 RL = 10 kΩ, CL = 100 pF, RL = 10 kΩ, CL = 100 pF, Av=1 0.1 kHz 41 Degrees 8 dB 0.155 V/μs 1. Guaranteed by design. DocID15689 Rev 6 5/24 24 Electrical characteristics TSV62x, TSV62xA Table 5. Shutdown characteristics VCC = 1.8 V (TSV623, TSV625) Symbol Parameter Conditions Min. Typ. Max. 2.5 50 Unit DC performance ICC Supply current in shutdown mode (all operators) SHDN = VCCTmin < Top < 85 °C 200 Tmin < Top < 125° C 1.5 ton Amplifier turn-on time RL = 5 k, Vout = (VCC-) to (VCC-) + 0.2 V 200 toff Amplifier turn-off time RL = 2 k, Vout = (VCC+) - 0.5 V to (VCC+) - 0.7 V 20 VIH SHDN logic high VIL SHDN logic low IIH SHDN current high SHDN = VCC+ 10 IIL SHDN current low SHDN = VCC- 10 Output leakage in shutdown mode SHDN = VCC- 50 Tmin < Top < 125 °C 1 IOLeak 6/24 µA ns 1.35 0.6 DocID15689 Rev 6 nA V pA nA TSV62x, TSV62xA Electrical characteristics Table 6. Electrical characteristics at VCC+ = 3.3 V with VCC- = 0 V, Vicm = VCC/2, Tamb = 25 °C, and RL connected to VCC/2 (unless otherwise specified) Symbol Parameter Conditions Min. Typ. Max. Unit DC performance Vio ΔVio/ΔT Iio Iib CMR Offset voltage TSV62x TSV62xA TSV623AIST - MiniSO10 4 0.8 1 TSV62x -Tmin < Top < Tmax TSV62xA - Tmin < Top < Tmax TSV623AIST - Tmin < Top < Tmax 6 2 2.2 Input offset voltage drift 1 Tmin < Top < Tmax Input bias current Common mode rejection ratio 20 log (ΔVic/ΔVio) μV/°C 2 Input offset current Tmin < Top < Tmax 0 V to 3.3 V, Vout = 1.65 V 57 Tmin < Top < Tmax 53 RL=10 kΩ, Vout = 0.5 V to 2.8 V 81 Tmin < Top < Tmax 76 10 (1) 1 100 1 10 (1) 1 100 dB 98 Large signal voltage gain VOH High level output voltage (VOH = VCC - Vout) RL = 10 kΩ Tmin < Top < Tmax 5 35 50 VOL Low level output voltage RL = 10 kΩ Tmin < Top < Tmax 4 35 50 Iout Isource ICC Supply current (per operator) Vo = 5 V 23 Tmin < Top < Tmax 20 Vo = 0 V 23 Tmin < Top < Tmax 20 No load, Vout = 2.5 V pA 79 Avd Isink mV mV 45 mA 38 26 Tmin < Top < Tmax 33 35 µA AC performance GBP Gain bandwidth product Fu Unity gain frequency φm Phase margin Gm Gain margin SR Slew rate RL = 10 kΩ, CL = 100 pF, f = 100 kHz 310 380 310 RL = 10 kΩ, CL = 100 pF RL = 10 kΩ, CL = 100 pF, AV = 1 0.11 kHz 41 Degrees 8 dB 0.175 V/μs 1. Guaranteed by design. DocID15689 Rev 6 7/24 24 Electrical characteristics TSV62x, TSV62xA Table 7. Electrical characteristics at VCC+ = 5 V with VCC- = 0 V, Vicm = VCC/2, Tamb = 25 °C, and RL connected to VCC/2 (unless otherwise specified) Symbol Parameter Conditions Min. Typ. Max. Unit DC performance Vio ΔVio/ΔT Iio Iib Offset voltage Input offset current Input bias current 1 Tmin < Top < Tmax Tmin < Top < Tmax 55 RL=10 kΩ, Vout = 0.5 V to 4.5 V 85 Tmin < Top < Tmax 80 Supply voltage rejection ratio VCC = 1.8 to 5 V 20 log (ΔVCC/ΔVio) Tmin < Top < Tmax 75 SVR EMI rejection ratio EMIRR = -20 log (VRFpeak/ΔVio) High level output voltage (VOH = VCC - Vout) Low level output voltage Isink Iout Isource Supply current (per operator) 10 (1) 1 100 1 10 (1) 1 100 pA 80 98 102 dB 73 VRF = 100 mVrms, f = 400 MHz 61 VRF = 100 mVrms, f = 900 MHz 85 VRF = 100 mVrms, f = 1800 MHz 92 VRF = 100 mVrms, f = 2400 MHz 83 RL = 10 kΩ 7 Tmin < Top < Tmax 35 50 RL = 10 kΩ mV μV/°C 2 Tmin < Top < Tmax Large signal voltage gain ICC 6 2 2.2 60 Avd VOL TSV62x - Tmin < Top < Tmax TSV62xA - Tmin < Top < Tmax TSV62xA - Tmin < Top < Tmax 0 V to 5 V, Vout = 2.5 V Common mode rejection ratio 20 log (ΔVic/ΔVio) VOH 4 0.8 1 Input offset voltage drift CMR EMIRR TSV62x TSV62xA TSV623AIST - MiniSO10 6 Tmin < Top < Tmax 35 mV 50 Vo = 5 V 40 Tmin < Top < Tmax 35 Vo = 0 V 40 Tmin < Top < Tmax 35 No load, Vout = 2.5 V 69 mA 74 29 Tmin < Top < Tmax 36 38 µA AC performance GBP Fu 8/24 Gain bandwidth product RL = 10 kΩ, CL = 100 pF, f = 100 kHz Unity gain frequency RL = 10 kΩ, CL = 100 pF DocID15689 Rev 6 350 420 360 kHz TSV62x, TSV62xA Electrical characteristics Table 7. Electrical characteristics at VCC+ = 5 V with VCC- = 0 V, Vicm = VCC/2, Tamb = 25 °C, and RL connected to VCC/2 (unless otherwise specified) (continued) Symbol Parameter Conditions φm Phase margin Gm Gain margin SR Slew rate RL = 10 kΩ, CL = 100 pF, AV = 1 en Equivalent input noise voltage f = 1 kHz Total harmonic distortion + noise Av = 1, f = 1 kHz, RL= 100 kΩ, Vicm = Vcc/2, Vout = 2 Vpp THD+en Min. RL = 10 kΩ, CL = 100 pF 0.12 Typ. Max. Unit 40 Degrees 8 dB 0.19 V/μs 77 nV -----------Hz 0.002 % 1. Guaranteed by design. Table 8. Shutdown characteristics at VCC = 5 V (TSV623, TSV625) Symbol Parameter Conditions Min. Typ. Max. 5 50 Unit DC performance ICC Supply current in shutdown mode (all operators) SHDN = VIL Tmin < Top < 85 °C 200 Tmin < Top < 125 °C 1.5 Amplifier turn-on time RL = 5 kΩ, Vout = (VCC-) to (VCC-) + 0.2 V 200 toff Amplifier turn-off time RL = 5 kΩ, Vout = (VCC+) - 0.5 V to (VCC+) - 0.7 V 20 VIH SHDN logic high VIL SHDN logic low IIH SHDN current high SHDN = VCC+ 10 IIL SHDN current low SHDN = VCC- 10 ton IOLeak 0.8 DocID15689 Rev 6 µA ns 2 Output leakage in shutdown SHDN = VCCmode Tmin < Top < 125 °C nA V pA 50 1 nA 9/24 24 Electrical characteristics TSV62x, TSV62xA Figure 2. Supply current vs. supply voltage at Vicm = VCC/2 Figure 3. Output current vs. output voltage at VCC = 1.5 V Figure 4. Output current vs. output voltage at VCC = 5 V Figure 5. Voltage gain and phase vs. frequency at Vcc = 1.5 V Ω Figure 6. Voltage gain and phase vs. frequency at VCC = 5 V Figure 7. Phase margin vs. output current at VCC = 1.5 V and VCC = 5 V Ω 10/24 DocID15689 Rev 6 TSV62x, TSV62xA Electrical characteristics Figure 8. Positive slew rate vs. time Figure 9. Negative slew rate vs. time Figure 10. Positive slew rate vs. supply voltage Figure 11. Negative slew rate vs. supply voltage Ω Figure 13. Distortion + noise vs. frequency 1 Vcc=1.5V Rl=10kΩ Vicm=2.5V THD + N (%) Input equivalent noise density (nV/VHz) Figure 12. Noise vs. frequency Vicm=4.5V Vcc=1.5V Rl=100kΩ 0.1 0.01 Ω Ω Vcc=5V T=25 C 1E-3 10 100 1000 10000 100000 Frequency (Hz) DocID15689 Rev 6 11/24 24 Electrical characteristics TSV62x, TSV62xA Figure 14. Distortion + noise vs. output voltage Figure 15. EMIRR vs. frequency at VCC = 5 V, T = 25 °C 120 f=1kHz Gain=1 BW=22kHz Vicm=Vcc/2 100 EMIRR Vpeak (dB) THD + N (%) Vcc=1.5V Rl=10kohms Vcc=1.5V Rl=100kohms 80 60 40 Vcc=5.5V Rl=10kohms Vcc=5.5V Rl=100kohms 20 0 1 10 Output Voltage (Vpp) 12/24 DocID15689 Rev 6 2 10 3 10 TSV62x, TSV62xA Application information 4 Application information 4.1 Operating voltages The TSV62x/TSV62xA can operate from 1.5 to 5.5 V. Parameters are fully specified for 1.8, 3.3-, and 5-V power supplies. However, the parameters are very stable in the full VCC range and several characterization curves show the TSV62x/TSV62xA characteristics at 1.5 V. Additionally, the main specifications are guaranteed in extended temperature ranges from -40 °C to 125 °C. 4.2 Rail-to-rail input The TSV62x/TSV62xA is built with two complementary PMOS and NMOS input differential pairs. The device has a rail-to-rail input, and the input common mode range is extended from (VCC-) - 0.1 V to (VCC+) + 0.1 V. The transition between the two pairs appears at (VCC+) - 0.7 V. In the transition region, the performance of CMRR, PSRR, Vio (Figure 16 and Figure 17) and THD is slightly degraded. Figure 16. Input offset voltage vs input common Figure 17. Input offset voltage vs input common mode at VCC = 1.5 V mode at VCC = 5 V The devices are guaranteed without phase reversal. 4.3 Rail-to-rail output The operational amplifier’s output level can go close to the rails: 35 mV maximum above and below the rail when connected to a 10 kΩ resistive load to VCC/2. DocID15689 Rev 6 13/24 24 Application information 4.4 TSV62x, TSV62xA Optimization of DC and AC parameters These operational amplifiers use an innovative approach to reduce the spread of the main DC and AC parameters. An internal adjustment achieves a very narrow spread of current consumption (29 µA typical, min/max at ±17%). Parameters linked to the current consumption value, such as GBP, SR and AVd benefit from this narrow dispersion. All parts present a similar speed and the same behavior in terms of stability. In addition, the minimum values of GBP and SR are guaranteed (GBP = 350 kHz min, SR = 0.12 V/µs min). 4.5 Shutdown function (TSV623, TSV625) The operational amplifier is enabled when the SHDN pin is pulled high. To disable the amplifier, the SHDN must be pulled down to VCC-. When in shutdown mode, the amplifier output is in a high impedance state. The SHDN pin must never be left floating but tied to VCC+ or VCC-. The turn-on and turn-off times are calculated for an output variation of ±200 mV (Figure 18 and Figure 19 show the test configurations). Figure 20 and Figure 21 show output voltage behavior when the SHDN pin is toggled. Figure 18. Test configuration for turn-on time (Vout pulled down) 9 Figure 19. Test configuration for turn-off time (Vout pulled down) 9 *1' *1' NŸ NŸ 9 9   '87 '87    9  9 *$06&% *$06&% Figure 20. Turn-on time, VCC = ±2.5 V, Vout pulled down, T = 25 °C Figure 21. Turn-off time, VCC = ±2.5 V, Vout pulled down, T = 25 °C S hutdown puls e Output voltage (V ) V oltage (V ) V out Vcc = ±2.5 V T = 25 °C V out Vcc = ±2.5 V T = 25 °C R L connected to G N D T ime(µ s ) T ime( µs ) 14/24 S hutdown pulse DocID15689 Rev 6 TSV62x, TSV62xA 4.6 Application information Driving resistive and capacitive loads These products are micro-power, low-voltage operational amplifiers optimized to drive rather large resistive loads, above 5 kΩ. For lower resistive loads, the THD level may significantly increase. In a follower configuration, these operational amplifiers can drive capacitive loads up to 100 pF with no oscillations. When driving larger capacitive loads, adding a small resistor in series at the output can improve the stability of the device (see Figure 22 for recommended in-series resistor values). Once the value of the in-series resistor has been selected, the stability of the circuit should be tested on bench and simulated with the simulation model. Figure 22. In-series resistor vs. capacitive load 4.7 PCB layouts For correct operation, it is advised to add 10 nF decoupling capacitors as close as possible to the power supply pins. 4.8 Macromodel Two accurate macromodels (with or without shutdown feature) of TSV62x/TSV62xA are available on STMicroelectronics’ web site at www.st.com. This model is a trade-off between accuracy and complexity (that is, time simulation) of the TSV62x/TSV62xA operational amplifiers. It emulates the nominal performances of a typical device within the specified operating conditions mentioned in the datasheet. It helps to validate a design approach and to select the right operational amplifier, but it does not replace on-board measurements. DocID15689 Rev 6 15/24 24 Package information 5 TSV62x, TSV62xA Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 16/24 DocID15689 Rev 6 TSV62x, TSV62xA 5.1 Package information SO8 package information Figure 23. SO8 package outline Table 9. SO8 mechanical data Dimensions Ref. Millimeters Min. Typ. A Inches Max. Min. Typ. 1.75 0.069 A1 0.10 A2 1.25 b 0.28 0.48 0.011 0.019 c 0.17 0.23 0.007 0.010 D 4.80 4.90 5.00 0.189 0.193 0.197 E 5.80 6.00 6.20 0.228 0.236 0.244 E1 3.80 3.90 4.00 0.150 0.154 0.157 e 0.25 Max. 0.004 0.010 0.049 1.27 0.050 h 0.25 0.50 0.010 0.020 L 0.40 1.27 0.016 0.050 L1 k ccc 1.04 0 0.040 8° 0.10 DocID15689 Rev 6 1° 8° 0.004 17/24 24 Package information 5.2 TSV62x, TSV62xA MiniSO8 package information Figure 24. MiniSO8 package outline Table 10. MiniSO8 mechanical data Dimensions Ref. Millimeters Min. Typ. A Max. Min. Typ. 1.1 A1 0 A2 0.75 b Max. 0.043 0.15 0 0.95 0.030 0.22 0.40 0.009 0.016 c 0.08 0.23 0.003 0.009 D 2.80 3.00 3.20 0.11 0.118 0.126 E 4.65 4.90 5.15 0.183 0.193 0.203 E1 2.80 3.00 3.10 0.11 0.118 0.122 e L 0.85 0.65 0.40 0.60 0.006 0.033 0.80 0.016 0.024 0.95 0.037 L2 0.25 0.010 ccc 0° 0.037 0.026 L1 k 18/24 Inches 8° 0.10 DocID15689 Rev 6 0° 0.031 8° 0.004 TSV62x, TSV62xA 5.3 Package information MiniSO10 package information Figure 25. MiniSO10 package outline Table 11. MiniSO10 mechanical data Dimensions Ref. Millimeters Min. Typ. A Inches Max. Min. Typ. 1.10 Max. 0.043 A1 0.05 0.10 0.15 0.002 0.004 0.006 A2 0.78 0.86 0.94 0.031 0.034 0.037 b 0.25 0.33 0.40 0.010 0.013 0.016 c 0.15 0.23 0.30 0.006 0.009 0.012 D 2.90 3.00 3.10 0.114 0.118 0.122 E 4.75 4.90 5.05 0.187 0.193 0.199 E1 2.90 3.00 3.10 0.114 0.118 0.122 e L 0.50 0.40 L1 k aaa 0.55 0.020 0.70 0.016 0.95 0° 3° 0.022 0.028 0.037 6° 0.10 DocID15689 Rev 6 0° 3° 6° 0.004 19/24 24 Package information 5.4 TSV62x, TSV62xA TSSOP14 package information Figure 26. TSSOP14 package outline Table 12. TSSOP14 mechanical data Dimensions Ref. Millimeters Min. Typ. A Max. Min. Typ. 1.20 Max. 0.047 A1 0.05 0.10 0.15 0.002 0.004 0.006 A2 0.80 1.00 1.05 0.031 0.039 0.041 b 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0089 D 4.90 5.00 5.10 0.193 0.197 0.201 E 6.20 6.40 6.60 0.244 0.252 0.260 E1 4.30 4.40 4.50 0.169 0.173 0.176 e L 0.65 0.45 L1 k aaa 20/24 Inches 0.60 0.0256 0.75 0.018 1.00 0° 0.024 0.030 0.039 8° 0.10 DocID15689 Rev 6 0° 8° 0.004 TSV62x, TSV62xA 5.5 Package information TSSOP16 package information Figure 27. TSSOP16 package outline b Table 13. TSSOP16 mechanical data Dimensions Ref. Millimeters Min. Typ. A Inches Max. Min. Typ. 1.20 A1 0.05 A2 0.80 b Max. 0.047 0.15 0.002 1.05 0.031 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.008 D 4.90 5.00 5.10 0.193 0.197 0.201 E 6.20 6.40 6.60 0.244 0.252 0.260 E1 4.30 4.40 4.50 0.169 0.173 0.177 e 0.65 k 0° L 0.45 L1 aaa 1.00 0.60 0.006 0.039 0.041 0.0256 8° 0° 0.75 0.018 1.00 8° 0.024 0.030 0.039 0.10 DocID15689 Rev 6 0.004 21/24 24 Ordering information 6 TSV62x, TSV62xA Ordering information Table 14. Order codes Order codes Temperature range TSV622IDT TSV622IST TSV624IPT TSV624AIPT TSV625IPT TSV625AIPT 22/24 -40 °C to 125 °C MiniSO10 TSSOP14 TSSOP16 DocID15689 Rev 6 Marking TSV622 TSV622A K107 MiniSO8 TSV622AIST TSV623AIST Packing SO8 TSV622AIDT TSV623IST Package K143 Tape and reel K114 K144 TSV624 TSV624A TSV625 TSV625A TSV62x, TSV62xA 7 Revision history Revision history Table 15. Document revision history Date Revision 25-May-2009 1 Initial release. 15-Jun-2009 2 Corrected pin connection diagram in Figure 1. 24-Aug-2009 3 Added root part numbers (TSv62xA) and Table 1: Device summary on cover page. Added order code TSV622AILT in Table 15: Order codes. 22-Oct-2009 4 Corrected error in Table 15: Order codes: TSV625 offered in TSSOP16. 5 Updated Features. Updated Figure 1. Table 4, Table 6, and Table 7: replaced DVio with ΔVio/ΔT. Section 4.5: Shutdown function (TSV623, TSV625): added explanation of Figure 20 and Figure 21; replaced Figure 18 and Figure 19; updated Figure 20 and Figure 21. Corrected error in Table 15: Order codes: the marking for the order code TSV622AILT is K143. 6 Changed part number layout on cover page Removed package SOT23-5 Table 4, Table 6, and Table 7: updated VOH parameter information and changed min. values to max. values. Table 14: Order codes: removed obsolete order codes: TSV622ILT, TSV622AILT, TSV622ID, TSV622AID 09-Jan-2013 23-May-2017 Changes DocID15689 Rev 6 23/24 24 TSV62x, TSV62xA IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2017 STMicroelectronics – All rights reserved 24/24 DocID15689 Rev 6
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