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TSV912HYDT

TSV912HYDT

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    SOIC-8

  • 描述:

    IC OPAMP GP 2 CIRCUIT 8SO

  • 数据手册
  • 价格&库存
TSV912HYDT 数据手册
TSV912H High temperature, rail-to-rail input/output, 8 MHz operational amplifier Datasheet - production data Applications Automotive products Description The TSV912H operational amplifier offers low voltage operation and rail-to-rail input and output. The device features an excellent speed/power consumption ratio, offering an 8 MHz gainbandwidth product while consuming only 1.1 mA maximum at 5 V. It is unity gain stable and features an ultra-low input bias current. Features Rail-to-rail input and output Wide bandwidth Low power consumption: 820 µA typ Unity gain stability High output current: 35 mA Operating range from 2.5 to 5.5 V Low input bias current, 1 pA typ ESD internal protection ≥ 5 kV Latch-up immunity February 2016 The TSV912H is a high temperature version of the TSV912, and can operate from -40 °C to 150 °C with unique characteristics. Its main target applications are automotive, but the device is also ideal for sensor interfaces, battery-supplied and portable applications, as well as active filtering. DocID17688 Rev 2 This is information on a product in full production. 1/19 www.st.com Contents TSV912H Contents 1 Package pin connections................................................................ 3 2 Absolute maximum ratings and operating conditions ................. 4 3 4 Electrical characteristics ................................................................ 5 Electrical characteristic curves .................................................... 11 5 Application information ................................................................ 14 6 5.1 Driving resistive and capacitive loads ............................................. 14 5.2 PCB layouts .................................................................................... 14 Package information ..................................................................... 15 6.1 SO8 package information ................................................................ 16 7 Ordering information..................................................................... 17 8 Revision history ............................................................................ 18 2/19 DocID17688 Rev 2 TSV912H 1 Package pin connections Package pin connections Figure 1: Pin connection (top view) DocID17688 Rev 2 3/19 Absolute maximum ratings and operating conditions 2 TSV912H Absolute maximum ratings and operating conditions Table 1: Absolute maximum ratings Symbol VCC Vid Vin Iin Tstg Tj Rthja Rthjc Parameter Supply voltage, + (VCC ) - Differential input voltage Input voltage (3) Input current (4) Unit 6 (2) ±VCC (VCC ) - 0.2 to V + (VCC ) + 0.2 mA 10 Storage temperature -65 to 150 Maximum junction temperature 160 Thermal resistance junction to ambient Thermal resistance junction to case HBM: human body model ESD Value - (1) (VCC ) MM: machine model (5)(6) 125 (5)(6) °C/W 40 (7) 5 (8) kV 400 CDM: charged device model (9) V 1500 Latch-up immunity °C 200 mA Notes: (1) (2) (3) (4) (5) (6) All voltage values, except the differential voltage, are with respect to the network ground terminal. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal. VCC - Vin must not exceed 6 V. Input current must be limited by a resistor in series with the inputs. Rth are typical values. Short-circuits can cause excessive heating and destructive dissipation. (7) Human body model: a 100 pF capacitor is charged to the specified voltage, then discharged through a 1.5 kΩ resistor between two pins of the device. This is done for all couples of connected pin combinations while the other pins are floating. (8) Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 Ω). This is done for all couples of connected pin combinations while the other pins are floating. (9) Charged device model: all pins and the package are charged together to the specified voltage and then discharged directly to the ground through only one pin. This is done for all pins. Table 2: Operating conditions Symbol VCC 4/19 Parameter Supply voltage + (VCC ) - Value (VCC ) Vicm Common mode input voltage range Toper Operating free-air temperature range DocID17688 Rev 2 Unit 2.5 to 5.5 (VCC ) + - 0.1 to (VCC ) + 0.1 -40 to 150 V °C TSV912H 3 Electrical characteristics Electrical characteristics Table 3: Electrical characteristics at VCC+ = 2.5 V with VCC- = 0 V, Vicm = VCC/2, RL connected to VCC/2, T = 25 °C (unless otherwise specified) Symbol Parameter Conditions Min. Typ. Max. 0.1 4.5 Unit DC performance Vio DVio/DT Iio Iib CMR Avd Input offset voltage Input offset voltage drift Input offset current Input bias current Common mode rejection ratio 20 log (ΔVic/ΔVio) Large signal voltage gain T = 25 °C Tmin < T < Tmax 7.5 -40 °C < T < 125 °C 2 125 °C < T < 150 °C 20 Vout = VCC/2, T = 25 °C 1 Vout = VCC/2, Tmin < T < Tmax 1 Vout = VCC/2, Tmin < T < Tmax High-level output voltage 58 0 V to 2.5 V, Vout = 1.25 V, Tmin < T < Tmax 53 RL = 10 kΩ, Vout = 0.5 V to 2 V, T = 25 °C 80 Iout Isource ICC Supply current (per operator) RL = 10 kΩ, Vout = 0.5 V to 2 V, Tmin < T < Tmax 70 15 RL = 10 kΩ, Tmin < T < Tmax pA nA 40 60 RL = 600 Ω, T = 25 °C 45 150 250 15 RL = 10 kΩ, Tmin < T < Tmax 40 mV 60 RL = 600 Ω, T = 25 °C 45 150 250 Vout = 2.5 V, T = 25 °C 18 Vout = 2.5 V, Tmin < T < Tmax 14 Vout = 0 V, T = 25 °C 18 Vout = 0 V, Tmin < T < Tmax 14 No load, Vout = VCC/2, T = 25 °C nA (1) 89 RL = 600 Ω, Tmin < T < Tmax Isink 10 pA dB RL = 10 kΩ, T = 25 °C Low-level output voltage (1) 75 RL = 600 Ω, Tmin < T < Tmax VOL 10 5 0 V to 2.5 V, Vout = 1.25 V, T = 25 °C RL = 10 kΩ, T = 25 °C VCC VOH μV/°C 5 Vout = VCC/2, T = 25 °C mV 32 35 0.78 No load, Vout = VCC/2, Tmin < T < Tmax mA 1.1 1.1 AC performance GBP Fu Gain bandwidth product Unity gain frequency RL = 2 kΩ, CL = 100 pF, f = 100 kHz, T = 25 °C 8 RL = 2 kΩ, CL = 100 pF, f = 100 kHz, Tmin < T < Tmax 4 RL = 2 kΩ, CL = 100 pF DocID17688 Rev 2 MHz 7.2 5/19 Electrical characteristics Symbol Parameter ɸm Phase margin Gm Gain margin SR en THD+en TSV912H Conditions RL = 2 kΩ, CL = 100 pF Max. Unit 45 Degrees 8 dB 4.5 RL = 2 kΩ, CL = 100 pF, Av = 1, Tmin < T < Tmax 3.5 Equivalent input noise voltage f = 10 kHz 21 nV/√Hz Total harmonic distortion G =1, f =1 kHz, RL = 2 kΩ, Bw = 22 kHz, Vicm = (VCC + 1)/2, Vout = 1.1 Vpp 0.001 % Slew rate Guaranteed by design. 6/19 Typ. RL = 2 kΩ, CL = 100 pF, Av = 1, T = 25 °C Notes: (1) Min. DocID17688 Rev 2 V/μs TSV912H Electrical characteristics Table 4: Electrical characteristics at VCC+ = 3.3 V with VCC- = 0 V, Vicm = VCC/2, RL connected to VCC/2, T = 25 °C (unless otherwise specified) Symbol Parameter Conditions Min. Typ. Max. 0.1 4.5 Unit DC performance Vio DVio Iio Iib CMR Avd Input offset voltage Input offset voltage drift Input offset current Input bias current Common mode rejection ratio 20 log (ΔVic/ΔVio) Large signal voltage gain T = 25 °C Tmin < T < Tmax 7.5 -40 °C < T < 125 °C 2 125 °C < T < 150 °C 20 Vout = VCC/2, T = 25 °C 1 Vout = VCC/2, Tmin < T < Tmax 1 Vout = VCC/2, Tmin < T < Tmax High-level output voltage 0 V to 3.3 V, Vout = 1.65 V, T = 25 °C 60 0 V to 3.3 V, Vout = 1.65 V, Tmin < T < Tmax 55 RL = 10 kΩ, Vout = 0.5 V to 2.8 V, T = 25 °C 80 Iout Isource ICC Supply current (per operator) RL = 10 kΩ, Vout = 0.5 V to 2.8 V, Tmin < T < Tmax 70 15 RL = 10 kΩ, Tmin < T < Tmax pA nA 40 60 RL = 600 Ω, T = 25 °C 45 150 250 15 RL = 10 kΩ, Tmin < T < Tmax 40 mV 60 RL = 600 Ω, T = 25 °C 45 150 250 Vout = 3.3 V, T = 25 °C 18 Vout = 3.3 V, Tmin < T < Tmax 14 Vout = 0 V, T = 25 °C 18 Vout = 0 V, Tmin < T < Tmax 14 No load, Vout = VCC/2, T = 25 °C nA (1) 90 RL = 600 Ω, Tmin < T < Tmax Isink 10 pA dB RL = 10 kΩ, T = 25 °C Low-level output voltage (1) 78 RL = 600 Ω, Tmin < T < Tmax VOL 10 5 RL = 10 kΩ, T = 25 °C VCC VOH μV/°C 5 Vout = VCC/2, T = 25 °C mV 32 35 0.8 No load, Vout = VCC/2, Tmin < T < Tmax mA 1.1 1.1 AC performance GBP Gain bandwidth product Fu Unity gain frequency ɸm Phase margin Gm Gain margin RL = 2 kΩ, CL = 100 pF, f = 100 kHz, T = 25 °C 8 RL = 2 kΩ, CL = 100 pF, f = 100 kHz, Tmin < T < Tmax 4.2 MHz 7.2 RL = 2 kΩ, CL = 100 pF DocID17688 Rev 2 45 Degrees 8 dB 7/19 Electrical characteristics Symbol SR en THD+en TSV912H Parameter Conditions Max. Unit 4.5 RL = 2 kΩ, CL = 100 pF, Av = 1, Tmin < T < Tmax 3.5 Equivalent input noise voltage f = 10 kHz 21 nV/√Hz Total harmonic distortion G =1, f =1 kHz, RL = 2 kΩ, Bw = 22 kHz, Vicm = (VCC + 1)/2, Vout = 1.9 Vpp 0.0007 % Slew rate Guaranteed by design. 8/19 Typ. RL = 2 kΩ, CL = 100 pF, Av = 1, T = 25 °C Notes: (1) Min. DocID17688 Rev 2 V/μs TSV912H Electrical characteristics Table 5: Electrical characteristics at VCC+ = 5 V with VCC- = 0 V, Vicm = VCC/2, RL connected to VCC/2, full temperature range (unless otherwise specified) Symbol Parameter Conditions Min. Typ. Max. 0.1 4.5 Unit DC performance Vio DVio Iio Iib CMR SVR Avd Input offset voltage Input offset voltage drift Input offset current Input bias current Common mode rejection ratio 20 log (ΔVic/ΔVio) Supply voltage rejection ratio 20 log (ΔVCC/ΔVio) Large signal voltage gain T = 25 °C Tmin < T < Tmax 7.5 -40 °C < T < 125 °C 2 125 °C < T < 150 °C 20 Vout = VCC/2, T = 25 °C 1 Vout = VCC/2, Tmin < T < Tmax 1 Vout = VCC/2, Tmin < T < Tmax High-level output voltage 0 V to 5 V, Vout = 2.5 V, T = 25 °C 62 0 V to 5 V, Vout = 2.5 V, Tmin < T < Tmax 58 VCC = 2.5 to 5 V, T = 25 °C 70 VCC = 2.5 to 5 V, Tmin < T < Tmax 65 RL = 10 kΩ, Vout = 0.5 V to 4.5 V, T = 25 °C 80 RL = 10 kΩ, Vout = 0.5 V to 4.5 V, Tmin < T < Tmax 70 Iout Isource ICC Supply current (per operator) RL = 10 kΩ, Tmin < T < Tmax nA dB 40 60 RL = 600 Ω, T = 25 °C 45 150 250 15 RL = 10 kΩ, Tmin < T < Tmax 40 mV 60 RL = 600 Ω, T = 25 °C 45 150 250 Vout = 5 V, T = 25 °C 18 Vout = 5 V, Tmin < T < Tmax 14 Vout = 0 V, T = 25 °C 18 Vout = 0 V, Tmin < T < Tmax 14 No load, Vout = 2.5 V, T = 25 °C pA 91 RL = 600 Ω, Tmin < T < Tmax Isink 10 pA nA (1) 86 15 RL = 10 kΩ, T = 25 °C Low-level output voltage (1) 82 RL = 600 Ω, Tmin < T < Tmax VOL 10 5 RL = 10 kΩ, T = 25 °C VCC VOH μV/°C 5 Vout = VCC/2, T = 25 °C mV 32 35 0.82 No load, Vout = 2.5 V, Tmin < T < Tmax mA 1.1 1.1 AC performance GBP Fu Gain bandwidth product Unity gain frequency RL = 2 kΩ, CL = 100 pF, f = 100 kHz, T = 25 °C 8 RL = 2 kΩ, CL = 100 pF, f = 100 kHz, Tmin < T < Tmax 4.5 RL = 2 kΩ, CL = 100 pF 7.5 DocID17688 Rev 2 MHz 9/19 Electrical characteristics Symbol Parameter ɸm Phase margin Gm Gain margin SR en THD+en TSV912H Slew rate Equivalent input noise voltage Total harmonic distortion Conditions RL = 2 kΩ, CL = 100 pF 8 dB 3.5 f = 1 kHz 27 f = 10 kHz 21 DocID17688 Rev 2 Unit Degrees RL = 2 kΩ, CL = 100 pF, Av = 1, Tmin < T < Tmax G =1, f =1 kHz, RL = 2 kΩ, Bw = 22 kHz, Vicm = (VCC + 1)/2, Vout = 3.6 Vpp Max. 45 4.5 Guaranteed by design. 10/19 Typ. RL = 2 kΩ, CL = 100 pF, Av = 1, T = 25 °C Notes: (1) Min. V/μs 0.0004 nV/√Hz % TSV912H 4 Electrical characteristic curves Electrical characteristic curves Figure 2: Input offset voltage distribution at T = 25 °C Figure 3: Input offset voltage distribution at T = 150 °C Figure 4: Supply current vs. input common-mode voltage at VCC = 2.5 V Figure 5: Supply current vs. input common-mode voltage at VCC = 5 V Figure 6: Output current vs. output voltage at VCC = 2.5 V Figure 7: Output current vs. output voltage at VCC = 5 V DocID17688 Rev 2 11/19 Electrical characteristic curves TSV912H Figure 8: Voltage gain and phase vs frequency at VCC = 2.5 V and Vicm = 0.5 V Figure 9: Voltage gain and phase vs frequency at VCC = 5.5 V and Vicm = 0.5 V Figure 10: Phase margin vs. capacitive load Figure 11: Phase margin vs. output current Figure 12: Positive slew rate Figure 13: Negative slew rate 12/19 DocID17688 Rev 2 TSV912H Electrical characteristic curves Figure 14: Distortion and noise vs. frequency Figure 15: Distortion and noise vs. output voltage Figure 16: Noise vs. frequency Figure 17: Phase margin vs. capacitive load and serial resistor Figure 18: Supply current vs. supply voltage DocID17688 Rev 2 13/19 Application information TSV912H 5 Application information 5.1 Driving resistive and capacitive loads These products are low-voltage, low-power operational amplifiers optimized to drive rather large resistive loads above 2 kΩ. In follower configuration, these operational amplifiers can drive capacitive loads up to 100 pF with no oscillations. When driving larger capacitive loads, adding a small in-series resistor at the output can improve the stability of the devices (see Figure 19: "In-series resistor vs. capacitive load" for recommended in-series resistor values). Once the in-series resistor value has been selected, the stability of the circuit should be tested on the bench and simulated with the simulation model. Figure 19: In-series resistor vs. capacitive load 5.2 PCB layouts For correct operation, it is advised to add 10 nF decoupling capacitors as close as possible to the power supply pins. 14/19 DocID17688 Rev 2 TSV912H 6 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ® ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ® ECOPACK is an ST trademark. DocID17688 Rev 2 15/19 Package information 6.1 TSV912H SO8 package information Figure 20: SO8 package outline Table 6: SO8 mechanical data Dimensions Ref. Millimeters Min. Typ. A Max. Min. Typ. 1.75 0.25 Max 0.069 A1 0.10 A2 1.25 b 0.28 0.48 0.011 0.019 c 0.17 0.23 0.007 0.010 D 4.80 4.90 5.00 0.189 0.193 0.197 E 5.80 6.00 6.20 0.228 0.236 0.244 E1 3.80 3.90 4.00 0.150 0.154 0.157 e 0.004 0.010 0.049 1.27 0.050 h 0.25 0.50 0.010 0.020 L 0.40 1.27 0.016 0.050 L1 k ccc 16/19 Inches 1.04 1° 0.040 8° 0.10 DocID17688 Rev 2 1° 8° 0.004 TSV912H 7 Ordering information Ordering information Table 7: Order codes Order code TSV912HYDT Temperature range (1) Package Packing Marking Tape and reel V912HY (2) -40 °C to 150 °C SO8 (automotive grade level) Notes: (1) Qualification and characterization according to AEC Q100 and Q003 or equivalent, advanced screening according to AEC Q001 & Q 002 or equivalent. (2) SO8 package is moisture sensitivity level 1 as per Jedec J-STD-020-C. DocID17688 Rev 2 17/19 Revision history 8 TSV912H Revision history Table 8: Document revision history Date Revision 08-Jul-2010 1 Changes Initial release. Removed TSV912AH part number Updated layout 22-Feb-2016 2 Table 3, Table 4, and Table 5: removed all references to TSV912AH Table 6: updated min (mm) value for k parameter Table 7: "Order codes": removed order code TSV912AHYDT 18/19 DocID17688 Rev 2 TSV912H IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2016 STMicroelectronics – All rights reserved DocID17688 Rev 2 19/19
TSV912HYDT 价格&库存

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