UA748IDT

UA748 PRECISION SINGLE OPERATIONAL AMPLIFIER ■ INPUT OFFSET VOLTAGE : 3mV max. OVER TEMPERATURE ■ FREQUENCY COMPENSATION WITH A SINGLE 30pF CAPACITOR (C1) ■ OPERATION FROM ±5V to ±15V ■ LOW POWER CONSUMPTION : 50mW AT ±15V ■ CONTINUOUS SHORT-CIRCUIT PROTEC- N DIP8 (Plastic Package) TION ■ OPERATION AS A COMPARATOR WITH DIFFERENTIAL INPUTS AS HIGH AS ±30V ■ NO LATCH-UP WHEN COMMON-MODE RANGE IS EXCEEDED ■ SAME PIN CONFIGURATION AS THE LM101A DESCRIPTION The UA748 is a general purpose operational amplifier built on a single silicon chip. The resulting close match and tight thermal coupling gives low offsets and temperature drift as well as fast recovery from thermal transients. ■ Short-circuit protection ■ Offset voltage null capability ■ Large common-mode and differential voltage ranges ■ Low power consumption ■ No latch-up The unity-gain compensation specified makes the circuit stable for all feedback configurations, even with capacitive loads. However, it is possible to optimize compensation for best high frequency performance at any gain. The low power dissipation permits high voltage operation and simplifies packaging in full-temperature range systems. D SO8 (Plastic Micropackage) ORDER CODE Package Part Number Temperature Range UA748C 0°C, +70°C UA748I -40°C, +105°C UA748M -55°C, +125°C Example : UA748CN N D • • • • • • N = Dual in Line Package (DIP) D = Small Outline Package (SO) - also available in Tape & Reel (DT) PIN CONNECTIONS (top view) 1 8 2 7 3 6 4 5 December 2001 1 - Offset null 1/frequency compensation 2 - Inverting input 3 - Non-inverting input 4 - VCC5 - Offset null 2 6 - Output 7 - VCC+ 8 - Frequency compensation 1/7 UA748 SCHEMATIC DIAGRAM ABSOLUTE MAXIMUM RATINGS Symbol VCC Supply voltage Vid Vi Ptot 1. 2/7 Parameter UA748M UA748I UA748C Unit ±22 V Differential Input Voltage ±30 V Input Voltage ±15 V 500 mW 1) Power Dissipation Output Short-circuit Duration Toper Operating Free-air Temperature Range Tstg Storage Temperature Range Infinite -55 to +125 Power dissipation must be considered to ensure maximum junction temperature (Tj) is not exceeded. -40 to +105 -65 to +150 0 to +70 °C °C UA748 ELECTRICAL CHARACTERISTICS VCC = ±15V, Tamb = +25°C, C1 = 30pF (unless otherwise specified) UA748I/M Symbol Unit Min. Typ. Max. Min. Typ. Max. Vio Input Offset Voltage (Rs ≤ 10kΩ) Tamb = +25°C Tmin ≤ Tamb ≤ Tmax 0.7 2 3 2 7.5 10 mV Iio Input Offset Current Tamb = +25°C Tmin ≤ Tamb ≤ Tmax 1.5 10 20 2 50 70 nA Iib Input Bias Current Tamb = +25°C Tmin ≤ Tamb ≤ Tmax 25 75 10 70 250 300 nA Avd Large Signal Voltage Gain (Vo = ±10V, RL = 2kΩ) Tamb = +25°C Tmin ≤ Tamb ≤ Tmax 50 25 100 25 15 100 V/mV SVR Supply Voltage Rejection Ratio (Rs ≤ 10kΩ) Tamb = +25°C Tmin ≤ Tamb ≤ Tmax 80 80 96 70 70 96 dB ICC Supply Current, no load Tamb = +25°C Tmin ≤ Tamb ≤ Tmax Vicm Input Common Mode Voltage Range (VCC = ±20V) Tamb = +25°C Tmin ≤ Tamb ≤ Tmax ±15 ±15 CMR Common Mode Rejection Ratio (RS ≤ 10kΩ) Tamb = +25°C Tmin ≤ Tamb ≤ Tmax 80 80 96 10 30 12 10 12 10 0.25 IOS Output short Circuit Current Output Voltage Swing (VCC = ±15V) Tamb = +25°C RL = 10kΩ RL = 2kΩ ±Vopp Tmin ≤ Tamb ≤ Tmax RL = 10kΩ RL = 2kΩ SR tr Kov 1. UA748C Parameter Slew Rate 1) Vi = ±10V, RL = 2kΩ, CL = 100pF, unity Gain Rise Time Vi = ±20mV, RL = 2kΩ, CL = 100pF, unity Gain 1.8 Overshoot Vi = 20mV, RL = 2kΩ, CL = 100pF, unity Gain Zi Input Impedance (VCC = ±15V) Ro Output Resistance (VCC = ±15V) 1.5 3 3 1.8 3 3 ±15 ±15 V 70 70 96 10 30 14 13 12 10 12 10 14 13 0.5 0.25 0.5 50 0.3 0.3 5 5 4 1.5 75 dB 50 V/µs µs % 4 MΩ 75 Ω GBP THD Total Harmonic Distortion f =1kHz, Av =20dB, RL =2kΩ, Vo =2Vpp, CL = 100pF DIio Input Offset Current Drift 25°C ≤ Tmax Tmin ≤ Tamb ≤ Tmax 10 20 100 200 10 20 300 600 DVio Input Offset Voltage Drift Tmin ≤ Tamb ≤ Tmax 3 15 6 30 1 0.5 0.015 mA V Gain Bandwith Product Vi =10mV, RL = 2kΩ, CL = 100pF, f =100kHz 0.5 mA MHz 1 % 0.015 pA/°C µV/°C May be improved up to 10V/µs in inverting amplifier configuration. 3/7 UA748 4/7 UA748 SINGLE POLE COMPENSATION 5/7 UA748 PACKAGE MECHANICAL DATA 8 PINS - PLASTIC DIP Millimeters Inches Dim. Min. A a1 B b b1 D E e e3 e4 F i L Z 6/7 Typ. Max. Min. 3.32 0.51 1.15 0.356 0.204 0.020 0.045 0.014 0.008 0.065 0.022 0.012 0.430 0.384 0.313 2.54 7.62 7.62 3.18 Max. 0.131 1.65 0.55 0.304 10.92 9.75 7.95 Typ. 0.100 0.300 0.300 6.6 5.08 3.81 1.52 0.125 0260 0.200 0.150 0.060 UA748 PACKAGE MECHANICAL DATA 8 PINS - PLASTIC MICROPACKAGE (SO) s b1 b a1 A a2 C c1 a3 L E e3 D M 5 1 4 F 8 Millimeters Inches Dim. Min. A a1 a2 a3 b b1 C c1 D E e e3 F L M S Typ. Max. Min. 1.75 0.25 1.65 0.85 0.48 0.25 0.5 0.1 0.65 0.35 0.19 0.25 Typ. Max. 0.026 0.014 0.007 0.010 0.069 0.010 0.065 0.033 0.019 0.010 0.020 0.189 0.228 0.197 0.244 0.004 45° (typ.) 4.8 5.8 5.0 6.2 1.27 3.81 3.8 0.4 0.050 0.150 4.0 1.27 0.6 0.150 0.016 0.157 0.050 0.024 8° (max.) Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States © http://www.st.com 7/7