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USB6B2

USB6B2

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

  • 描述:

    USB6B2 - DATA LINES PROTECTION - STMicroelectronics

  • 数据手册
  • 价格&库存
USB6B2 数据手册
® USB6Bx DATA LINES PROTECTION Application Specific Discretes A.S.D. APPLICATIONS Where transient overvoltage protection in sensitive equipment is required, such as: - Universal Serial Bus ports - RS-423 interfaces - RS-485 interfaces - ISDN equipment - T1/E1 line cards - HDSL / ASDL interfaces FEATURES n Full diode bridge with integrated clamping protection n Breakdown voltage : VBR = 6V min. n Peak pulse power dissipation : PPP = 500W (8/20µs) n Very low capacitance, compatible with high debit data or signal rates. DESCRIPTION In order to prevent fast transients from leading to severe damages in a high speed data system, a specific protection has been developed by STMicroelectronics. The USB6Bx protects the two input lines against overvoltage. Besides, this device also keeps the power rails in a safe limit thanks to the integrated Transil diode. BENEFITS n SO8 DIL8 n n n Provides protection for each line and between the supply voltage and GND : 25A , 8/20µs. High ESD protection level : up to level 3 per MIL STD 883C-Method 3015-6 Separated inputs and outputs (so-called 4-point structure) to improve ESD susceptibility. Comprehensive package pin-out for immediate implementation. FUNCTIONAL DIAGRAM COMPLIES WITH THE FOLLOWING STANDARDS: MIL STD 883C - Method 3015-6 class 3 C = 100 pF R = 1500 Ω 3 positive strikes and 3 negative strikes (F = 1 Hz) IEC-1000-4-2 level 4 15 kV (air discharge) 8 kV (contact discharge) TM: ASD and TRANSIL are trademarks of ST Microelectronics. Vcc I/01 I/02 GND Vcc I/01 I/02 GND August 1999 Ed : 5A 1/9 USB6Bx TECHNICAL INFORMATION SURGE PROTECTION The USB6Bx is particularly optimized to perform surge protection based on the rail to rail topology. The clamping voltage VCL can be estimated as follow: VCL+ =Vcc + VF for positive surges for negative surges VCL - = - VF with: VF = Vt + rd.Ip (VF forward drop voltage) / (Vt forward drop threshold voltage) Note: the estimations do not take into account phenomena due to parasitic inductances. Fig. A1 : ESD SURGE Vf I/O Lw +Vcc Lw di dt di Vcl+ = Vcc+Vf+ Lw dt surge >0 VI/O Lw di dt Vcl- = -Vf- Lw di dt surge 0 surge
USB6B2 价格&库存

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