VIPer35
Quasi-resonant high performance off line high voltage converter
Datasheet - production data
• Less than 30 mW @ 230 VAC in no-load
condition
• Brown-out set through resistor divider
• Short-circuit protection (auto-restart)
• Hysteretic thermal shutdown
621
6',3
Applications
Figure 1. Basic application schematic
• Auxiliary power supply
• Adapter/charger for PDA, camcorders,
shavers, tablet, video games, STB
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• Supplies for industrial systems, metering,
appliances
Description
*,3*59
Features
• 800 V avalanche-rugged power MOSFET
allowing ultra wide range input VAC to be
achieved
• Embedded HV start-up and senseFET
• Built-in soft-start
• Quasi-resonant current mode PWM controller
with drain current limit (IDlim)
• Multifunction ZCD pin:
– Zero-current detection
– OCP threshold (IDlim) setup
– Output OVP (auto-restart)
– Feed-forward compensation
The device is a high voltage converter, which
smartly integrates an 800 V rugged power
MOSFET with a quasi-resonant current mode
PWM control. This IC meets severe energy
saving standards as it has very low consumption
and operates in burst mode under light load
conditions.
The device features the brown-out enabling the
IC to set the switch-off and switch-on threshold
independently one of each other. The quasiresonant operation reduces the level of EMI and
the quantity of components in the application.
The quasi-resonant operation reduces the
switching losses and improves power conversion
efficiency. The device features high level
protections such as: output overvoltage, shortcircuit and thermal shutdown with hysteresis.
After the removal of a fault condition, the IC is
automatically restarted.
• Support isolated flyback topology with optocoupler
• Frequency limit:
– 136 kHz (L type), 225 kHz (H type)
February 2016
DocID026980 Rev 4
1/44
www.st.com
Contents
VIPer35
Contents
1
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2
Typical output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
5
Typical electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
6
Typical circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
7
Efficiency performance for a typical flyback converter . . . . . . . . . . . . 18
8
Operation description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2/44
8.1
Power section and gate driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
8.2
High voltage start-up generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
8.3
Power-up and soft-start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
8.4
Power-down description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
8.5
Auto-restart description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
8.6
Quasi-resonant operation (QR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
8.7
Frequency foldback function and valley-skipping mode . . . . . . . . . . . . . . 25
8.8
Blanking time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
8.9
Starter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
8.10
Current limit set-point and feed-forward option . . . . . . . . . . . . . . . . . . . . 27
8.11
Overvoltage protection (OVP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
8.12
ZCD pin summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
8.13
Feedback and overload protection (OLP) . . . . . . . . . . . . . . . . . . . . . . . . 32
8.14
Burst mode operation at no-load or very light load . . . . . . . . . . . . . . . . . . 35
8.15
Brown-out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
DocID026980 Rev 4
VIPer35
9
Contents
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
9.1
SO16N package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
9.2
SDIP10 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
10
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
11
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
DocID026980 Rev 4
3/44
44
List of tables
VIPer35
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
4/44
Typical power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Supply section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Controller section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Power supply efficiency, VOUT = 12 V, VIN = 115 VAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Power supply efficiency, VOUT = 12 V, VIN = 230 VAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
ZCD pin configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
SO16N mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
SDIP10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
DocID026980 Rev 4
VIPer35
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
Figure 37.
Figure 38.
Figure 39.
Figure 40.
Figure 41.
Figure 42.
Figure 43.
Figure 44.
Figure 45.
Basic application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Connection diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
VDDon vs TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
VDD(RESTART) vs TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
IDlim vs TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
VDRAIN_START vs TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
HFB vs TJ. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
VBRth vs TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
VBRhyst vs TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
IBRhysvs TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
IDD0 vs TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
IDD1 vs TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
VZCD vs IZCD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
IDlim vs IZCD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
RDS(on) vs TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
VBVDSS vs TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
IDDch1 vs TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
IDDch2 vs TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
FOSClim_L vs TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
FOSClim_H vs TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Thermal shutdown timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Min-feature quasi-resonant flyback (isolated) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Full-feature quasi-resonant flyback (isolated) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Power supply consumption at light output loads, VOUT = 12 V . . . . . . . . . . . . . . . . . . . . . . 18
Power supply consumption at no output load, VOUT = 12 V . . . . . . . . . . . . . . . . . . . . . . . . 18
IDD current during start-up and burst mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Timing diagram: normal power-up and power-down sequence . . . . . . . . . . . . . . . . . . . . . 21
Timing diagram: start-up phase and soft-start (case 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Timing diagram: start-up phase and soft-start (case 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Timing diagram: behavior after short-circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Switching frequency vs power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Zero-current detection circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Drain ringing cycle skipping as the load progressively reduces . . . . . . . . . . . . . . . . . . . . . 25
Timing diagram: double blanking time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Typical power capability vs input voltage in quasi-resonant converter . . . . . . . . . . . . . . . . 28
ZCD pin typical external configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Timing diagram: OVP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
FB pin configuration (minimal BOM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
FB pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Timing diagram: overload protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Burst mode timing: light load management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Brown-out: external setting and timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
SO16N package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
SDIP10 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
DocID026980 Rev 4
5/44
44
Block diagram
1
VIPer35
Block diagram
Figure 2. Block diagram
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Typical output power
Table 1. Typical power
230 VAC
Part number
VIPER35
85-265 VAC
Adapter(1)
Open frame(2)
Adapter(1)
Open frame(2)
20 W
22 W
15 W
16 W
1. Typical continuous power in non-ventilated enclosed adapter measured at 50 °C ambient.
2. Maximum practical continuous power in an open frame design at 50 °C ambient, with adequate
heatsinking.
6/44
DocID026980 Rev 4
VIPer35
3
Pin settings
Pin settings
Figure 3. Connection diagram
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Note:
The copper area for heat dissipation has to be designed under the DRAIN pins.
Table 2. Pin description
SO16N
SDIP10
Name
1, 2
1
GND
Device ground and source of the power MOSFET.
3
-
N.C.
Not internally connected. It can be connected to GND.
4
-
N.A.
Not available for user. This pin is mechanically connected to the controller die pad of
the frame. In order to improve the noise immunity it should be connected to GND
(pin 1, 2).
5
2
VDD
Supply voltage of the control section. This pin provides the charging current of the
external capacitor during the power-up.
ZCD
Multifunction pin:
1. Zero-current detection for quasi-resonant operations.
2. Drain current limit (IDlim) setup for overcurrent protection (RLIM).
3. Feed-forward compensation (RFF) setup.
4. Output overvoltage protection (resistor divider ROVP / RLIM) setup.
6
7
3
4
Function
FB
Control input for duty cycle control. Internal current generator provides bias current
for loop regulation. A voltage below the threshold VFBbm activates the burst-mode
operation. A level close to the threshold VFBlin means that the cycle-by-cycle
overcurrent set-point is close.
Brown-out protection input with hysteresis. A voltage below the threshold VBRth
shuts down (not latch) the device and lowers the power consumption. The device
operation restarts as the voltage exceeds the threshold VBRth + VBRhyst. It must be
connected to ground when it is not used.
8
5
BR
9 to 12
-
N.C.
13 to 16
6 to 10
DRAIN
Not internally connected. These pins must be left floating in order to get a safe
clearance distance.
High voltage drain pin. The built-in high voltage switched start-up bias current is
drawn from this pin. Pins connected to the metal frame facilitate heat dissipation.
DocID026980 Rev 4
7/44
44
Electrical ratings
4
VIPer35
Electrical ratings
Table 3. Absolute maximum ratings
Value
Symbol
Parameter
Unit
Min.
VDRAIN
Max.
Drain-to-source (ground) voltage
800
V
EAV
Repetitive avalanche energy (limited by TJ = 150 °C)
5
mJ
IAR
Repetitive avalanche current (limited by TJ = 150 °C)
1.5
A
3
A
IDRAIN
Single pulse drain current
VZCD
Input pin voltage (with IZCD = 1 mA)
-0.3
Self limited
V
VFB
Input pin voltage
-0.3
5.5
V
VBR
Input pin voltage (with IBR = 0.25 mA)
-0.3
Self limited
V
VDD
Supply voltage
-0.3
Self limited
V
IDD
Input current
25
mA
Power dissipation at TA < 60 °C
1.5
W
PTOT
TJ
TSTG
Operating junction temperature range
-40
150
°C
Storage temperature
-55
150
°C
Table 4. Thermal data
Max. value
Symbol
Parameter
Unit
SDIP10
SO16N
RthJP
Thermal resistance junction pin
(dissipated power = 1 W)
35
35
°C/W
RthJA
Thermal resistance junction ambient
(dissipated power = 1 W)
100
110
°C/W
RthJA
Thermal resistance junction ambient (1)
(dissipated power = 1 W)
85
80
°C/W
1. When mounted on a standard single side FR4 board with 100 mm2 (0.155 sq inch) of Cu (35 µm thick).
8/44
DocID026980 Rev 4
VIPer35
Electrical ratings
TJ = -40 to 125 °C, VDD = 14 V (a) (unless otherwise specified)
Table 5. Power section
Symbol
Parameter
VBVDSS
IOFF
Typ.
Max.
Unit
IDRAIN = 1 mA, VFB = GND
TJ = 25 °C
Off-state drain
current
VDRAIN = 800 V
VFB = GND, TJ = 25 °C
60
uA
IDRAIN = 0.4 A, VFB = 3 V
VBR = GND, TJ = 25 °C
4.5
Ω
IDRAIN = 0.4 A, VFB = 3 V
VBR = GND, TJ = 125 °C
9
Ω
Effective (energy
related) output
capacitance
COSS
Min.
Breakdown voltage
Drain-source onstate resistance
RDS(on)
Test conditions
800
VDRAIN = 0 to 640 V
V
17
pF
TJ = -40 to 125 °C (unless otherwise specified)
Table 6. Supply section
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
60
80
100
V
-2
-3
-4
mA
-0.6
-0.8
mA
23.5
V
Voltage
VDRAIN_START
Drain-source start
voltage
IDDch1
Start-up charging
current (power-up)
IDDch2
VDRAIN = 120 V
VBR = GND
Start-up charging
current (auto-restart) VFB = GND
VDD = 5 V, after fault
-0.4
Operating voltage
range
After turn-on
8.5
Clamp voltage
IDD = 20 mA
23.5
VDD
VDDclamp
VDDon
VDD start-up
threshold
VDDoff
VDD undervoltage
shutdown threshold
VDD(RESTART)
VDD restart voltage
threshold
VDRAIN = 120 V
VBR = GND
VFB = GND
VDD = 4 V
VDRAIN = 120 V
VBR = GND
VFB = GND
V
13
14
15
V
7.5
8
8.5
V
4
4.5
5
V
a. Adjust VDD above VDDon start-up threshold before setting 14 V.
DocID026980 Rev 4
9/44
44
Electrical ratings
VIPer35
Table 6. Supply section (continued)
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
0.6
0.7
mA
2
3
mA
Current
VFB = GND
Operating supply
V = GND
current, not switching BR
VDD = 10 V(1)
IDD0
IDD1
Operating supply
current switching
VDRAIN = 120 V
VDD = 16 V
ZCD switching @100 kHz
Resistive load:100 Ω
VFB = 2.5 V
IDD_FAULT
Operating supply
current with
protection tripping
VDD = 10 V
400
uA
IDDoff
Operating supply
current
VDD < VDDoff
270
uA
1. Adjust VDD above VDDon start-up threshold before setting 10 V.
TJ = -40 to 125 °C (unless otherwise specified)
Table 7. Controller section
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
Feedback pin
VFBolp
Overload shutdown
threshold
4.5
4.8
5.2
V
VFBlin
Linear dynamics
upper limit
3.1
3.3
3.5
V
VFBbm
Burst mode
threshold
Voltage falling
0.56
0.6
0.64
V
VFBbmhys
Burst mode
hysteresis
Voltage rising
100
mV
Feedback sourced
current
VFB = 0.3 V
-150
-215
-280
µA
IFB
3.3 V < VFB < 4 V
-2.5
-3
-3.5
µA
RFB(DYN)
Dynamic resistance
VFB > 2.5 V
12
25
kΩ
0.5
2
V/A
HFB
10/44
ΔVFB / ΔID
DocID026980 Rev 4
VIPer35
Electrical ratings
Table 7. Controller section (continued)
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
5
5.5
6
V
ZCD pin
VZCDCLh
Upper clamp voltage IZCD = 1 mA
VZCDAth
Arming voltage
threshold
Positive-going edge
0.75
0.8
0.85
V
VZCDTth
Triggering voltage
threshold
Negative-going edge
0.55
0.6
0.65
V
Internal pull-up
VFB < VFBlin
-7.5
-10
-12.5
µA
IZCD
tDELAY
Turn-on delay after
ZCD trigger
tBLANK
Turn-on inhibit time
after MOSFET turnoff
300
ns
VZCD < 1 V
6.3
µs
VZCD >1 V
2.5
µs
Current limitation
IDlim
Drain current
limitation
tSS
Soft-start time
tSU
Start-up time
VFB = 4 V
IZCD = -10 µA
TJ = 25 °C
0.95
1
1.05
A
VFB = 4 V
IZCD = - 55 µA
TJ = 25 °C
0.68
0.8
0.92
A
VFB = 4 V
IZCD = - 105 µA
TJ = 25 °C
0.55
0.65
0.75
A
VIPER35L
3.5
ms
VIPER35H
4.2
ms
VIPER35L
7.5
15
ms
VIPER35H
9.5
18
ms
480
ns
tON_MIN
Minimum turn-on
time
td
Propagation delay
(1)
100
ns
Leading edge
blanking
(1)
300
ns
Peak drain current
during burst mode
VFB = 0.6 V
tLEB
ID_BM
220
DocID026980 Rev 4
120
400
170
220
mA
11/44
44
Electrical ratings
VIPer35
Table 7. Controller section (continued)
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
3.8
4.2
4.6
V
Overvoltage protection
VOVP
Overvoltage
threshold
tSTROBE
Strobe time
2.2
µs
Oscillator section
FOSClim
FSTARTER
Internal frequency
limit
Starter frequency
VIPER35L
122
136
150
kHz
VIPER35H
200
225
250
kHz
VFB = 1 V
VZCD < VZCDTth
t < tSU
1/4
FOSClim
kHz
VFB =1 V
VZCD < VZCDTth
t > tSU
1/8
FOSClim
kHz
Brown-out protection
VBRth
Brown-out threshold
Voltage falling
0.41
0.45
0.49
A
50
60
mV
12
µA
VBRHyst
Voltage hysteresis
above VBRth
40
IBRHyst
Current hysteresis
7
VBRclamp
VDIS
Clamp voltage
IBR = 250 µA
Brown-out disable
voltage
3
50
V
150
mV
Thermal shutdown
TSD
Thermal shutdown
temperature
(1)
THYST
Thermal shutdown
hysteresis
(1)
150
1. Specification assured by design, characterization and statistical correlation.
12/44
DocID026980 Rev 4
160
°C
30
°C
VIPer35
5
Typical electrical characteristics
Typical electrical characteristics
Figure 4. VDDon vs TJ
Figure 5. VDD(RESTART) vs TJ
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DocID026980 Rev 4
13/44
44
Typical electrical characteristics
VIPer35
Figure 10. VBRhyst vs TJ
Figure 11. IBRhysvs TJ
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Figure 13. IDD1 vs TJ
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DocID026980 Rev 4
VIPer35
Typical electrical characteristics
Figure 16. RDS(on) vs TJ
Figure 17. VBVDSS vs TJ
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Figure 19. IDDch2 vs TJ
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Figure 20. FOSClim_L vs TJ
Figure 21. FOSClim_H vs TJ
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DocID026980 Rev 4
15/44
44
Typical electrical characteristics
VIPer35
Figure 22. Thermal shutdown timing diagram
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Figure 26. Power supply consumption at no
output load, VOUT = 12 V
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Figure 25. Power supply consumption at light
output loads, VOUT = 12 V
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VIPer35
8
Operation description
Operation description
The device is a high performance low voltage PWM controller chip with an 800 V,
avalanche-rugged power section.
The controller includes the PWM logic, ZCD logic for quasi-resonant operation, oscillator,
start-up circuit with soft-start, current limiting circuit with adjustable set-point, burst mode
management, brown-out circuit, UVLO circuit, auto-restart circuit and thermal protection
circuit.
The current limit set-point can be reduced by ZCD pin. Burst mode operation guarantees
high performance in standby mode and meets energy-saving standards.
All fault protections are built-in auto-restart mode with very low repetition rate to prevent the
IC overheating.
8.1
Power section and gate driver
The power section is given by an avalanche-rugged N-channel MOSFET, which guarantees
safe operation within the specified energy rating as well as high dv/dt capability. The power
MOSFET has a BVDSS of 800 V min. and a typical RDS(on) of 4.5 Ω at 25 °C. The integrated
senseFET structure allows a virtual loss-less current sensing.
The gate driver is designed to supply a controlled gate current during both turn-on and turnoff in order to minimize common-mode EMI. Under UVLO conditions an internal pull-down
circuit holds the gate low in order to ensure that the power section cannot be turned on
accidentally.
8.2
High voltage start-up generator
The HV current generator is supplied through the DRAIN pin and it is enabled only if the
input bulk capacitor voltage is higher than VDRAIN_START threshold, 80 V DC typically.
When HV current generator is on, IDDch1 current (3 mA typical value) is delivered to the
capacitor on VDD pin. During auto-restart mode after a fault event, the current is reduced to
IDDch2 (0.6 mA, typ.) in order to have a slow duty cycle during the restart phase.
8.3
Power-up and soft-start
When the input voltage reaches the device start threshold, VDRAIN_START, the VDD voltage
begins growing due to IDDch1 current (see Table 7) coming from the internal high voltage
start-up circuit. If the VDD voltage reaches VDDon threshold, the power MOSFET starts
switching and the HV current generator turns off.
The IC is powered by the energy stored in the capacitor on VDD pin, CVDD, until the selfsupply circuit (typically an auxiliary winding of the transformer and a steering diode)
develops a voltage so high to sustain the operation.
CVDD capacitor must be correctly sized to avoid fast discharge and keep the required
voltage higher than VDDoff threshold. In fact, an insufficient capacitance value could
terminate the switching operation before the controller receives any energy from the
auxiliary winding.
DocID026980 Rev 4
19/44
44
Operation description
VIPer35
The following formula can be used to calculate CVDD capacitor:
Equation 1
IDDch × t SSaux
C VDD = ---------------------------------------V DDon – V DDoff
tSSaux is the time needed for the steady-state of the auxiliary voltage. It represents an
estimate of the user's application according to the output stage configurations (transformer,
output capacitances, etc.).
During the normal operation, the power MOSFET switches on after the transformer
demagnetization, detected through the voltage VZCD sensed on ZCD pin.
At power-up, the initial output voltage is zero and the voltage VZCD is not so high to correctly
arm the internal ZCD circuit. In this case, the power MOSFET turns on with the fixed
frequency FSTARTER, reported in Table 7. After the start-up, as soon as the voltage on ZCD
logic is enabled to work, the turn-on of the power MOSFET is driven by this circuit and it is
not related to the internal oscillator (except for the frequency foldback function) any longer.
The start-up phase is managed by a dedicated internal logic and is activated by every
attempt of the start-up converter or after a fault.
An internal clock counter defines the start-up time, tSU, since during quasi-resonant
operation, the switching frequency and the duration of the start-up time depend on the load,
tSU range is indicated in Table 7. At the beginning of the start-up time, the drain current
limitation progressively rises to the maximum value. In this way a soft-start occurs and the
stress on the secondary diode is considerably reduced. It also prevents transformer
saturation.
The soft-start time lasts 3.5 ms (VIPER35L) or 4.2 ms (VIPER35H), (see tSS in Table 7).
At the start-up, until the output voltage reaches its regulated value, the feedback loop is
open and an improper activation of the overload protection could occur. In order to avoid
this, OLP logic is disabled and it is active at the end of the start-up phase, t > tSU. Figure 29
and Figure 30 show two possible start-up cases.
As soon as the output voltage reaches the regulated value, the regulation loop takes over
and the drain current is regulated below its limit, IDlim, by the feedback voltage, which is at a
value lower than the VFBlin threshold.
20/44
DocID026980 Rev 4
VIPer35
Operation description
Figure 27. IDD current during start-up and burst mode
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21/44
44
Operation description
VIPer35
Figure 29. Timing diagram: start-up phase and soft-start (case 1)
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Figure 30. Timing diagram: start-up phase and soft-start (case 2)
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DocID026980 Rev 4
VIPer35
8.4
Operation description
Power-down description
At converter power-down, the system loses its ability to regulate as soon as the decreasing
input voltage is so low to reach the peak current limitation. VDD voltage drops and when it
falls below VDDoff threshold (see Table 7) the power MOSFET switches off, the energy is
interrupted, VDD voltage decreases, the start-up sequence is inhibited and the power-down
is completed. This feature prevents any restart attempt and ensures a monotonic output
voltage decay during the system power-down.
8.5
Auto-restart description
Every time a protection is tripped, the IC automatically restarts after a duration depending
on the discharge and recharge of CVDD capacitor. As shown in Figure 31, after a fault, the IC
stops and VDD voltage decreases because of IC consumption. As soon as VDD voltage falls
below VDD(RESTART) threshold and if the DC input voltage is higher than VDRAIN_START
threshold, the internal HV current source turns on and it starts to charge CVDD capacitor with
the current IDDch2 (0.6 mA, typ.). As soon as VDD voltage reaches VDD(ON) threshold, the IC
restarts.
Figure 31. Timing diagram: behavior after short-circuit
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8.6
Quasi-resonant operation (QR)
The control core of the VIPER35 is a current mode PWM controller with a zero-current
detect circuit designed for quasi-resonant (QR) operation, a technique whose benefits are:
minimum turn-on losses, low EMI emission and safe behavior in case of short-circuit. At
heavy load the converter operates in quasi-resonant mode; operation synchronizes
MOSFET turn-on to the transformer demagnetization by detecting the resulting negativegoing edge of the voltage across any winding of the transformer. The system works close to
the boundary between discontinuous (DCM) and continuous conduction (CCM) of the
transformer and as a result, the switching frequency is different according to different
line/load conditions. See the hyperbolic-like portion reported in Figure 32.
DocID026980 Rev 4
23/44
44
Operation description
VIPer35
At medium/ light load, depending on the converter input voltage as well, the device enters
valley-skipping mode. An internal oscillator, synchronized to MOSFET turn-on, defines the
maximum operating frequency of the converter, FOSClim.
The VIPER35 is available as type 'L' or type 'H', depending on FOSClim value, see Table 7.
During the normal operation the converter works with a frequency below FOSClim, so the 'L'
type is suitable for applications where the priority is on the EMI filter minimization. The 'H'
type is suitable when an extended QR operation range or the transformer size reduction are
priorities.
As the load is reduced, and the switching frequency tends to exceed the oscillator’s one,
MOSFET turn-on doesn’t occur on the first valley but on the second one, the third one and
so on. In this way a “frequency clamp” effect is achieved, piecewise linear portion is showed
in Figure 32.
When the load is extremely light or disconnected, the converter enters burst mode
operation. By decreasing the load, the frequency is reduced even few hundred hertz, so to
comply with energy saving regulations or recommendations. As the peak current is low, no
audible noise occurs.
The above mentioned operation is based on ZCD pin. This pin is the input of the integrated
ZCD circuit which allows the power section turn-on at the end of the transformer
demagnetization. The input signal for the ZCD is obtained as a partition of the auxiliary
voltage used to supply the device, see Figure 33.
When the triggering circuit senses a negative-going edge below VZCDTth threshold
(seeTable 7), after an internal delay that helps to achieve minimum drain-source voltage
switch-on (“valley switching”), the power MOSFET turns on. However, to enable power
MOSFET turn-on, the triggering circuit has to be previously armed by a positive-going edge
exceeding VZCDAth threshold (see Table 7) on the same ZCD pin.
After the MOSFET turn-off, the blanking time, tBLANK, is generated to avoid an erroneous
arming and triggering due to the noise, generated by the leakage inductance resonance of
the transformer which rings and couples with ZCD pin.
Figure 32. Switching frequency vs power
EDFN
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24/44
DocID026980 Rev 4
VIPer35
Operation description
Figure 33. Zero-current detection circuit
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