VN5772AK-E
Quad smart power solid-state relay for complete H-bridge
configurations
Datasheet - production data
Applications
DC motor driving in full or half-bridge
configuration
All types of resistive, inductive and capacitive
loads
Description
62 GRXEOHLVODQG
*$3*36
Features
Type
RDS(on)
IOUT
VCC
VN5772AK-E
100 mΩ(1)
18 A(2)
36 V
1. Total resistance of one side in bridge configuration.
2. Typical current limitation value.
General features
– Inrush current management by active
power limitation on the high-side switches
– Very low standby current
– Very low electromagnetic susceptibility
– Compliant with European directive
2002/95/EC
Protections
– High-side drivers under voltage shutdown
– Overvoltage clamp
– Output current limitation
– High and low-side overtemperature
shutdown
– Short-circuit protection
– ESD protection
Diagnostic functions
– Proportional load current sense
– Thermal shutdown indication on both the
high and low-side switches
The VN5772AK-E is a device formed by three
monolithic chips housed in a standard SO-28
package: a double high-side and two low-side
switches. The double high-side is made using
STMicroelectronics® VIPower® M0-5 technology,
while the low-side switches are fully protected
VIPower M0-5 OMNIFET III. This device is
suitable to drive a DC motor in a bridge
configuration as well as to be used as a quad
switch for any low-voltage application. The dual
high-side switches integrate built-in non latching
thermal shutdown with thermal hysteresis. An
output current limiter protects the device in
overload conditions. In the case of long overload
duration, the device limits the dissipated power to
a safe level-up to thermal shutdown intervention.
An analog current sense pin delivers a current
proportional to the load current (according to a
known ratio) and indicates overtemperature
shutdown of the relevant high-side switch through
a voltage flag.The low-side switches have built-in
non latching thermal shutdown with thermal
hysteresis, linear current limitation and
overvoltage clamping. In case of long overload
duration, the low-side switches limit the dissipated
power to a safe level up to the thermal shutdown
intervention. Fault feedback for overtemperature
shutdown of the low-side switch is indicated by
the relevant status pin.
Table 1. Device summary
Package
SO-28
March 2015
This is information on a product in full production.
DocID16084 Rev 7
Order codes
Tube
Tape and reel
VN5772AK-E
VN5772AKTR-E
1/34
www.st.com
Contents
VN5772AK-E
Contents
1
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Electrical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.3.1
3
2.4
Electrical characteristics curves for dual high-side switches . . . . . . . . . . 15
2.5
Electrical characteristics for low-side switch . . . . . . . . . . . . . . . . . . . . . . 17
2.6
Electrical characteristics curves for low-side switch . . . . . . . . . . . . . . . . . 19
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.1
4
6
2/34
Maximum demagnetization energy (VCC = 13.5 V) . . . . . . . . . . . . . . . . . 24
Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.1
5
Electrical characteristics for dual high-side switches . . . . . . . . . . . . . . . . 9
SO-28 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
5.1
SO-28 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
5.2
Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
DocID16084 Rev 7
VN5772AK-E
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Table 19.
Table 20.
Table 21.
Table 22.
Table 23.
Table 24.
Table 25.
Table 26.
Table 27.
Table 28.
Table 29.
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Dual high-side switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Low side switch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Switching (VCC = 13 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Current sense (8 V < VCC < 16 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Truth table high-side driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Electrical transient requirements (part 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Electrical transient requirements (part 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Electrical transient requirements (part 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
PowerMOS section - off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
PowerMOS section - on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Switching (Tj = 25° C, unless otherwise specified) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Source drain diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Input section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
STATUS pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Protection and diagnostics (-40 °C < Tj < 150 °C, unless otherwise specified) . . . . . . . . . 18
Truth table low-side driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Thermal calculations in clockwise and anti-clockwise operation in steady-state mode . . . 26
Thermal resistances definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Single pulse thermal impedance definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Thermal calculations in transient mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
SO-28 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Document revision history. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
DocID16084 Rev 7
3/34
3
List of figures
VN5772AK-E
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
Figure 37.
Figure 38.
4/34
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
High-level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Input voltage clamp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Low level input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
High-level input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Input voltage hysteresis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Source diode forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Static drain source on-resistance vs drain current (3 pin). . . . . . . . . . . . . . . . . . . . . . . . . . 19
Static drain source on-resistance vs input voltage (3 pin) . . . . . . . . . . . . . . . . . . . . . . . . . 19
Static drain source on-resistance vs drain current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Transfer characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Normalized on-resistance vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Normalized input threshold vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Typical application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Recommended motor operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Waveforms (high-side switches) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Maximum turn-off current vs load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
SO-28 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Chipset configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Auto and mutual Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . 26
SO-28 HSD thermal impedance junction-ambient single pulse . . . . . . . . . . . . . . . . . . . . . 27
SO-28 LSD thermal impedance junction-ambient single pulse. . . . . . . . . . . . . . . . . . . . . . 28
Thermal fitting model of an H-bridge in SO-28 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
SO-28 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
SO-28 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
SO-28 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
DocID16084 Rev 7
VN5772AK-E
1
Block diagram and pin description
Block diagram and pin description
Figure 1. Block diagram
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DocID16084 Rev 7
5/34
33
Block diagram and pin description
VN5772AK-E
Table 2. Pin description
o
N pin
Name
Function
1, 3, 25, 28
DRAIN 3
Drain of switch 3 (low-side switches)
2
INPUT 3
Input of switch 3 (low-side switch)
4
STATUS 3
Status of switch 3 (low-side switch)
11
STATUS 4
Status of switch 4 (low-side switch)
5, 10, 19, 24
VCC
Drain of switches 1 and 2 (high-side switches) and power supply
voltage
6
GND
Ground of switches 1 and 2 (high-side switches)
8
INPUT 1
Input of switch 1 (high-side switch)
7
INPUT 2
Input of switch 2 (high-side switch)
9
C.SENSE
Analog current sense pin, delivers a current proportional to the load
current
12, 14, 15, 18 DRAIN 4
13
Drain of switch 4 (low-side switches)
INPUT 4
Input of switch 4 (low-side switch)
16, 17
SOURCE 4
Source of switch 4 (low-side switches)
22, 23
SOURCE 2
Source of switch 2 (high-side switches)
20, 21
SOURCE 1
Source of switch 1 (high-side switches)
26, 27
SOURCE 3
Source of switch 3 (low-side switches)
Figure 2. Configuration diagram (top view)
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6/34
DocID16084 Rev 7
VN5772AK-E
Electrical specification
2
Electrical specification
2.1
Absolute maximum ratings
Stressing the device above the rating listed in the “absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to the conditions in the tables below for extended
periods may affect device reliability. Refer also to the STMicroelectronics SURE program
and other relevant quality document.
Table 3. Dual high-side switch
Symbol
Parameter
Value
Unit
VCC
DC supply voltage
41
V
-VCC
Reverse DC supply voltage
0.3
V
- IGND
DC reverse ground pin current
200
mA
Internally limited
A
-12
A
-1 to 10
mA
-ICSENSE DC reverse C.SENSE pin current
200
mA
VCSENSE Current sense maximum voltage
VCC - 41
+VCC
V
V
104
mJ
IOUT
- IOUT
IIN
DC output current
Reverse DC output current
DC input current
EMAX
Maximum switching energy (single pulse)
(L = 3 mH; RL = 0 Ω; Vbat = 13.5 V; Tjstart = 150 °C;
IOUT = IlimL(Typ.))
VESD
Electrostatic discharge (human body model: R = 1.5 KΩ
C = 100 pF)
– Input
– Current sense
– SOURCEn/DRAINn
– VCC
4000
2000
5000
5000
V
V
V
V
VESD
Charge device model (CDM-AEC-Q100-011)
750
V
Junction operating temperature
-40 to 150
°C
Storage temperature
-55 to 150
°C
Tj
Tstg
DocID16084 Rev 7
7/34
33
Electrical specification
VN5772AK-E
Table 4. Low side switch
Symbol
VDSn
Drain-source voltage (VINn = 0 V)
Value
Unit
Internally clamped
V
IINn
Input current
-1 to 10
mA
IDn
Drain current
Internally limited
A
-IDn
Reverse DC output current
-4
A
ISTAT
DC status current
-1 to 10
mA
VESD1
Electrostatic discharge (R = 1.5 KΩ, C = 100 pF):
– Drain
– Supply, status, input
5000
4000
V
VESD2
Electrostatic discharge on output pins only
(R = 330 Ω, C = 150 pF)
2000
V
Operating junction-temperature
-40 to 150
°C
Storage temperature
-55 to 150
°C
Tj
Tstg
2.2
Parameter
Thermal data
Table 5. Thermal data
Symbol
Max. value
Unit
Rthj-leadHS Thermal resistance junction-case (high-side switch)
22
°C/W
Rthj-leadLS Thermal resistance junction-case (low-side switch)
21
°C/W
Thermal resistance junction-ambient (high-side switch)
47
°C/W
Thermal resistance junction-ambient (low-side switch)
57
°C/W
Rthj-amb
8/34
Parameter
DocID16084 Rev 7
VN5772AK-E
Electrical specification
2.3
Electrical characteristics
2.3.1
Electrical characteristics for dual high-side switches
Values specified in this section are for 8 V < VCC < 36 V; -40 °C < Tj < 150 °C, unless
otherwise specified (for each channel).
Table 6. Power section
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
4.5
13
36
V
4.5
V
VCC
Operating supply
voltage
VUSD
Undervoltage
shutdown
3.5
Undervoltage
shutdown hysteresis
0.5
VUSDhyst
RON
Vclamp
IS
IL(off)
VF
On-state resistance
Voltage clamp
Supply current
Off-state output
current(2)
Output - VCC diode
voltage(2)
V
IOUT = 3 A; Tj = 25 °C
50
IOUT = 3 A; Tj = 150 °C
100
IOUT = 3 A; VCC = 5 V; Tj = 25 °C
65
IS = 20 mA
41
mΩ
46
52
V
Off-state: VCC = 13 V; Tj = 25 °C,
VIN = VOUT = VSENSE = 0 V
2(1)
5(1)
μA
On-state: VCC = 13 V; VIN = 5 V,
IOUT = 0 A
3
6
mA
0.01
3
VIN = VOUT = 0 V; VCC = 13 V,
Tj = 25 °C
0
VIN = VOUT = 0 V; VCC = 13 V,
Tj = 125 °C
0
μA
5
IOUT = 3A, Tj = 150 °C
0.7
V
1. PowerMOS leakage included.
2. For each channel.
Table 7. Switching (VCC = 13 V)
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
td(on)
Turn-on delay time
RL = 6.5 Ω (see Figure 4)
—
25
—
μs
td(off)
Turn-off delay time
RL = 6.5 Ω (see Figure 4)
—
20
—
μs
(dVOUT/dt)on
Turn-on voltage slope
RL = 6.5 Ω
—
See
Figure 15
—
Vμs
(dVOUT/dt)off
Turn-off voltage slope
RL = 6.5Ω
—
See
Figure 17
—
Vμs
DocID16084 Rev 7
9/34
33
Electrical specification
VN5772AK-E
Table 7. Switching (VCC = 13 V) (continued)
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
WON
Switching energy
losses during twon
RL = 6.5 Ω (see Figure 4)
—
0.24
—
mJ
WOFF
Switching energy
losses during twoff
RL = 6.5 Ω (see Figure 4)
—
0.2
—
mJ
Max.
Unit
0.9
V
Table 8. Logic inputs
Symbol
Parameter
VIL
Low-level input voltage
IIL
Low-level input current
VIH
High-level input voltage
IIH
High-level input current
VI(hyst)
Input voltage hysteresis
VICL
Test conditions
Input voltage clamp
Min.
VIN = 0.9 V
Typ.
1
μA
2.1
V
VIN = 2.1 V
10
0.25
IIN = 1 mA
V
5.5
IIN = -1 mA
μA
7
-0.7
V
Table 9. Protection and diagnostics
Symbol
Parameter
Test conditions(1)
VCC = 13 V
IlimH
DC short-circuit
current
IlimL
Short-circuit current
VCC = 13 V; TR < Tj < TTSD
during thermal cycling
TTSD
Shutdown
temperature
TR
Reset temperature
TRS
Thermal reset of
STATUS
THYST
VDEMAG
VON
Min.
Typ.
Max.
Unit
12
18
24
A
24
A
5 V < VCC < 36 V
7
150
175
TRS + 1
TRS + 5
A
200
135
Thermal hysteresis
(TTSD - TR)
7
Turn-off output
voltage clamp
IOUT = 2 A; VIN = 0; L = 6 mH VCC - 41 VCC - 46 VCC - 52
Output voltage drop
limitation
IOUT = 0.1 A,
Tj = -40 °C to 150 °C
(see Figure 5)
DocID16084 Rev 7
°C
°C
25
1. To ensure long-term reliability under heavy overload or short-circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
10/34
°C
°C
V
mV
VN5772AK-E
Electrical specification
Table 10. Current sense (8 V < VCC < 16 V)
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
IOUT / ISENSE
IOUT = 0.35 A; VSENSE = 0.5 V;
Tj = -40 °C to 50 °C
K1
IOUT / ISENSE
IOUT = 1 A; VSENSE = 0.5 V;
Tj = -40 °C to 150 °C
Tj = 25 °C to 150 °C
1470 2020 2610
1570 2020 2470
K2
IOUT / ISENSE
IOUT = 2 A; VSENSE = 4 V;
Tj = -40 °C to 150 °C
Tj = 25 °C to 150 °C
1740 2020 2320
1790 2020 2250
K3
IOUT / ISENSE
IOUT = 6 A; VSENSE = 4 V;
Tj = -40 °C to 150 °C
Tj = 25 °C to 150 °C
1890 2010 2140
1890 2010 2140
Max analog sense output
voltage
IOUT = 4 A;
5
IOUT = 0 A,
VSENSE = 0 V,
VIN = 0 V,
Tj = -40 °C to 150 °C
0
IOUT = 0 A,
VSENSE = 0 V,
VIN = 5 V,
Tj = -40 °C to 150 °C
0
K0
VSENSE
ISENSE0
Analog sense leakage
current
Unit
1430 2140 2890
V
1
μA
2
VSENSEH
Analog sense output
voltage in overtemperature VCC = 13 V, RSENSE = 10 KΩ
condition
9
V
ISENSEH
Analog sense output
current in overtemperature
condition
VCC = 13 V, VSENSE = 5 V
8
mA
Delay response time from
rising edge of INPUT pin
VSENSE < 4 V,
0.5 A < IOUT < 4 A,
ISENSE = 90% of ISENSE max
(see Figure 3)
80
250
μs
Delay response time from
falling edge of INPUT pin
VSENSE < 4 V,
0.5 A < IOUT < 4 A,
ISENSE = 10% of ISENSE max
(see Figure 3)
100
250
μs
tDSENSE2H
tDSENSE2L
DocID16084 Rev 7
11/34
33
Electrical specification
VN5772AK-E
Figure 3. Current sense delay characteristics
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Figure 4. Switching time waveforms
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T
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TDON
TDOFF
T
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Figure 5. Output voltage drop limitation
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12/34
DocID16084 Rev 7
VN5772AK-E
Electrical specification
Table 11. Truth table high-side driver
Conditions
Input
Output
Sense
Normal operation
L
H
L
H
0
Nominal
Overtemperature
L
H
L
L
0
VSENSEH
Undervoltage
L
H
L
L
0
0
Short-circuit to GND
(RSC 10 mΩ)
L
H
H
L
L
L
0
0 if Tj < TTSD
VSENSEH if Tj > TTSD
Short-circuit to VCC
L
H
H
H
0
< Nominal
Negative output voltage
clamp
L
L
0
DocID16084 Rev 7
13/34
33
Electrical specification
VN5772AK-E
Table 12. Electrical transient requirements (part 1/3)
Test levels (1)
ISO 7637-2:
2004(E)
test pulse
III
IV
Number of
pulses or
test times
1
-75V
-100V
5000 pulses
0.5s
5s
2 ms, 10Ω
2a
+37V
+50V
5000 pulses
0.2s
5s
50μs, 2Ω
3a
-100V
-150V
1h
90ms
100ms
0.1μs, 50Ω
3b
+75V
+100V
1h
90ms
100ms
0.1μs, 50Ω
4
-6V
-7V
1 pulse
100ms, 0.01Ω
5b(2)
+65V
+87V
1 pulse
400ms, 2Ω
Burst cycle / pulse
repetition time
Delays and
Impedance
1. The above test levels must be considered referred to VCC = 13.5 V except for pulse 5b.
2. Valid in case of external load dump clamp: 40 V maximum referred to ground.
Note:
Valid for HSD and H-bridge configuration.
Table 13. Electrical transient requirements (part 2/3)
Test level results(1)
ISO 7637-2:
2004E
test pulse
III
VI
1
C
C
2a
C
C
3a
C
C
3b
C
C
4
C
C
5b(2)
C
C
1. The above test levels must be considered referred to VCC = 13.5 V except for pulse 5b.
2. Valid in case of external load dump clamp: 40V maximum referred to ground.
Table 14. Electrical transient requirements (part 3/3)
Class
14/34
Contents
C
All functions of the device performed as designed after exposure to disturbance.
E
One or more functions of the device are not performed as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.
DocID16084 Rev 7
VN5772AK-E
2.4
Electrical specification
Electrical characteristics curves for dual high-side switches
Figure 6. Off-state output current
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Figure 11. Input voltage hysteresis
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DocID16084 Rev 7
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15/34
33
Electrical specification
VN5772AK-E
Figure 12. On-state resistance vs Tcase
Figure 13. On-state resistance vs VCC
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Figure 15. Turn-on voltage slope
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DocID16084 Rev 7
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VN5772AK-E
2.5
Electrical specification
Electrical characteristics for low-side switch
Values specified in this section are for -40 °C < Tj < 150 °C, unless otherwise specified
Table 15. PowerMOS section - off
Symbol
VCLAMP
VCLTH
IDSS
Parameter
Test conditions
Min.
Typ.
Max.
Unit
46
52
V
Drain-source voltage
clamp
VIN = 0 V; ID = 2 A
41
Drain-source threshold
voltage clamp
VIN = 0 V; ID = 2 mA
36
VDS = 13 V; VIN = 0 V; Tj = 25°C
0
3
VDS = 13 V; VIN = 0 V; Tj = 125°C
0
5
Zero input voltage
Drain current
(VIN = 0 V)
V
μA
Table 16. PowerMOS section - on
Symbol
RDS(on)
Parameter
Test conditions
Static drain-source
on-resistance
Min.
Typ.
Max.
Unit
VIN = 5 V; ID = 2 A; Tj = 25 °C
—
—
50
mΩ
VIN = 5 V; ID = 2 A; Tj = 150 °C
—
—
100
mΩ
Table 17. Switching (Tj = 25° C, unless otherwise specified)
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
td(on)
Turn-on delay time
RL = 6.5 ΩVCC = 13 V
—
6
—
μs
td(off)
Turn-off delay time
RL = 6.5 ΩVCC = 13 V
—
20
—
μs
tr
Turn-on voltage slope
RL = 6.5 ΩVCC = 13 V
—
10
—
μs
tf
Turn-off voltage slope
RL = 6.5 ΩVCC = 13 V
—
10
—
μs
WON
Switching energy losses
during twon
RL = 6.5 ΩVCC = 13 V
—
0.04
—
mJ
WOFF
Switching energy losses
during twoff
RL = 6.5 ΩVCC = 13 V
—
0.06
—
mJ
Min.
Typ.
Max.
Unit
—
0.8
—
V
Table 18. Source drain diode
Symbol
VSD(1)
Parameter
Forward on voltage
Test conditions
ISD = 2 A; VIN = 0 V
1. Pulsed: Pulse duration = 300 s, duty cycle 1.5%
Table 19. Input section
Symbol
IISS
Parameter
Test conditions
Supply current from input pin
On-state: VIN = 5 V;
VDS = 0 V
DocID16084 Rev 7
Min.
Typ.
Max.
Unit
30
110
μA
17/34
33
Electrical specification
VN5772AK-E
Table 19. Input section (continued)
Symbol
Parameter
VICL
Test conditions
IS = 1 mA
Input voltage clamp
Typ.
Max.
5.5
IS = -1 mA
Input voltage threshold
VINTH
Min.
7
-0.7
VDS = VIN; ID = 1 mA
1
3.5
Unit
V
V
Table 20. STATUS pin
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
VSTAT
Status low output
voltage
ISTAT = 1 mA
0.5
V
ILSTAT
Status leakage current
Normal operation,
VSTAT = 5 V
10
μA
CSTAT
STATUS pin input
capacitance
Normal operation,
VSTAT = 5 V
100
pF
VSTCL
Status voltage clamp
ISTAT = 1 mA
5.5
ISTAT = -1 mA
7
-0.7
V
Table 21. Protection and diagnostics (-40 °C < Tj < 150 °C, unless otherwise specified)
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
19
27
38
A
IlimH
DC short-circuit current
VDS = 13 V, VIN = 5 V
IlimL
Short-circuit current
during thermal cycling
VDS = 13 V, TR < Tj < TTSD
tdlim
Step response current limit VIN = 5 V, VDS = 13 V
TTSD
Overtemperature shutdown
150
Overtemperature reset
135
TR
11
A
20
μs
175
200
°C
Table 22. Truth table low-side driver
Conditions
18/34
Input
Drain
Status
Normal operation
L
H
H
L
H
H
Overtemperature
L
H
H
H
H
L
DocID16084 Rev 7
°C
VN5772AK-E
2.6
Electrical specification
Electrical characteristics curves for low-side switch
Figure 18. Source diode forward characteristics Figure 19. Static drain source on-resistance vs
drain current (3 pin)
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Figure 20. Static drain source on-resistance vs Figure 21. Static drain source on-resistance vs
input voltage (3 pin)
drain current
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Figure 22. Transfer characteristics
Figure 23. Output characteristics
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19/34
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Electrical specification
VN5772AK-E
Figure 24. Normalized on-resistance vs
temperature
Figure 25. Normalized input threshold vs
temperature
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3
Application information
Application information
Figure 26. Typical application schematic
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Mostly motor bridge drivers use a reverse battery protection diode (D) inside supply rail.
This diode prevents a reverse current flow back to Vbatt in case the bridge gets disabled via
the logic inputs while motor inductance still carries energy. In order to prevent a hazardous
overvoltage at circuit supply terminal (VCC), a blocking capacitor (C) is needed to limit the
voltage overshoot. As basic orientation, 50 μF per 1 A load current is recommended. In
alternative, also a Zener protection (Z) is suitable.
Even if a reverse polarity diode is not present, it is recommended to use a capacitor or zener
at VCC because a similar problem appears in case supply terminal of the module has
intermittent electrical contact to the battery or gets disconnected while motor is operating.
DocID16084 Rev 7
21/34
33
Application information
VN5772AK-E
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Figure 27. Recommended motor operation
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22/34
DocID16084 Rev 7
VN5772AK-E
Application information
Figure 28. Waveforms (high-side switches)
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DocID16084 Rev 7
23/34
33
Application information
3.1
VN5772AK-E
Maximum demagnetization energy (VCC = 13.5 V)
Figure 29. Maximum turn-off current vs load inductance
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24/34
DocID16084 Rev 7
VN5772AK-E
Package and PC board thermal data
4
Package and PC board thermal data
4.1
SO-28 thermal data
Figure 30. SO-28 PC board
Figure 31. Chipset configuration
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25/34
33
Package and PC board thermal data
VN5772AK-E
Figure 32. Auto and mutual Rthj-amb vs PCB copper area in open box free air
condition
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See Figure 31. For more detailed information see Table 24 and Table 25.
Table 23. Thermal calculations in clockwise and anti-clockwise operation in steadystate mode
HS1
HS2
LS3
LS4
TjHS12
TjLS3
TjLS4
On
Off
Off
On
PdHS1 x RthHSLS +
PdHS1 x RthHS + PdLS4 x PdHS1 x RthHSLS +
RthHSLS + Tamb
PdLS4 x RthLSLS + Tamb PdLS4 x RthLS + Tamb
Off
On
On
Off
PdHS2 x RthHS + PdLS3 x PdHS2 x RthHSLS +
RthHSLS + Tamb
PdLS3 x RthLS + Tamb
PdHS2 x RthHSLS +
PdLS3 x RthLSLS + Tamb
Table 24. Thermal resistances definitions
Definition(1)
Parameter
RthHS = RthHS1 = RthHS2
High-side chip thermal resistance junction-to-ambient (HS1
or HS2 in on-state)
RthLS = RthLS3 = RthLS4
Low-side chip thermal resistance junction-to-ambient
RthHSLS = RthHS1LS4 = RthHS2LS3
Mutual thermal resistance junction-to-ambient between highside and low-side chips
RthLSLS = RthLS3LS4
Mutual thermal resistance junction-to-ambient between lowside chips
1. Values dependent on PCB heatsink area.
Table 25. Single pulse thermal impedance definitions
Definition (1)
Parameter
ZthHS
High-side chip thermal impedance junction-to-ambient
ZthLS = ZthLS3 = ZthLS4
Low-side chip thermal impedance junction-to-ambient
ZthHSLS = ZthHS12LS3 = ZthHS12LS4
Mutual thermal impedance junction-to-ambient between
high-side and low-side chips
ZthLSLS = ZthLS3LS4
Mutual thermal impedance junction-to-ambient between lowside chips
1. Values dependent on PCB heatsink area.
26/34
DocID16084 Rev 7
VN5772AK-E
Package and PC board thermal data
Table 26. Thermal calculations in transient mode
Definition(1)
Parameter
TjHS12
ZthHS x PdHS12 + ZthHSLS x (PdLS3 + PdLS4) + Tamb
TjLS3
ZthHSLS x PdHS12 + ZthLS x PdLS3 + ZthLSLS x PdLS4 + Tamb
TjLS4
ZthHSLS x PdHS12 + ZthLSLS x PdLS3 + ZthLS x PdLS4 + Tamb
1. Calculation is valid in any dynamic operating condition. Pd values set by user.
Figure 33. SO-28 HSD thermal impedance junction-ambient single pulse
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DocID16084 Rev 7
27/34
33
Package and PC board thermal data
VN5772AK-E
Figure 34. SO-28 LSD thermal impedance junction-ambient single pulse
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Equation 1: Pulse Calculation Formula
Z TH = R TH + Z THtp 1 –
where = tP/T
28/34
DocID16084 Rev 7
VN5772AK-E
Package and PC board thermal data
Figure 35. Thermal fitting model of an H-bridge in SO-28
Table 27. Thermal parameters
Area/island (cm2)
FP
4(1)
16(1)
R1 = R5 = R6 = R10 (°C/W)
1.5
R2 = R7 = R11 (°C/W)
5.5
R3 (°C/W)
36
34
32
R4 (°C/W)
50
43
36
R8 = R12 (°C/W)
40
38
36
R9 = R13 (°C/W)
54
52
50
R14 = R15 (°C/W)
120
R16 = R17 (°C/W)
200
R18 (°C/W)
400
350
300
C1 = C5 (W·s/°C)
0.00025
C2 = C7 = C11 (W·s/°C)
0.04
C3 (W·s/°C)
0.2
C4 (W·s/°C)
2.2
3
4
C6 = C10 (W·s/°C)
0.00075
C8 = C12 (W·s/°C)
0.15
C9 = C13 (W·s/°C)
1.6
1.8
2
1. A blank space means that the value is the same as the previous one
DocID16084 Rev 7
29/34
33
Package information
5
VN5772AK-E
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
5.1
SO-28 package mechanical data
Figure 36. SO-28 package outline
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*$3*36
Table 28. SO-28 mechanical data
Dimensions
Ref.
Millimeters
Min.
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Typ.
Max.
A
2.35
2.65
A1
0.10
0.30
B
0.33
0.51
C
0.23
0.32
D(1)
17.70
18.10
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Package information
Table 28. SO-28 mechanical data
Dimensions
Ref.
Millimeters
Min.
E
Typ.
7.40
e
Max.
7.60
1.27
H
10.0
10.65
h
0.25
0.75
L
0.40
1.27
k
0°
8°
ddd
0.10
1. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusions or gate burrs shall not exceed 0.15mm per side.
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Package information
5.2
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Packing information
Figure 37. SO-28 tube shipment (no suffix)
&
%
%DVH4W\
%XON4W\
7XEHOHQJWK
$
%
&
$OOGLPHQVLRQVDUHLQPP
$
*$3*36
Figure 38. SO-28 tape and reel shipment (suffix “TR”)
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6
Revision history
Revision history
Table 29. Document revision history
Date
Revision
30-Jul-2009
1
Initial release.
10-Sep-2009
2
Updated following figures:
– Figure 29: Maximum turn-off current vs load inductance
– Figure 32: Auto and mutual Rthj-amb vs PCB copper area in open
box free air condition
– Figure 33: SO-28 HSD thermal impedance junction-ambient single
pulse
– Figure 34: SO-28 LSD thermal impedance junction-ambient single
pulse
Updated Table 27: Thermal parameters.
14-Jan-2010
3
Updated Figure 26: Typical application schematic.
13-Jul-2011
4
Updated Features list
Updated Figure 35: Thermal fitting model of an H-bridge in SO-28
Updated Table 27: Thermal parameters
02-Nov-2011
5
Table 17: Switching (Tj = 25° C, unless otherwise specified):
– Changed (dVOUT/dt)on to tr
– Changed (dVOUT/dt)off to tf
Added following tables:
– Table 12: Electrical transient requirements (part 1/3)
– Table 13: Electrical transient requirements (part 2/3)
– Table 14: Electrical transient requirements (part 3/3)
19-Sep-2013
6
Updated Disclaimer.
7
Updated:
– Section 5.1: SO-28 package mechanical data;
– Tape dimensions in Figure 38: SO-28 tape and reel shipment
(suffix “TR”) on page 32.
02-Mar-2015
Changes
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