VN5E010AH
10 m high-side driver with analog current sense
for automotive applications
Features
Max supply voltage
VCC
41 V
Operating voltage range
VCC
4.5 V to 28 V
Typ. ON-state resistance
RON
10 m
Current limitation (typ)
ILIMH
85 A
IS
2 µA(1)
OFF-state supply current
– Reverse battery protection with self switch
on of the Power MOSFET (see Figure 32)
– Electrostatic discharge protection
1. Typical value with all loads connected
•
•
•
General
– Inrush current active management by
power limitation
– Very low standby current
– 3 V CMOS compatible inputs
– Optimized electromagnetic emissions
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC
european directive
– Very low current sense leakage
Diagnostic functions
– Proportional load current sense
– High current sense precision for wide
current range
– Current sense disable
– OFF-state open-load detection
– Output short to VCC detection
– Overload and short to ground (power
limitation) indication
– Thermal shutdown indication
Protection
– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss
of VCC
– Overtemperature shut down with
autorestart (thermal shutdown)
September 2013
Applications
•
All types of resistive, inductive and capacitive
loads
•
Suitable as LED driver
Description
The VN5E010AH is a single-channel high-side
driver manufactured in the ST proprietary
VIPower M0-5 technology and housed in the tiny
HPAK package. The VN5E010AH is designed to
drive 12 V automotive grounded loads delivering
protection, diagnostics and easy 3 V and 5 V
CMOS compatible interface with any
microcontroller.
The device integrates advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, overtemperature shut-off with autorestart and overvoltage active clamp. A dedicated
analog current sense pin is associated with every
output channel in order to provide ehnanced
diagnostic functions including fast detection of
overload and short-circuit to ground through
power limitation indication, overtemperature
indication, short-circuit to Vcc diagnosis and
ON- and OFF-state open-load detection.
The current sensing and diagnostic feedback of
the whole device can be disabled by pulling the
CS_DIS pin high to allow sharing of the external
sense resistor with other similar devices.
Doc ID 15984 Rev 3
1/37
www.st.com
1
Contents
VN5E010AH
Contents
1
Block diagram and pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3
2.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.5
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.1
Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.2
MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.3
Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.3.1
3.4
4
Maximum demagnetization energy (VCC = 13.5 V) . . . . . . . . . . . . . . . . . 27
Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
4.1
5
Short to VCC and OFF-state open-load detection . . . . . . . . . . . . . . . . . 26
HPAK thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
5.1
ECOPACK®
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
5.2
HPAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
5.3
HPAK suggested land pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
5.4
Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6
Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
7
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
2/37
Doc ID 15984 Rev 3
VN5E010AH
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Switching (VCC = 13 V, Tj = 25 °C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Current sense (8 V < VCC < 18 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Open load detection (8 V < VCC < 18 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
HPAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Doc ID 15984 Rev 3
3/37
List of figures
VN5E010AH
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
Figure 37.
Figure 38.
Figure 39.
Figure 40.
Figure 41.
Figure 42.
4/37
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Configuration diagram (top view) not in scale. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Open-load OFF-state delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Delay response time between rising edge of ouput current and rising edge of current sense
(CS enabled). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
IOUT/ISENSE vs. IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Maximum current sense ratio drift vs. load current(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
OFF-state open-load with external circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Short to VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
TJ evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
OFF-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
High-level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Low-level input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
High-level input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
ON-state resistance vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
ON-state resistance vs. VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
ILIMH Vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
High-level CS_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Low-level CS_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Maximum turn-off current versus inductance(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
PC board(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Rthj-amb vs. PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 28
HPAK thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Thermal fitting model of a single-channel HSD in HPAK(1) . . . . . . . . . . . . . . . . . . . . . . . . 29
HPAK package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
HPAK suggested pad layout(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
HPAK tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
HPAK tape and reel (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Doc ID 15984 Rev 3
VN5E010AH
1
Block diagram and pin configuration
Block diagram and pin configuration
Figure 1.
Block diagram
VCC
Reverse
Battery
Protection
Signal Clamp
Undervoltage
Control & Diagnostic
Power
Clamp
IN
DRIVER
VON
Limitation
Over
temp.
Current
Limitation
OFF State
Open load
CS_
DIS
VSENSEH
CS
Current
Sense
OUT
OVERLOAD PROTECTION
(ACTIVE POWER LIMITATION)
LOGIC
GND
Table 1.
Pin functions
Name
Function
VCC
Battery connection
OUT
Power output (1)
GND
Ground connection
IN
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output
switch state
CS
Analog CS pin, delivers a current proportional to the load current
CS_DIS
Active high CMOS compatible pin, to disable the CS pin
1. Pins 1 and 7 must be externally tied together.
Doc ID 15984 Rev 3
5/37
Block diagram and pin configuration
Figure 2.
Table 2.
6/37
VN5E010AH
Configuration diagram (top view) not in scale
1
2
3
4
OUT
GND
IN
Vcc
5
6
7
CS CS_DIS OUT
Suggested connections for unused and not connected pins
Connection / pin
CS
OUT
IN
CS_DIS
Floating
Not allowed
X
X
X
To ground
Through 1 k
resistor
Through 22 k
resistor
Through 10 k
resistor
Through 10 k
resistor
Doc ID 15984 Rev 3
VN5E010AH
2
Electrical specifications
Electrical specifications
Figure 3.
Current and voltage conventions
IS
VCC
ICSD
VCSD
IIN
VIN
VCC
IOUT
CS_DIS
OUT
IN
CS
VOUT
ISENSE
VSENSE
GND
IGND
2.1
Absolute maximum ratings
Stressing the device above the rating listed in the Table 3: Absolute maximum ratings may
cause permanent damage to the device . These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
program and other relevant quality document.
Table 3.
Absolute maximum ratings
Symbol
Parameter
Value
Unit
VCC
DC supply voltage
41
V
-VCC
Reverse DC supply voltage
16
V
IOUT
DC output current
Internally limited
A
-IOUT
Reverse DC output current
20
A
DC input current
-1 to 10
mA
DC current sense disable input current
-1 to 10
mA
VCC - 41
+VCC
V
V
645
mJ
IIN
ICSD
VCSENSE Current sense maximum voltage (VCC > 0)
EMAX
Maximum switching energy (single pulse)
(L = 2.2 mH; RL = 0; VBAT = 13.5 V; Tjstart = 150 °C;
IOUT = IlimL(Typ.))
Doc ID 15984 Rev 3
7/37
Electrical specifications
Table 3.
VN5E010AH
Absolute maximum ratings (continued)
Symbol
Value
Unit
VESD
Electrostatic discharge
(human body model: R = 1.5 k C = 100 pF)
– IN
– CS
– CS_DIS
– OUT
– VCC
4000
2000
4000
5000
5000
V
V
V
V
V
VESD
Charge device model (CDM-AEC-Q100-011)
750
V
Junction operating temperature
-40 to 150
°C
Storage temperature
-55 to 150
°C
Tj
Tstg
2.2
Thermal data
Table 4.
Symbol
8/37
Parameter
Thermal data
Parameter
Max. value
Unit
Rthj-case
Thermal resistance junction-case
0.55
°C/W
Rthj-amb
Thermal resistance junction-ambient
67.7
°C/W
Doc ID 15984 Rev 3
VN5E010AH
2.3
Electrical specifications
Electrical characteristics
Values specified in this section are for 8 V < VCC < 28 V, -40 °C < Tj < 150 °C, unless
otherwise specified.
Table 5.
Power section
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
VCC
Operating supply voltage
4.5
13
28
V
VUSD
Undervoltage shutdown
3.5
4.5
V
VUSDhyst
Undervoltage shutdown
hysteresis
0.5
IOUT = 6 A; Tj = 25 °C
RON
RON-Rev
Vclamp
IS
IL(off)
ON-state resistance
10
IOUT = 6 A; Tj = 150 °C
20
IOUT = 6 A; VCC = 5 V; Tj = 25 °C
13
RDSON in reverse battery VCC = -13 V; IOUT = -6 A;
condition
Tj = 25 °C
Clamp voltage
41
OFF-state: VCC = 13 V; Tj = 25 °C;
VIN = VOUT = VSENSE = 0 V
ON-state: VCC = 13 V; VIN = 5 V;
IOUT = 0 A
OFF-state output current
Table 6.
10
ICC = 20 mA; IOUT = 0 A
Supply current
V
VIN = VOUT = 0 V; VCC = 13 V;
Tj = 25 °C
0
VIN = VOUT = 0 V; VCC = 13 V;
Tj = 125 °C
0
m
m
46
52
V
2
5
µA
1.5
3
mA
0.01
3
µA
5
Switching (VCC = 13 V, Tj = 25 °C)
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
td(on)
Turn-on delay time
RL = 2.2
(see Figure 6)
-
40
-
µs
td(off)
Turn-off delay time
RL = 2.2
(see Figure 6)
-
28
-
µs
(dVOUT/dt)on
Turn-on voltage
slope
RL = 2.2
-
(see Figure 26)
-
Vµs
(dVOUT/dt)off
Turn-off voltage
slope
RL = 2.2
-
(see Figure 28)
-
Vµs
WON
Switching energy
losses at turn-on
(twon)
RL = 2.2
(see Figure 6)
-
2
-
mJ
WOFF
Switching energy
losses at turn-off
(twoff)
RL = 2.2
(see Figure 6)
-
0.6
-
mJ
Doc ID 15984 Rev 3
9/37
Electrical specifications
Table 7.
Symbol
VN5E010AH
Logic inputs
Parameter
Test conditions
VIL
Low-level input voltage
IIL
Low-level input current
VIH
High-level input voltage
IIH
High-level input current
VI(hyst)
Input hysteresis voltage
VICL
VIN = 0.9 V
Low-level CS_DIS current
VCSDH
High-level CS_DIS voltage
ICSDH
High-level CS_DIS current
Symbol
Parameter
IlimL
Short-circuit current
during thermal cycling
TTSD
Shutdown temperature
TR
Reset temperature
TRS
Thermal reset of status
VON
µA
2.1
V
V
5.5
7
-0.7
VCSD = 0.9 V
V
µA
2.1
V
10
0.25
5.5
ICSD = -1 mA
µA
V
7
-0.7
Test conditions
Min.
Typ.
Max.
VCC = 13 V
60
85
120
5 V < VCC < 28 V
VCC =13 V;
TR < Tj < TTSD
Output voltage drop
limitation
21
V
150
175
TRS + 1
TRS + 5
Unit
A
A
200
135
Thermal hysteresis
(TTSD - TR)
Turn-off output voltage
clamp
120
°C
°C
°C
7
°C
IOUT = 2 A; VIN = 0;
L = 6 mH
VCC - 41 VCC - 46 VCC - 52
V
IOUT = 0.5 A;
Tj = -40 °C to 150 °C
25
mV
1. To ensure long term reliability under heavy overload or short-circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles
10/37
V
1
VCSD = 2.1 V
ICSD = 1 mA
µA
Protection and diagnostics(1)
Short-circuit current
VDEMAG
V
0.9
CS_DIS clamp voltage
IlimH
THYST
0.9
0.25
VCSD(hyst) CS_DIS hysteresis voltage
Table 8.
Unit
1
IIN = -1 mA
ICSDL
Max.
10
IIN = 1 mA
Low-level CS_DIS voltage
Typ.
VIN = 2.1 V
Input clamp voltage
VCSDL
VCSCL
Min.
Doc ID 15984 Rev 3
VN5E010AH
Electrical specifications
Table 9.
Symbol
Current sense (8 V < VCC < 18 V)
Parameter
Test conditions
Min.
Typ.
Max.
K0
IOUT/ISENSE
IOUT = 0.25 A; VSENSE = 0.5 V
Tj = -40 °C to 150 °C
Tj = 25 °C to 150 °C
3000
3000
7410 12000
7410 11600
K1
IOUT/ISENSE
IOUT = 6 A; VSENSE = 0.5 V
Tj = -40 °C to 150 °C
Tj = 25 °C to 150 °C
5350
5510
6740
6740
Current sense ratio drift
IOUT = 6 A; VSENSE = 0.5 V;
VCSD=0V;
Tj = -40 °C to 150 °C
IOUT/ISENSE
IOUT = 10 A; VSENSE = 4 V
Tj = -40 °C to 150 °C
Tj = 25 °C to 150 °C
Current sense ratio drift
IOUT = 10 A; VSENSE= 4 V;
VCSD = 0 V;
Tj = -40 °C to 150 °C
IOUT/ISENSE
IOUT = 25 A; VSENSE = 4 V
Tj = -40 °C to 150 °C
Tj = 25 °C to 150 °C
Current sense ratio drift
IOUT = 25 A; VSENSE= 4 V;
VCSD = 0 V;
Tj = -40 °C to 150 °C
-8
8
IOUT = 0 A; VSENSE = 0 V;
VCSD = 5 V; VIN =0 V;
Tj = -40 °C to 150 °C
0
1
IOUT = 0 A; VSENSE = 0 V;
VCSD = 0 V; VIN = 5 V;
Tj = -40 °C to 150 °C
0
2
dK1/K1(1)
K2
dK2/K2(1)
K3
dK3/K3(1)
ISENSE0
Analog sense leakage
current
-15
5850
5800
-11
5915
5850
6420
6420
VSENSE
%
7690
7195
11
IOUT = 2 A; VSENSE = 0 V;
VCSD = 5 V; VIN = 5 V;
Tj = -40 °C to 150 °C
IOL
8500
7745
15
6570
6570
Unit
%
7000
6755
%
µA
1
Open load ON-state
current detection
threshold
VIN = 5 V, 8 V < VCC < 18 V
ISENSE = 5 µA
5
Max analog sense
output voltage
IOUT = 18 A; RSENSE = 3.9 k
5
80
mA
V
VSENSEH(2)
Analog sense output
V = 13 V; RSENSE = 3.9 k
voltage in fault condition CC
8
V
ISENSEH(2)
Analog sense output
current in fault
condition
9
mA
VCC = 13 V; VSENSE = 5 V
Doc ID 15984 Rev 3
11/37
Electrical specifications
Table 9.
VN5E010AH
Current sense (8 V < VCC < 18 V) (continued)
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
tDSENSE1H
Delay response time
from falling edge of
CS_DIS pin
VSENSE < 4 V,
1.5 A < IOUT < 25 A
ISENSE = 90% of ISENSE max
(see Figure 4)
50
100
µs
tDSENSE1L
Delay response time
from rising edge of
CS_DIS pin
VSENSE < 4 V,
1.5 A < IOUT < 25 A
ISENSE=10% of ISENSE max
(see Figure 4)
5
20
µs
tDSENSE2H
Delay response time
from rising edge of
IN pin
VSENSE < 4 V,
1.5 A < IOUT < 25 A
ISENSE=90% of ISENSE max
(see Figure 4)
270
600
µs
310
µs
250
µs
Delay response time
between rising edge of
tDSENSE2H
output current and rising
edge of current sense
tDSENSE2L
Delay response time
from falling edge of
IN pin
VSENSE < 4V,
ISENSE = 90% of ISENSEMAX,
IOUT = 90% of IOUTMAX
IOUTMAX= 3A (see Figure 7)
VSENSE < 4 V,
1.5 A < IOUT < 25 A
ISENSE=10% of ISENSE max
(see Figure 4)
100
1. Parameter guaranteed by design, it is not tested.
2. Fault condition includes: power limitation, over-temperature and open load OFF-state detection.
Table 10.
Symbol
VOL
Open load detection (8 V < VCC < 18 V)
Parameter
Open-load OFF-state
voltage detection
threshold
Output short-circuit to
tDSTKON VCC detection delay at
turn-off
12/37
Test conditions
VIN = 0 V
Min.
Typ.
Max.
Unit
2
See
Figure 5
4
V
See Figure 5
180
1200
µs
IL(off2)r
OFF-state output
current at VOUT = 4 V
VIN = 0 V; VSENSE = 0 V
VOUT rising from 0 V to 4 V
-120
90
µA
IL(off2)f
OFF-state output
current at VOUT = 2 V
VIN = 0 V; VSENSE = VSENSEH;
VOUT falling from VCC to 2 V
-50
90
µA
td_vol
Delay response from
output rising edge to
VSENSE rising edge in
open-load
VOUT = 4 V; VIN = 0 V
VSENSE = 90% of VSENSEH
20
µs
Doc ID 15984 Rev 3
VN5E010AH
Electrical specifications
Figure 4.
Current sense delay characteristics
INPUT
CS_DIS
LOAD CURRENT
CURRENT SENSE
tDSENSE2H
Figure 5.
tDSENSE1L
tDSENSE1H
tDSENSE2L
Open-load OFF-state delay timing
OUTPUT STUCK TO VCC
VIN
VOUT > VOL
VSENSEH
VCS
tDSTKON
Figure 6.
Switching characteristics
VOUT
tWon
tWoff
90%
80%
dVOUT/dt(off)
dVOUT/dt(on)
tr
10%
tf
t
INPUT
td(on)
td(off)
t
Doc ID 15984 Rev 3
13/37
Electrical specifications
Figure 7.
VN5E010AH
Delay response time between rising edge of ouput current and rising
edge of current sense (CS enabled)
VIN
tDSENSE2H
t
IOUT
IOUTMAX
90% IOUTMAX
t
ISENSE
ISENSEMAX
90% ISENSEMAX
t
Figure 8.
Output voltage drop limitation
Vcc-Vout
Tj=150oC
Tj=25oC
Tj=-40oC
Von
Von/Ron(T)
14/37
Doc ID 15984 Rev 3
Iout
VN5E010AH
Electrical specifications
Figure 9.
IOUT/ISENSE vs. IOUT
IOUT/ISENSE
12800
11600
A
10400
B
9200
8000
C
6800
D
5600
4400
E
3200
2000
-2
1
4
7
10
13
16
19
22
25
28
IOUT (A)
D: Min, Tj = 25 °C to 150 °C
E: Min, Tj = -40 °C to 150 °C
A: Max, Tj = -40 °C to 150 °C
B: Max, Tj = 25 °C to 150 °C
C: Typical, Tj = -40 °C to 150 °C
Figure 10. Maximum current sense ratio drift vs. load current(1)
dK/K (%)
20
15
A
10
5
0
-5
-10
B
-15
-20
4
7
10
13
16
19
22
25
28
IOUT (A)
A: Max, Tj = -40 °C to 150 °C
B: Min, Tj = -40 °C to 150 °C
1. Parameter guaranteed by design; it is not tested.
Doc ID 15984 Rev 3
15/37
Electrical specifications
Table 11.
VN5E010AH
Truth table
Input
Output
SENSE (VCSD = 0 V)(1)
Normal operation
L
H
L
H
0
Nominal
Overtemperature
L
H
L
L
0
VSENSEH
Undervoltage
L
H
L
L
0
0
H
X
(no power limitation)
Cycling
(power limitation)
Nominal
Conditions
Overload
H
VSENSEH
Short-circuit to GND
(power limitation)
L
H
L
L
0
VSENSEH
Open load OFF-state
(with external pull-up)
L
H
VSENSEH
Short-circuit to VCC
(external pull-up
disconnected)
L
H
H
H
VSENSEH
< Nominal
Negative output voltage
clamp
L
L
0
1. If the VCSD is high, the SENSE output is at a high-impedance, its potential depends on leakage currents
and external circuit.
16/37
Doc ID 15984 Rev 3
VN5E010AH
Electrical specifications
Table 12.
ISO 7637-2:
2004(E)
Test pulse
Electrical transient requirements (part 1)
Test levels(1)
III
IV
1
-75 V
-100 V
2a
+37 V
3a
Number of
pulses or
test times
Burst cycle/pulse
repetition time
Delays and
Impedance
Min.
Max.
5000 pulses
0.5 s
5s
2 ms, 10
+50 V
5000 pulses
0.2 s
5s
50 µs, 2
-100 V
-150 V
1h
90 ms
100 ms
0.1 µs, 50
3b
+75 V
+100 V
1h
90 ms
100 ms
0.1 µs, 50
4
-6 V
-7 V
1 pulse
100 ms, 0.01
+65 V
+87 V
1 pulse
400 ms, 2
(2)
5b
1. The above test levels must be considered referred to VCC = 13.5 V except for pulse 5b.
2. Valid in case of external load dump clamp: 40 V maximum referred to ground.
Table 13.
Electrical transient requirements (part 2)
ISO 7637-2:
2004(E)
Test level results
Test pulse
III
IV
1
C
C
2a
C
C
3a
C
C
3b
C
C
4
C
C
5b(1)
C
C
1. Valid in case of external load dump clamp: 40V maximum referred to ground.
Table 14.
Electrical transient requirements (part 3)
Class
Contents
C
All functions of the device are performed as designed after exposure to disturbance.
E
One or more functions of the device are not performed as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.
Doc ID 15984 Rev 3
17/37
Electrical specifications
2.4
VN5E010AH
Waveforms
Figure 11.
Normal operation
INPUT
Nominal load
Nominal load
IOUT
VSENSE
VCS_DIS
Figure 12. Overload or short to GND
INPUT
ILimH >
Power Limitation
Thermal cycling
ILimL >
IOUT
VSENSE
VCS_DIS
18/37
Doc ID 15984 Rev 3
VN5E010AH
Electrical specifications
Figure 13. Intermittent overload
INPUT
Overload
ILimH >
ILimL >
Nominal load
IOUT
VSENSEH>
VSENSE
VCS_DIS
Figure 14. OFF-state open-load with external circuitry
INPUT
VOUT > VOL
VOUT
VOL
IOUT
VSENSEH >
tDSTK(on)
VSENSE
VCS_DIS
Doc ID 15984 Rev 3
19/37
Electrical specifications
VN5E010AH
Figure 15. Short to VCC
Resistive
Short to VCC
Hard
Short to VCC
VOUT > VOL
VOL
VOUT
IOUT
tDSTK(on)
tDSTK(on)
VCS_DIS
Figure 16. TJ evolution in overload or short to GND
INPUT
Self-limitation of fast thermal transients
TTSD
THYST
TR
TJ_START
TJ
ILimH >
Power Limitation
< ILimL
IOUT
20/37
Doc ID 15984 Rev 3
VN5E010AH
2.5
Electrical specifications
Electrical characteristics curves
Figure 17. OFF-state output current
Figure 18. High-level input current
Iih [uA]
Iloff [nA]
5
6000
4.5
5000
Vin= 2.1V
4
3.5
4000
3
2.5
3000
2
2000
1.5
1
1000
0.5
0
-50
-25
0
25
50
75
100
125
150
175
0
-50
-25
0
25
Tc [°C]
125
150
175
Vil [V]
7
2
6.8
1.8
1.6
Iin= 1m A
6.4
1.4
6.2
1.2
6
1
5.8
0.8
5.6
0.6
5.4
0.4
5.2
0.2
-25
0
25
50
75
100
125
150
175
0
-50
-25
0
25
50
75
100
125
150
175
Tc [°C]
Tc [°C]
Figure 21. High-level input voltage
Figure 22. Input hysteresis voltage
Vihyst [V]
Vih [V]
1
4
0.9
3.5
0.8
3
0.7
2.5
0.6
2
0.5
1.5
0.4
0.3
1
0.2
0.5
0
-50
100
Figure 20. Low-level input voltage
Vicl [V]
5
-50
75
Tc [°C]
Figure 19. Input clamp voltage
6.6
50
0.1
-25
0
25
50
75
100
125
150
175
0
-50
Tc [°C]
-25
0
25
50
75
100
125
150
175
Tc [°C]
Doc ID 15984 Rev 3
21/37
Electrical specifications
VN5E010AH
Figure 23. ON-state resistance vs. Tcase
Figure 24. ON-state resistance vs. VCC
Ron [m Ohm ]
Ron [m Ohm ]
80
30
70
25
60
50
20
Iout= 6A
Vcc= 13V
40
30
Tc= 150°C
15
Tc= 125°C
10
Tc= 25°C
20
0
-50
Tc= -40°C
5
10
0
-25
0
25
50
75
100
125
150
175
0
5
10
15
Tc [°C]
20
25
30
35
40
Vcc [V]
Figure 25. Undervoltage shutdown
Figure 26. Turn-on voltage slope
(dVout/dt)On [V/m s]
Vusd [V]
1000
16
900
14
800
12
Vcc= 13V
Rl= 13Ω
700
10
600
8
500
400
6
300
4
200
2
0
-50
100
-25
0
25
50
75
100
125
150
175
0
-50
-25
0
25
50
75
100
125
150
175
Tc [°C]
Tc [°C]
Figure 27. ILIMH Vs. Tcase
Figure 28. Turn-off voltage slope
Ilim h [A]
(dVout/dt)Off [V/m s]
100
1000
900
Vcc= 13V
90
800
Vcc= 13V
Rl= 13Ω
700
80
600
70
500
400
60
300
50
200
100
40
-50
-25
0
25
50
75
Tc [°C]
22/37
100
125
150
175
0
-50
-25
0
25
50
75
Tc [°C]
Doc ID 15984 Rev 3
100
125
150
175
VN5E010AH
Electrical specifications
Figure 29. High-level CS_DIS voltage
Figure 30. CS_DIS clamp voltage
Vcsdh [V]
Vcsdcl [V]
4
10
3.5
9
Iin= 1m A
8
3
7
2.5
6
2
5
1.5
4
3
1
2
0.5
0
-50
1
-25
0
25
50
75
100
125
150
175
0
-50
Tc [°C]
-25
0
25
50
75
100
125
150
175
Tc [°C]
Figure 31. Low-level CS_DIS voltage
Vcsdl [V]
4
3.5
3
2.5
2
1.5
1
0.5
0
-50
-25
0
25
50
75
100
125
150
175
Tc [°C]
Doc ID 15984 Rev 3
23/37
Application information
3
VN5E010AH
Application information
Figure 32. Application schematic
+5V
VCC
20V
Rprot
CS_DIS
Dld
MCU
Rprot
IN
Rprot
OUT
CS
45V
RSENSE
GND
Cext
3.1
Load dump protection
Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
VCC max DC rating. The same applies if the device is subject to transients on the VCC line
that are greater than the ones shown in the ISO 7637-2 2004 (E) table.
3.2
MCU I/Os protection
When negative transients are present on the VCC line, the control pins is pulled negative to
approximatly -1.5 V. ST suggests to insert a resistor (Rprot) in line to prevent the
microcontroller I/Os pins to latch-up.
The value of these resistors is a compromise between the leakage current of microcontroller
and the current required by the HSD I/Os (input levels compatibility) with the latch-up limit of
microcontroller I/Os.
Equation 1
-VCCpeak / Ilatchup Rprot (VOHC - VIH ) / IIHmax
Calculation example:
For VCCpeak = - 1.5 V; Ilatchup 20 mA; VOHC 4.5 V
75 Rprot 240 k.
Recommended values: Rprot =10 kCEXT =10 nF.
24/37
Doc ID 15984 Rev 3
VN5E010AH
3.3
Application information
Current sense and diagnostic
The current sense pin performs a double function (see Figure 33: Current sense and
diagnostic):
?
Current mirror of the load current in normal operation, delivering a current
proportional to the load one according to a know ratio KX.
The current ISENSE can be easily converted to a voltage VSENSE by means of an
external resistor RSENSE. Linearity between IOUT and VSENSE is ensured up to 5 V
minimum (see parameter VSENSE in Table 9: Current sense (8 V < VCC < 18 V)). The
current sense accuracy depends on the output current (refer to current sense electrical
characteristics Table 9: Current sense (8 V < VCC < 18 V)).
?
Diagnostic flag in fault conditions, delivering a fixed voltage VSENSEH up to a
maximum current ISENSEH in case of the following fault conditions (refer to
Table 11: Truth table):
–
Power limitation activation
–
Overtemperature
–
Short to VCC in OFF-state
–
Open load in OFF-state with additional external components.
A logic level high on CS_DIS pin sets at the same time all the current sense pins of the
device in a high-impedance state, thus disabling the current monitoring and diagnostic
detection. This feature allows multiplexing of the microcontroller analog inputs by sharing of
sense resistance and ADC line among different devices.
Figure 33. Current sense and diagnostic
V PU
V BAT
V CC
Main MOSn
41V
PU_CMD
Overtemperature
IOUT /K X
R PU
+
OL OFF
ISENSEH
V OL
Pwr_Lim
OUTn
ILoff2r
ILoff2f
INPUTn
V SENSEH
CS_DIS
CURRENT
SENSEn
R PROT
To uC ADC
R SENSE
GND
Load
R PD
V SENSE
Doc ID 15984 Rev 3
25/37
Application information
3.3.1
VN5E010AH
Short to VCC and OFF-state open-load detection
Short to VCC
A short-circuit between VCC and output is indicated by the relevant current sense pin set to
VSENSEH during the device OFF-state. Small or no current is delivered by the current sense
during the ON-state depending on the nature of the short-circuit.
OFF-state open-load with external circuitry
Detection of an open load in off mode requires an external pull-up resistor RPU connecting
the output to a positive supply voltage VPU.
It is preferable VPU to be switched off during the module standby mode in order to avoid the
overall standby current consumption to increase in normal conditions, i.e. when load is
connected.
An external pull-down resistor RPD connected between output and GND is mandatory to
avoid misdetection in case of floating outputs in OFF-state (see Figure 33: Current sense
and diagnostic).
RPD must be selected in order to ensure VOUT < VOLmin unless pulled-up by the external
circuitry:
Equation 2
VOUT Pullup _ OFF RPD IL(off2)f VOLmin 2 V
RPD 22 kis recommended.
For proper open load detection in OFF-state, the external pull-up resistor must be selected
according to the following formula:
Equation 3
VOUT Pullup _ ON
RPD VPU RPU RPD IL(off2)r
VOLmax 4 V
RPU RPD
For the values of VOLmin ,VOLmax, IL(off2)r and IL(off2)f (see Table 10: Open load detection (8 V
< VCC < 18 V)).
26/37
Doc ID 15984 Rev 3
VN5E010AH
Maximum demagnetization energy (VCC = 13.5 V)
Figure 34. Maximum turn-off current versus inductance(1)
100
A
B
C
10
I (A)
3.4
Application information
1
0,1
1
L (mH)
10
100
A: Tjstart = 150 °C (single pulse)
B: Tjstart = 100 °C (repetitive pulse)
C: Tjstart = 125 °C (repetitive pulse)
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
1. Values are generated with RL = 0
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed
the temperature specified above for curves A and B.
Doc ID 15984 Rev 3
27/37
Package and PC board thermal data
VN5E010AH
4
Package and PC board thermal data
4.1
HPAK thermal data
Figure 35. PC board(1)
1. Layout condition of Rth and Zth measurements (PCB FR4 area = 58 mm x 58 mm,
PCB thickness =1.8 mm, Cu thickness = 70 µm, Copper areas: from minimum pad lay-out to 8 cm2).
Figure 36. Rthj-amb vs. PCB copper area in open box free air condition
RTHj_amb(°C/W)
70
65
60
55
50
45
40
35
30
0
2
4
6
PCB Cu heatsink area (cm^2)
28/37
Doc ID 15984 Rev 3
8
10
VN5E010AH
Package and PC board thermal data
Figure 37. HPAK thermal impedance junction ambient single pulse
ZTH (°C/W)
100
Cu=8 cm2
Cu=2 cm2
Cu=foot print
10
1
0.1
0.001
0.01
0.1
1
Time (s)
10
100
1000
Figure 38. Thermal fitting model of a single-channel HSD in HPAK(1)
1. The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
Doc ID 15984 Rev 3
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Package and PC board thermal data
VN5E010AH
Equation 4: pulse calculation formula
Z TH = R TH + Z THtp 1 –
where = tP/T
Table 15.
30/37
Thermal parameter
Area/island (cm2)
Footprint
R1 (°C/W)
0.01
R2 (°C/W)
0.15
R3 (°C/W)
0.5
R4 (°C/W)
8
R5 (°C/W)
4
8
28
22
12
R6 (°C/W)
31
25
16
C1 (W.s/°C)
0.005
C2 (W.s/°C)
0.05
C3 (W.s/°C)
0.1
C4 (W.s/°C)
0.4
C5 (W.s/°C)
0.8
1.4
3
C6 (W.s/°C)
3
6
9
Doc ID 15984 Rev 3
VN5E010AH
Package and packing information
5
Package and packing information
5.1
ECOPACK®
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
5.2
HPAK mechanical data
Figure 39. HPAK package dimension
Doc ID 15984 Rev 3
31/37
Package and packing information
Table 16.
VN5E010AH
HPAK mechanical data
Data book mm
Ref. dim
Nom.
Min.
Max.
A
2.20
2.40
A1
0.90
1.10
A2
0.03
0.23
b
0.40
0.55
b4
5.20
5.40
c
0.45
0.60
c2
0.48
0.60
D
6.00
6.20
6.40
6.60
e1
1.60
1.80
e2
3.30
3.50
e3
5.00
5.20
H
9.35
10.10
L
1
D1
5.10
E
E1
5.20
e
0.85
(L1)
2.80
L2
0.80
L4
R
1.00
0°
8°
0.20
V2
32/37
0.60
Doc ID 15984 Rev 3
VN5E010AH
5.3
Package and packing information
HPAK suggested land pattern
Figure 40. HPAK suggested pad layout(1)
All dimensions are in mm.
1. The land pattern proposed is not intended to overrule User's PCB design, manufacturing and soldering
process rules
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Package and packing information
5.4
VN5E010AH
Packing information
The devices can be packed in tube or tape and reel shipments (see Table 17: Device
summary).
Figure 41. HPAK tube shipment (no suffix)
A
Base q.ty
Bulk q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
C
B
75
3000
532
6
21.3
0.6
All dimensions are in mm.
Figure 42. HPAK tape and reel (suffix “TR”)
REEL DIMENSIONS
All dimensions are in mm.
Base q.ty
Bulk q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
2500
2500
330
1.5
13
20.2
16.4
60
22.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width
Tape hole spacing
Component spacing
Hole diameter
Hole diameter
Hole position
Compartment depth
Hole spacing
W
P0 (± 0.1)
P
D (± 0.1/-0)
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
All dimensions are in mm.
16
4
8
1.5
1.5
7.5
2.75
2
End
Start
Top
cover
tape
No components
Components
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
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500mm min
VN5E010AH
6
Order codes
Order codes
Table 17.
Device summary
Order codes
Package
6 pins HPAK
Tube
Tape and reel
VN5E010AH-E
VN5E010AHTR-E
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Revision history
7
VN5E010AH
Revision history
Table 18.
36/37
Document revision history
Date
Revision
Changes
2-Jul-2009
1
Initial release.
02-Oct-2009
2
Updated Table 10: Open load detection (8 V < VCC < 18 V).
19-Sep-2013
3
Updated Disclaimer.
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