VN5E016MH-E
16 mΩ high-side driver with analog current sense for automotive
applications
Datasheet - production data
– Self limiting of fast thermal transients
– Protection against loss of ground and loss
of VCC
– Overtemperature shutdown with auto
restart (thermal shutdown)
– Reverse battery protected
– Electrostatic discharge protection
HPak
Applications
Features
Max supply voltage
VCC
41 V
Operating voltage range
VCC
4.5 to 28 V
Max on-state resistance (per ch.)
RON
16 mΩ
Current limitation (typ)
ILIMH
73 A
Off-state supply current
IS
2 µA(1)
1. Typical value with all loads connected.
• General
– Inrush current active management by
power limitation
– Very low standby current
– 3.0 V CMOS compatible inputs
– Optimized electromagnetic emissions
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC
European directive
• Diagnostic functions
– Proportional load current sense
– High current sense precision for wide
current range
– Current sense disable
– Overload and short to ground (power
limitation) indication
– Thermal shutdown indication
• Protections
– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
May 2014
This is information on a product in full production.
• All types of resistive, inductive and capacitive
loads
• Suitable as LED driver
Description
The VN5E016MH-E is a single channel high-side
driver manufactured in the ST proprietary
VIPower™ M0-5 technology and housed in the
tiny HPak package. The VN5E016MH-E is
designed to drive 12 V automotive grounded
loads delivering protection, diagnostics and easy
3 V and 5 V CMOS compatible interface with any
microcontroller.
The device integrates advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, overtemperature shut-off with auto
restart and overvoltage active clamp.
A dedicated analog current sense pin is
associated with every output channel in order to
provide enhanced diagnostic functions including
fast detection of overload and short-circuit to
ground through power limitation indication and
overtemperature indication.
The current sensing and diagnostic feedback of
the whole device can be disabled by pulling the
CS_DIS pin high to allow sharing of the external
sense resistor with other similar devices.
DocID17114 Rev 6
1/34
www.st.com
Contents
VN5E016MH-E
Contents
1
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3
2.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.5
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.1
4
3.1.1
Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 22
3.1.2
Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . 23
3.2
Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.3
MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.4
Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.5
Maximum demagnetization energy (VCC = 13.5 V) . . . . . . . . . . . . . . . . . 25
Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4.1
5
GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 22
HPak thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.1
ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.2
HPak mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.3
HPak packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
6
Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
7
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
2/34
DocID17114 Rev 5
VN5E016MH-E
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Switching (VCC = 13 V, Tj = 25 °C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Current sense (8 V < VCC < 18 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
HPak mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
DocID17114 Rev 5
3/34
3
List of figures
VN5E016MH-E
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
Figure 37.
Figure 38.
4/34
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Configuration diagram (top view) not in scale. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Delay response time between rising edge of output current and rising edge of current
sense (CS enabled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
IOUT/ISENSE vs IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
TJ evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Input clamp level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 26
HPak thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Thermal fitting model of a single channel HSD in HPak . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
KPak package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
HPak tube shipment (no suffix). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
HPak tape and reel (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
DocID17114 Rev 5
VN5E016MH-E
1
Block diagram and pin description
Block diagram and pin description
Figure 1. Block diagram
9&&
6LJQDO&ODPS
8QGHUYROWDJH
,1
&RQWURO 'LDJQRVWLF
3RZHU
&ODPS
'5,9(5
921
/LPLWDWLRQ
2YHU
WHPS
&XUUHQW
/LPLWDWLRQ
&6B
',6
96(16(
+
&6
&XUUHQW
6HQVH
287
29(5/2$'3527(&7,21
$&7,9(32:(5/,0,7$7,21
/2*,&
*1'
("1($'5
Table 1. Pin functions
Name
VCC
OUTPUT
GND
INPUT
CURRENT
SENSE
CS_DIS
Function
Battery connection
Power output (1)
Ground connection
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output
switch state
Analog current sense pin, delivers a current proportional to the load current
Active high CMOS compatible pin, to disable the current sense pin
1. Pins 1 and 7 must be externally tied together.
DocID17114 Rev 5
5/34
33
Block diagram and pin description
VN5E016MH-E
Figure 2. Configuration diagram (top view) not in scale
287*1',19FF&6&6B',6287
("1($'5
Table 2. Suggested connections for unused and not connected pins
6/34
Connection / pin
Current sense
Output
Input
CS_DIS
Floating
Not allowed
X
X
X
To ground
Through 1 kΩ
resistor
Through 22 kΩ
resistor
Through 10 kΩ
resistor
Through 10 kΩ
resistor
DocID17114 Rev 5
VN5E016MH-E
2
Electrical specifications
Electrical specifications
Figure 3. Current and voltage conventions
,6
9&&
,287
,&6'
287387
&6B',6
9&6'
,6(16(
,,1
,1387
9,1
9287
9&&
&855(17
6(16(
*1'
96(16(
,*1'
*$3*&)7
2.1
Absolute maximum ratings
Stressing the device above the rating listed in Table 3 may cause permanent damage to the
device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the Operating sections of this specification is not
implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect
device reliability.
Table 3. Absolute maximum ratings
Symbol
Parameter
Value
Unit
VCC
DC supply voltage
41
V
-VCC
Reverse DC supply voltage
0.3
V
IGND
DC reverse ground pin current
200
mA
IOUT
DC output current
Internally limited
A
-IOUT
Reverse DC output current
20
A
DC input current
-1 to 10
mA
DC current sense disable input current
-1 to 10
mA
VCC-41
+VCC
V
V
350
mJ
IIN
ICSD
VCSENSE Current sense maximum voltage (VCC > 0)
EMAX
Maximum switching energy (single pulse)
(L = 1.55 mH; RL = 0 Ω; Vbat = 13.5 V; Tjstart = 150 °C;
IOUT = IlimL(Typ.))
DocID17114 Rev 5
7/34
33
Electrical specifications
VN5E016MH-E
Table 3. Absolute maximum ratings (continued)
Symbol
Value
Unit
VESD
Electrostatic discharge (human body model: R = 1.5 KΩ;
C = 100 pF)
– Input
– Current sense
– CS_DIS
– Output
– VCC
4000
2000
4000
5000
5000
V
V
V
V
V
VESD
Charge device model (CDM-AEC-Q100-011)
750
V
Junction operating temperature
-40 to 150
°C
Storage temperature
-55 to 150
°C
Tj
Tstg
2.2
Parameter
Thermal data
Table 4. Thermal data
Symbol
8/34
Parameter
Max. value
Unit
Rthj-case Thermal resistance junction-case
0.63
°C/W
Rthj-amb
69.3
°C/W
Thermal resistance junction-ambient
DocID17114 Rev 5
VN5E016MH-E
2.3
Electrical specifications
Electrical characteristics
Values specified in this section are for 8 V < VCC < 28 V, -40 °C < Tj < 150 °C, unless
otherwise specified.
Table 5. Power section
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
4.5
13
28
V
4.5
V
VCC
Operating supply voltage
VUSD
Undervoltage shutdown
3.5
VUSDhyst
Undervoltage shutdown
hysteresis
0.5
RON
VF
Vclamp
IS
IL(off1)
V
IOUT = 5 A; Tj = 25 °C
16
mΩ
IOUT = 5 A; Tj = 150 °C
32
mΩ
IOUT = 5 A; VCC = 5 V; Tj = 25 °C
20
mΩ
Output - VCC diode
voltage
-IOUT = 5 A; Tj = 150 °C
0.7
V
Clamp voltage
ICC = 20 mA; IOUT = 0 A
46
52
V
Off-state; VCC = 13 V; Tj = 25 °C;
VIN = VOUT = VSENSE = 0 V
2
5
µA
On-state; VCC = 13 V; VIN = 5 V;
IOUT = 0 A
1.5
3
mA
0.01
3
µA
5
µA
On-state resistance
Supply current
Off-state output current
41
VIN = VOUT = 0 V; VCC = 13 V;
Tj = 25 °C
0
VIN = VOUT = 0 V; VCC = 13 V;
Tj = 125 °C
0
Table 6. Switching (VCC = 13 V, Tj = 25 °C)
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
td(on)
Turn-on delay time
RL = 2.6 Ω (see Figure 5)
—
15
—
µs
td(off)
Turn-off delay time
RL = 2.6 Ω (see Figure 5)
—
45
—
µs
(dVOUT/dt)on Turn-on voltage slope
RL = 2.6 Ω
—
0.2
—
V/µs
(dVOUT/dt)off Turn-off voltage slope
RL = 2.6 Ω
—
0.2
—
V/µs
WON
Switching energy
RL = 2.6 Ω (see Figure 5)
losses at turn-on (twon)
—
1.4
—
mJ
WOFF
Switching energy
RL = 2.6 Ω (see Figure 5)
losses at turn-off (twon)
—
0.8
—
mJ
DocID17114 Rev 5
9/34
33
Electrical specifications
VN5E016MH-E
Table 7. Logic inputs
Symbol
Parameter
Test conditions
VIL
Input low level voltage
IIL
Low level input current
VIH
Input high level voltage
IIH
High level input current
VI(hyst)
Input hysteresis voltage
VICL
Min.
VIN = 0.9 V
Typ.
ICSDL
Low level CS_DIS current
VCSDH
CS_DIS high level voltage
ICSDH
High level CS_DIS current
VCSD(hy
CS_DIS hysteresis voltage
V
µA
2.1
V
0.25
7
-0.7
V
V
0.9
VCSD = 0.9 V
µA
V
5.5
IIN = -1 mA
CS_DIS low level voltage
0.9
10
IIN = 1 mA
VCSDL
Unit
1
VIN = 2.1 V
Input clamp voltage
Max.
V
1
µA
2.1
V
VCSD = 2.1 V
10
0.25
µA
V
st)
VCSCL
ICSD = 1 mA
CS_DIS clamp voltage
5.5
ICSD = -1 mA
7
-0.7
V
V
Table 8. Protection and diagnostics (1)
Symbol
Parameter
Test conditions
VCC = 13 V
IlimH
Short circuit current
IlimL
Short circuit current
during thermal cycling
TTSD
Shutdown temperature
Reset temperature
TRS
Thermal reset of status
VDEMAG
VON
Typ.
Max.
Unit
54
73
108
A
108
A
5 V < VCC < 28 V
TR
THYST
Min.
VCC = 13 V;
TR < Tj < TTSD
18
150
175
TRS + 1
TRS + 5
A
200
135
Thermal hysteresis
(TTSD - TR)
IOUT = 2 A; VIN = 0;
L = 6 mH
Output voltage drop
limitation
IOUT = 0.5 A;
Tj = -40 °C to 150 °C
VCC -41
VCC -46 VCC -52
25
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
10/34
DocID17114 Rev 5
°C
°C
7
Turn-off output voltage
clamp
°C
°C
V
mV
VN5E016MH-E
Electrical specifications
Table 9. Current sense (8 V < VCC < 18 V)
Symbol
Parameter
Test conditions
K0
IOUT/ISENSE
IOUT = 0.25 A; VSENSE = 0.5 V;
Tj = -40 °C to 150 °C
K1
IOUT/ISENSE
IOUT = 5 A; VSENSE = 0.5 V;
Tj = -40 °C to 150 °C
Tj = 25 °C to 150 °C
dK1/K1(1)
K2
dK2/K2(1)
K3
dK3/K3(1)
ISENSE0
= 5 A; VSENSE = 0.5 V;
I
Current sense ratio drift OUT
VCSD = 0 V; Tj = -40 °C to 150 °C
IOUT = 10 A; VSENSE = 4 V;
Tj = -40 °C to 150 °C
Tj = 25 °C to 150 °C
IOUT/ISENSE
=10 A; VSENSE = 4 V;
I
Current sense ratio drift OUT
VCSD = 0 V; Tj = -40 °C to 150 °C
IOUT = 25 A; VSENSE = 4 V;
Tj = -40 °C to 150 °C
Tj = 25 °C to 150 °C
IOUT/ISENSE
= 25 A; VSENSE = 4 V;
I
Current sense ratio drift OUT
VCSD = 0 V; Tj= -40 °C to 150 °C
Analog sense leakage
current
Min.
Typ.
2836 6200 10444
4306 5200
4358 5200
7004
6106
- 11
+ 11
4608 5040
4501 5040
5926
5502
-8
+8
4612 4930
4566 4930
%
%
5367
5168
-4
+4
%
IOUT = 0 A; VSENSE = 0 V;
VCSD = 5 V; VIN = 0 V;
Tj = -40 °C to 150 °C
0
1
µA
VCSD = 0 V; VIN = 5 V;
Tj = -40 °C to 150 °C
0
2
µA
1
µA
70
mA
IOUT = 2 A; VSENSE = 0 V;
VCSD = 5 V; VIN = 5 V;
Tj = -40 °C to 150 °C
IOL
Openload ON-state
current detection
threshold
VIN = 5 V; ISENSE = 5 µA
5
VSENSE
Max analog sense
output voltage
IOUT =18 A; RSENSE = 3.9 KΩ
5
Analog sense output
VSENSEH(2) voltage in fault
condition
Max. Unit
V
VCC = 13V; RSENSE = 3.9 KΩ
8
V
mA
ISENSEH(2)
Analog sense output
current in fault
condition
VCC = 13 V; VSENSE = 5 V
9
tDSENSE1H
Delay response time
from falling edge of
CS_DIS pin
VSENSE < 4 V;
1.5 A < IOUT < 25 A;
ISENSE = 90 % of ISENSE max
(see Figure 4)
50
100
µs
tDSENSE1L
Delay response time
from rising edge of
CS_DIS pin
VSENSE < 4 V;
1.5 A < IOUT < 25 A;
ISENSE = 10 % of ISENSE max
(see Figure 4)
5
20
µs
DocID17114 Rev 5
11/34
33
Electrical specifications
VN5E016MH-E
Table 9. Current sense (8 V < VCC < 18 V) (continued)
Symbol
tDSENSE2H
Parameter
Test conditions
Delay response time
from rising edge of
INPUT pin
Delay response time
between rising edge of
ΔtDSENSE2H output current and
rising edge of current
sense
tDSENSE2L
Delay response time
from falling edge of
INPUT pin
Min.
VSENSE < 4 V;
1.5 A < IOUT < 25 A;
ISENSE = 90 % of ISENSE max
(see Figure 4)
Typ.
Max. Unit
270
600
µs
280
µs
250
µs
VSENSE < 4V;
ISENSE = 90 % of ISENSEMAX;
IOUT = 90 % of IOUTMAX;
IOUTMAX = 3 A (see Figure 7)
VSENSE < 4 V;
1.5 A < IOUT < 25 A;
ISENSE = 10 % of ISENSE max
(see Figure 4)
100
1. Parameter guaranteed by design, it is not tested.
2. Fault condition includes: power limitation and overtemperature.
Figure 4. Current sense delay characteristics
,1387
&6B',6
/2$'&855(17
6(16(&855(17
W'6(16(+
W'6(16(/
W'6(16(+
W'6(16(/
("1($'5
Figure 5. Switching characteristics
6 287
W:RQ
W:RII
G9287 GW RII
G9287 GW RQ
WU
WI
W
,1387
WG RQ
WG RII
W
("1($'5
12/34
DocID17114 Rev 5
VN5E016MH-E
Electrical specifications
Figure 6. Output voltage drop limitation
9FF9RXW
7M &
7M &
7M &
9RQ
9RQ5RQ 7
,RXW
("1($'5
Figure 7. Delay response time between rising edge of output current and rising edge
of current sense (CS enabled)
6 ,1
'W'6(16(+
W
,287
,2870$;
, 2870$;
W
,6(16(
,6(16(0$;
, 6(16(0$;
W
("1($'5
DocID17114 Rev 5
13/34
33
Electrical specifications
VN5E016MH-E
Figure 8. IOUT/ISENSE vs IOUT
Figure 9. Maximum current sense ratio drift vs load current
E,,
*065 "
("1($'5
1. Parameter guaranteed by design; it is not tested.
14/34
DocID17114 Rev 5
VN5E016MH-E
Electrical specifications
Table 10. Truth table
Input
Output
Sense (VCSD = 0 V)(1)
Normal operation
L
H
L
H
0
Nominal
Overtemperature
L
H
L
L
0
VSENSEH
Undervoltage
L
H
L
L
0
0
H
X
(no power limitation)
Cycling
(power limitation)
Nominal
Conditions
Overload
H
VSENSEH
Short circuit to GND (power
limitation)
L
H
L
L
0
VSENSEH
Negative output voltage clamp
L
L
0
1. If the VCSD is high, the SENSE output is at a high impedance, its potential depends on leakage currents
and external circuit.
DocID17114 Rev 5
15/34
33
Electrical specifications
VN5E016MH-E
Table 11. Electrical transient requirements (part 1)
ISO 7637-2:
2004(E)
Test levels
Number of
pulses or
test times
Burst cycle / pulse
repetition time
Delays and
impedance
Test pulse
III
IV
1
-75 V
-100 V
5000
pulses
0.5 s
5s
2 ms, 10 Ω
2a
+37 V
+50 V
5000
pulses
0.2 s
5s
50 µs, 2 Ω
3a
-100 V
-150 V
1h
90 ms
100 ms
0.1 µs, 50 Ω
3b
+75 V
+100 V
1h
90 ms
100 ms
0.1µs, 50 Ω
4
-6 V
-7 V
1 pulse
100 ms,
0.01Ω
5b(1)
+65 V
+87 V
1 pulse
400 ms, 2 Ω
1. Valid in case of external load dump clamp: 40 V maximum referred to ground.
Table 12. Electrical transient requirements (part 2)
Test level results(1)
ISO 7637-2:
2004(E)
Test pulse
III
IV
1
C
C
2a
C
C
3a
C
C
3b
C
C
4
C
C
5b(2)
C
C
1. The above test levels must be considered referred to VCC = 13.5 V except for pulse 5b
2. Valid in case of external load dump clamp: 40 V maximum referred to ground.
Table 13. Electrical transient requirements (part 3)
16/34
Class
Contents
C
All functions of the device are performed as designed after exposure to disturbance.
E
One or more functions of the device are not performed as designed after exposure
to disturbance and cannot be returned to proper operation without replacing the
device.
DocID17114 Rev 5
VN5E016MH-E
2.4
Electrical specifications
Waveforms
Figure 10. Normal operation
Normal operation
INPUT
Nominal load
Nominal load
IOUT
VSENSE
VCS_DIS
Figure 11. Overload or short to GND
Overload or Short to GND
INPUT
ILimH >
Power Limitation
Thermal cycling
ILimL >
IOUT
VSENSE
VCS_DIS
DocID17114 Rev 5
17/34
33
Electrical specifications
VN5E016MH-E
Figure 12. Intermittent overload
Intermittent Overload
INPUT
Overload
ILimH >
ILimL >
Nominal load
IOUT
VSENSEH >
VSENSE
VCS_DIS
Figure 13. TJ evolution in overload or short to GND
TJ evolution in
Overload or Short to GND
INPUT
Self-limitation of fast thermal transients
TTSD
THYST
TR
TJ_START
TJ
ILimH >
Power Limitation
< ILimL
IOUT
18/34
DocID17114 Rev 5
VN5E016MH-E
2.5
Electrical specifications
Electrical characteristics curves
Figure 14. Off-state output current
Figure 15. High level input current
,ORII>Q$@
,LK>X$@
9LQ 9
7F>&@
7F>&@
("1($'5
("1($'5
Figure 16. Input clamp level
Figure 17. Input low level
9LFO>9@
9LO>9@
,LQ P$
7F>&@
7F>&@
("1($'5
("1($'5
Figure 18. Input high level
Figure 19. Input hysteresis voltage
9LK\VW>9@
9LK>9@
7F>&@
7F>&@
("1($'5
DocID17114 Rev 5
("1($'5
19/34
33
Electrical specifications
VN5E016MH-E
Figure 20. On-state resistance vs Tcase
5RQ>P2KP@
Figure 21. On-state resistance vs VCC
5RQ>P2KP@
7F &
7F &
,RXW $
9FF 9
7F &
7F &
9FF>9@
7F>&@
("1($'5
("1($'5
Figure 22. Undervoltage shutdown
Figure 23. Turn-on voltage slope
9XVG>9@
G9RXWGW 2Q>9PV@
9FF 9
5O ȍ
7F>&@
7F>&@
("1($'5
("1($'5
Figure 24. ILIMH vs Tcase
Figure 25. Turn-off voltage slope
G9RXWGW 2II>9PV@
,OLPK>$@
9FF 9
9FF 9
5O ȍ
7F>&@
7F>&@
("1($'5
20/34
DocID17114 Rev 5
("1($'5
VN5E016MH-E
Electrical specifications
Figure 26. CS_DIS high level voltage
Figure 27. CS_DIS clamp voltage
9FVGK>9@
9FVGFO>9@
,LQ P$
7F>&@
7F>&@
("1($'5
("1($'5
Figure 28. CS_DIS low level voltage
9FVGO>9@
7F>&@
("1($'5
DocID17114 Rev 5
21/34
33
Application information
3
VN5E016MH-E
Application information
Figure 29. Application schematic
9
6 &&
5SURW
&6B',6
'OG
5SURW
P&
,,1387
287387
5SURW
&855(
176(16(
56(16(
&H[W
*1'
9*1'
5*1'
'*1'
("1($'5
3.1
GND protection network against reverse battery
3.1.1
Solution 1: resistor in the ground line (RGND only)
This can be used with any type of load.
The following is an indication on how to set the dimension of RGND resistor.
1) RGND ≤ 600 mV / (IS(on)max).
2) RGND ≥ (−VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device datasheet.
Power dissipation in RGND (when VCC < 0: during reverse battery situations) is:
Equation 1
PD = (-VCC)2/RGND
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the
maximum on-state currents of the different devices.
Please note that if the microprocessor ground is not shared by the device ground then the
RGND produces a shift (IS(on)max * RGND) in the input thresholds and the status output
values. This shift varies depending on how many devices are ON in the case of several high
side drivers sharing the same RGND.
22/34
DocID17114 Rev 5
VN5E016MH-E
Application information
If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests to utilize Solution 2 (see below).
3.1.2
Solution 2: a diode (DGND) in the ground line
A resistor (RGND = 1 kΩ) should be inserted in parallel to DGND if the device drives an
inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network produces a shift (≈600 mV) in the input threshold
and in the status output values if the microprocessor ground is not common to the device
ground. This shift not varies if more than one HSD shares the same diode/resistor network.
3.2
Load dump protection
Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
VCC max DC rating. The same applies if the device is subject to transients on the VCC line
that are greater than the ones shown in the ISO T/R 7637/1 table.
3.3
MCU I/Os protection
If a ground protection network is used and negative transients are present on the VCC line,
the control pins are pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent
the MCU I/O pins from latching-up.
The value of these resistors is a compromise between the leakage current of MCU and the
current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of MCU
I/Os.
Equation 2
-VCCpeak/Ilatchup ≤ Rprot ≤ (VOHμC-VIH-VGND) / IIHmax
Calculation example:
For VCCpeak= - 100 V and Ilatchup ≥ 20 mA; VOHμC ≥ 4.5 V
5 kΩ ≤ Rprot ≤ 65 kΩ.
Recommended values: Rprot =10 kΩ, CEXT=10 nF.
DocID17114 Rev 5
23/34
33
Application information
3.4
VN5E016MH-E
Current sense and diagnostic
The current sense pin performs a double function (see Figure 30: Current sense and
diagnostic):
•
Current mirror of the load current in normal operation, delivering a current
proportional to the load according to a known ratio KX.
The current ISENSE can be easily converted into a voltage VSENSE by means of an
external resistor RSENSE. Linearity between IOUT and VSENSE is ensured up to 5V
minimum (see parameter VSENSE in Table 9: Current sense (8 V < VCC < 18 V)). The
current sense accuracy depends on the output current (refer to current sense electrical
characteristics Table 9: Current sense (8 V < VCC < 18 V)).
•
Diagnostic flag in fault conditions, delivering a fixed voltage VSENSEH up to a
maximum current ISENSEH in case of the following fault conditions (refer to Table 10):
–
Power limitation activation
–
Overtemperature
A logic level high on CS_DIS pin sets at the same time all the current sense pins of the
device in a high impedance state, thus disabling the current monitoring and diagnostic
detection. This feature allows multiplexing of the microcontroller analog inputs by sharing of
sense resistance and ADC line among different devices.
Figure 30. Current sense and diagnostic
9%$7
9&&
0DLQ026Q
9
2YHUWHPSHUDWXUH
,287.;
,6(16(+
3ZUB/LP
287Q
96(16(+
&6B',6
&855(17
6(16(Q
*1'
/RDG
53527
7RX&$'&
56(16(
96(16(
("1($'5
24/34
DocID17114 Rev 5
VN5E016MH-E
Maximum demagnetization energy (VCC = 13.5 V)
Figure 31. Maximum turn-off current versus inductance
100
A
B
C
10
I (A)
3.5
Application information
1
0,1
1
L (mH)
10
100
A: Tjstart = 150°C single pulse
B: Tjstart = 100°C repetitive pulse
C: Tjstart = 125°C repetitive pulse
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
1. Values are generated with RL = 0 Ω. In case of repetitive pulses, Tjstart (at the beginning of each
demagnetization) of every pulse must not exceed the temperature specified above for curves A and B.
DocID17114 Rev 5
25/34
33
Package and PC board thermal data
VN5E016MH-E
4
Package and PC board thermal data
4.1
HPak thermal data
Figure 32. PC board
1. Layout condition of Rth and Zth measurements (PCB FR4 area = 58 mm x 58 mm,
PCB thickness = 1.8 mm, Cu thickness = 70 µm, Copper areas: from minimum pad lay-out to 8 cm2).
Figure 33. Rthj-amb vs PCB copper area in open box free air condition
RTHjamb
75
70
65
60
55
RTHjamb
50
45
40
35
30
0
26/34
2
4
DocID17114 Rev 5
6
8
10
VN5E016MH-E
Package and PC board thermal data
Figure 34. HPak thermal impedance junction ambient single pulse
Equation 3: pulse calculation formula:
Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ )
where
δ = tp ⁄ T
Figure 35. Thermal fitting model of a single channel HSD in HPak
1. The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
DocID17114 Rev 5
27/34
33
Package and PC board thermal data
VN5E016MH-E
Table 14. Thermal parameter
2
28/34
Area/island (cm )
Footprint
4
8
R1 (°C/W)
0.1
-
-
R2 (°C/W)
0.2
-
-
R3 (°C/W)
2
-
-
R4 (°C/W)
8
-
-
R5 (°C/W)
28
22
12
R6 (°C/W)
31
25
16
C1 (W.s/°C)
0.0001
-
-
C2 (W.s/°C)
0.002
-
-
C3 (W.s/°C)
0.05
-
-
C4 (W.s/°C)
0.4
-
-
C5 (W.s/°C)
0.8
1.4
3
C6 (W.s/°C)
3
6
9
DocID17114 Rev 5
VN5E016MH-E
Package and packing information
5
Package and packing information
5.1
ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
5.2
HPak mechanical data
Figure 36. KPak package dimension
DocID17114 Rev 5
29/34
33
Package and packing information
VN5E016MH-E
Table 15. HPak mechanical data
Data book mm
Ref. dim
Nom.
Min.
Max.
A
2.20
2.40
A1
0.90
1.10
A2
0.03
0.23
b
0.45
0.60
b4
5.20
5.40
c
0.45
0.60
c2
0.48
0.60
D
6.00
6.20
6.40
6.60
e1
1.60
1.80
e2
3.30
3.50
e3
5.00
5.20
H
9.35
10.10
L
1
D1
5.10
E
E1
5.20
e
0.85
(L1)
2.80
L2
0.80
L4
R
1.00
0°
8°
0.20
V2
30/34
0.60
DocID17114 Rev 5
VN5E016MH-E
5.3
Package and packing information
HPak packing information
The devices can be packed in tube or tape and reel shipments (see Table 16: Device
summary).
Figure 37. HPak tube shipment (no suffix)
A
Base q.ty
Bulk q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
C
75
3000
532
6
21.3
0.6
All dimensions are in mm.
B
Figure 38. HPak tape and reel (suffix “TR”)
REEL DIMENSIONS
All dimensions are in mm.
Base q.ty
Bulk q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
2500
2500
330
1.5
13
20.2
16.4
60
22.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width
Tape hole spacing
Component spacing
Hole diameter
Hole diameter
Hole position
Compartment depth
Hole spacing
W
P0 (± 0.1)
P
D (+ 0.1/-0)
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
All dimensions are in mm.
16
4
8
1.5
1.5
7.5
2.75
2
End
Start
Top
cover
tape
No components
Components
No components
500mm min
Empty components pockets
saled with cover tape.
500mm min
User direction of feed
DocID17114 Rev 5
31/34
33
Order codes
6
VN5E016MH-E
Order codes
Table 16. Device summary
Order codes
Package
7 pins H-pack
32/34
Tube
Tape and reel
Root part number 1
VN5E016MHTR-E
DocID17114 Rev 5
VN5E016MH-E
7
Revision history
Revision history
Table 17. Document revision history
Date
Revision
Changes
29-Jun-2010
1
Initial release.
30-Jun-2010
2
Changed status from target specification to preliminary data.
29-Jul-2010
3
Table 9: Current sense (8 V < VCC < 18 V):
– Updated K1 maximun value for Tj = 25 °C...150 °C
04-Aug-2010
4
Table 9: Current sense (8 V < VCC < 18 V):
– Updated K1, K2 and K3 typical values for Tj = -40 °C...150 °C
– Updated dK1/K1 test conditions
Updated Figure 8: IOUT/ISENSE vs IOUT.
19-Feb-2014
5
Changed document status from “Preliminary data” to “Production data”
07-May-2014
6
Updated Figure 2: Configuration diagram (top view) not in scale
DocID17114 Rev 5
33/34
33
VN5E016MH-E
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
time, without notice.
All ST products are sold pursuant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products
or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such
third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
ST PRODUCTS ARE NOT DESIGNED OR AUTHORIZED FOR USE IN: (A) SAFETY CRITICAL APPLICATIONS SUCH AS LIFE
SUPPORTING, ACTIVE IMPLANTED DEVICES OR SYSTEMS WITH PRODUCT FUNCTIONAL SAFETY REQUIREMENTS; (B)
AERONAUTIC APPLICATIONS; (C) AUTOMOTIVE APPLICATIONS OR ENVIRONMENTS, AND/OR (D) AEROSPACE APPLICATIONS
OR ENVIRONMENTS. WHERE ST PRODUCTS ARE NOT DESIGNED FOR SUCH USE, THE PURCHASER SHALL USE PRODUCTS AT
PURCHASER’S SOLE RISK, EVEN IF ST HAS BEEN INFORMED IN WRITING OF SUCH USAGE, UNLESS A PRODUCT IS
EXPRESSLY DESIGNATED BY ST AS BEING INTENDED FOR “AUTOMOTIVE, AUTOMOTIVE SAFETY OR MEDICAL” INDUSTRY
DOMAINS ACCORDING TO ST PRODUCT DESIGN SPECIFICATIONS. PRODUCTS FORMALLY ESCC, QML OR JAN QUALIFIED ARE
DEEMED SUITABLE FOR USE IN AEROSPACE BY THE CORRESPONDING GOVERNMENTAL AGENCY.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any
liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries.
Information in this document supersedes and replaces all information previously supplied.
The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
© 2014 STMicroelectronics - All rights reserved
STMicroelectronics group of companies
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
www.st.com
34/34
DocID17114 Rev 5
工商网监
湘ICP备2023018690号
