VN5E160MS-E
Single-channel high-side driver with analog
for automotive applications
Features
Max supply voltage
VCC
Operating voltage range
VCC 4.5 V to 28 V
Max ON-state resistance
(per ch.)
RON
160 mΩ
Current limitation (typ)
ILIMH
10 A
IS
2 µA(1)
OFF-state supply current
41 V
1. Typical value with all loads connected.
■
■
■
General
– Inrush current active management by
power limitation
– Very low standby current
– 3.0 V CMOS compatible inputs
– Optimized electromagnetic emission
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC
european directive
– Very low current sense leakage
Diagnostic functions
– Proportional load current sense
– High-precision current sense for
wide currents range
– Current sense disable
– Overload and short to ground
(power limitation) indication
– Thermal shutdown indication
Protections
– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self-limiting of fast thermal transients
– Protection against loss of ground and loss
of VCC
– Overtemperature shutdown with autorestart
(thermal shutdown)
– Reverse battery protected
September 2013
62
("1($'5
– Electrostatic discharge protection
Applications
■
All types of resistive, inductive and capacitive
loads
■
Suitable as LED driver
Description
The VN5E160MS-E is a single-channel high-side
driver manufactured in the ST proprietary
VIPower™ M0-5 technology and housed in the
tiny SO-8 package. The VN5E160MS-E is
designed to drive 12 V automotive grounded
loads delivering protection, diagnostics and easy
3 V and 5 V CMOS compatible interface with any
microcontroller.
The device integrates advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, overtemperature shut-off with
auto-restart and overvoltage active clamp.
A dedicated analog current sense pin is
associated with every output channel in order to
provide enhanced diagnostic functions including
fast detection of overload and short-circuit to
ground through power limitation indication and
overtemperature indication.
The current sensing and diagnostic feedback of
the whole device can be disabled by pulling the
CS_DIS pin high to allow sharing of the external
sense resistor with other similar devices.
Doc ID 15730 Rev 4
1/34
www.st.com
1
Contents
VN5E160MS-E
Contents
1
Block diagram and pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3
2.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.5
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.1
4
3.1.1
Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 22
3.1.2
Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . 23
3.2
Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.3
MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.4
Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.5
Maximum demagnetization energy (VCC = 13.5 V) . . . . . . . . . . . . . . . . . 25
Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4.1
5
GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 22
SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.1
ECOPACK® . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.2
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.3
Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
6
Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
7
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
2/34
Doc ID 15730 Rev 4
VN5E160MS-E
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Switching (VCC = 13 V; Tj = 25 °C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Current sense (8 V < VCC < 18 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Doc ID 15730 Rev 4
3/34
List of figures
VN5E160MS-E
List of figures
Figure 1.
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2.
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3.
Current and voltage conventions(1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4.
Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 5.
Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 6.
Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7.
Delay response time between rising edge of ouput current and rising edge of current sense
(CS enabled)14
Figure 8.
IOUT/ISENSE vs IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 9.
Maximum current sense ratio drift vs load current(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 10. Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 11. Overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 12. Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 13. TJ evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 14. OFF-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 15. High-level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 16. Input voltage clamp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 17. Low-level input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 18. High-level input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 19. Hysteresis input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 20. ON-state resistance vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 21. ON-state resistance vs. VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 22. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 23. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 24. ILIMH vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 25. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 26. High-level CS_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 27. CS_DIS voltage clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 28. Low-level CS_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 29. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 30. Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 31. Maximum turn-off current versus inductance (for each channel)(1) . . . . . . . . . . . . . . . . . . 25
Figure 32. SO-8 PC board(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 33. Rthj-amb vs. PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 26
Figure 34. SO-8 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 35. Thermal fitting model of an HSD in SO-8(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 36. SO-8 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 37. SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 38. SO-8 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
4/34
Doc ID 15730 Rev 4
VN5E160MS-E
1
Block diagram and pin configuration
Block diagram and pin configuration
Figure 1.
Block diagram
9&&
6LJQDO&ODPS
8QGHUYROWDJH
,1
&RQWURO 'LDJQRVWLF
3RZHU
&ODPS
'5,9(5
921
/LPLWDWLRQ
2YHU
WHPSHUDWXUH
&XUUHQW
/LPLWDWLRQ
&6B',6
96(16(
+
&6
&XUUHQW
6HQVH
287
29(5/
2$'3527(&7,21
$&7,9(32:(5/,0,7$7,21
/2*,&
*1'
*$3*&)7
Table 1.
Pin function
Name
Function
VCC
Battery connection
OUT
Power output
GND
Ground connection. Must be reverse battery protected by an external
diode/resistor network
IN
Voltage-controlled input pin with hysteresis, CMOS compatible. Controls output
switch state
CS
Analog current sense pin, delivers a current proportional to the load current
CS_DIS
Active high CMOS compatible pin, to disable the current sense pin
Doc ID 15730 Rev 4
5/34
Block diagram and pin configuration
Figure 2.
VN5E160MS-E
Configuration diagram (top view)
9&&
287
287
9&&
62
Table 2.
6/34
&6B',6
*1'
&6
,1
*$3*&)7
Suggested connections for unused and not connected pins
Connection / pin
Current sense
N.C.
Output
Input
CS_DIS
Floating
Not allowed
X
X
X
X
To ground
Through 1 kΩ
resistor
X
Not allowed
Doc ID 15730 Rev 4
Through 10 kΩ Through 10 kΩ
resistor
resistor
VN5E160MS-E
2
Electrical specifications
Electrical specifications
Figure 3.
Current and voltage conventions(1)
,6
9&&
,&6'
9)
,287
287
&6B',6
9287
9&6'
,,1
9&&
,1
,6(16(
&6
9,1
*1'
96(16(
,*1'
*$3*&)7
1. VF = VOUT - VCC during reverse battery condition.
2.1
Absolute maximum ratings
Stressing the device above the ratings listed in the Table 3: Absolute maximum ratings may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to the conditions in the Table 3: Absolute
maximum ratings for extended periods may affect device reliability. Refer also to the
STMicroelectronics SURE program and other relevant quality documents.
Table 3.
Absolute maximum ratings
Symbol
Parameter
Value
Unit
VCC
DC supply voltage
41
V
-VCC
Reverse DC supply voltage
0.3
V
- IGND
DC reverse ground pin current
200
mA
Internally limited
A
6
A
DC input current
-1 to 10
mA
DC current sense disable input current
-1 to 10
mA
200
mA
VCC - 41
+VCC
V
V
IOUT
- IOUT
IIN
ICSD
DC output current
Reverse DC output current
-ICSENSE DC reverse CS pin current
VCSENSE Current sense maximum voltage
Doc ID 15730 Rev 4
7/34
Electrical specifications
Table 3.
Absolute maximum ratings (continued)
Symbol
Parameter
Unit
36
mJ
Maximum switching energy (single pulse)
(L = 8 mH; RL = 0 Ω; Vbat = 13.5 V; Tjstart = 150 °C;
IOUT = IlimL(Typ.) )
VESD
Electrostatic discharge
(human body model: R = 1.5 KΩ; C = 100 pF)
– IN
– CS
– CS_DIS
– OUT
– VCC
4000
2000
4000
5000
5000
V
V
V
V
V
VESD
Charge device model (CDM-AEC-Q100-011)
750
V
Junction operating temperature
-40 to 150
°C
Storage temperature
-55 to 150
°C
Tstg
Thermal data
Table 4.
Symbol
Rthj-pins
Thermal data
Parameter
Thermal resistance junction-pins
Rthj-amb Thermal resistance junction-ambient
8/34
Value
EMAX
Tj
2.2
VN5E160MS-E
Doc ID 15730 Rev 4
Max value
Unit
30
°C/W
See Figure 33
°C/W
VN5E160MS-E
2.3
Electrical specifications
Electrical characteristics
Values specified in this section are for 8 V < VCC < 28 V; -40 °C < Tj < 150 °C, unless
otherwise stated.
Table 5.
Power section
Symbol
Parameter
Test conditions
VCC
Operating supply voltage
VUSD
VUSDhyst
RON
Vclamp
IS
IL(off1)
VF
Min. Typ. Max. Unit
13
28
V
Undervoltage shutdown
3.5
4.5
V
Undervoltage shutdown
hysteresis
0.5
ON-state resistance
Voltage clamp
4.5
IOUT = 1 A, Tj = 25 °C
160
IOUT = 1 A, Tj = 150 °C
320
IOUT = 1 A, VCC = 5 V, Tj = 25 °C
210
IS = 20 mA
Supply current
OFF-state output current
Output - VCC diode
voltage
V
41
mΩ
46
52
V
OFF-state: VCC = 13 V,
VIN = VOUT = 0 V, Tj = 25 °C
2(1)
5(1)
µA
ON-state: VIN = 5 V, VCC = 13 V,
IOUT = 0 A
1.9
3.5
mA
0.01
3
VIN = VOUT = 0 V, VCC = 13 V,
Tj = 25 °C
0
VIN = VOUT = 0 V, VCC = 13 V,
Tj = 125 °C
0
µA
-IOUT = 1 A, Tj = 150 °C
5
0.7
V
1. PowerMOS leakage included.
Table 6.
Symbol
Switching (VCC = 13 V; Tj = 25 °C)
Parameter
Test conditions
Min.
Typ.
Max.
Unit
td(on)
Turn-on delay time
RL = 13 Ω
(see Figure 5)
—
10
—
µs
td(off)
Turn-off delay time
RL = 13 Ω
(see Figure 5)
—
10
—
µs
dVOUT/dt(on) Turn-on voltage slope RL = 13 Ω
—
See Figure 23
—
V/µs
dVOUT/dt(off) Turn-off voltage slope RL = 13 Ω
—
See Figure 25
—
V/µs
WON
Switching energy
losses during twon
RL = 13 Ω
(see Figure 5)
—
0.05
—
mJ
WOFF
Switching energy
losses during twoff
RL = 13 Ω
(see Figure 5)
—
0.03
—
mJ
Doc ID 15730 Rev 4
9/34
Electrical specifications
Table 7.
Symbol
VN5E160MS-E
Logic inputs
Parameter
Test conditions
VIL
Low-level input voltage
IIL
Low-level input current
VIH
High-level input voltage
IIH
High-level input current
VI(hyst)
Input voltage hysteresis
VICL
ICSDL
Low-level CS_DIS current
VCSDH
High-level CS_DIS voltage
ICSDH
High-level CS_DIS current
VCSD(hyst)
CS_DIS voltage hysteresis
Symbol
CS_DIS voltage clamp
0.9
V
2.1
V
10
5.5
7
V
-0.7
VCSD = 0.9 V
µA
2.1
V
VCSD = 2.1 V
10
0.25
ICSD = 1 mA
V
1
µA
V
5.5
7
V
ICSD = -1 mA
-0.7
Protection and diagnostics(1)
Parameter
Test conditions
VCC = 13 V
Short-circuit current
V = 13 V; TR < Tj < TTSD
during thermal cycling CC
TTSD
Shutdown
temperature
TR
Reset temperature
TRS
Thermal reset of
STATUS
Min.
Typ.
Max.
Unit
7
10
14
A
14
A
5 V < VCC < 28 V
2.5
150
175
TRS + 1
TRS + 5
A
200
135
Thermal hysteresis
(TTSD - TR)
Turn-off output
voltage clamp
IOUT = 1 A, VIN = 0,
L = 20 mH
Output voltage drop
limitation
IOUT = 0.03 A (see Figure 8)
Tj = -40 °C to +150 °C
Doc ID 15730 Rev 4
°C
°C
°C
7
°C
VCC - 41 VCC - 46 VCC - 52
V
25
mV
1. To ensure long term reliability under heavy overload or short-circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
10/34
µA
V
0.9
IlimL
VON
Unit
0.25
DC short-circuit
current
VDEMAG
Max.
µA
VIN = 2.1 V
IlimH
THYST
Typ.
1
IIN = -1 mA
Low-level CS_DIS voltage
Table 8.
VIN = 0.9 V
IIN = 1 mA
Input voltage clamp
VCSDL
VCSCL
Min.
VN5E160MS-E
Electrical specifications
Table 9.
Symbol
K0
K1
dK1/K1(1)
K2
dK2/K2(1)
K3
dK3/K3(1)
ISENSE0
Current sense (8 V < VCC < 18 V)
Parameter
Test conditions
Min.
Typ.
Max.
IOUT/ISENSE
IOUT = 0.025 A, VSENSE = 0.5 V
Tj = -40 °C to 150 °C
265
490
715
IOUT/ISENSE
IOUT = 0.35 A, VSENSE = 0.5 V
Tj = -40 °C to 150 °C
Tj = 25 °C to 150 °C
355
385
465
465
575
545
Current sense ratio drift
IOUT =0.35 A, VSENSE = 0.5 V
Tj = -40 °C to 150 °C
IOUT/ISENSE
IOUT = 0.5 A, VSENSE = 4 V
Tj = -40 °C to 150 °C
Tj = 25 °C to 150 °C
Current sense ratio drift
IOUT = 0.5 A;
Tj = -40 °C to 150 °C
IOUT/ISENSE
IOUT = 1.5 A, VSENSE = 4 V
Tj = -40 °C to 150 °C
Tj = 25 °C to 150 °C
Current sense ratio drift
IOUT = 1.5 A;
Tj = -40 °C to 150 °C
-4
+4
IOUT = 0 A, VSENSE = 0 V,
VCSD = 5 V, VIN = 0 V,
Tj = -40 °C to 150 °C
0
1
IOUT = 0 A, VSENSE = 0 V,
VCSD = 0 V, VIN = 5 V,
Tj = -40 °C to 150 °C
0
2
IOUT = 1 A, VSENSE = 0 V,
VCSD = 5 V, VIN = 5 V,
Tj = -40 °C to 150 °C
0
1
5
Analog sense leakage
current
-11
380
400
+11
455
455
-8
420
420
IOL
ON-state open-load
current detection
threshold
VIN = 5 V, 8 V < VCC < 18 V
ISENSE = 5 µA
0.5
VSENSE
Max analog sense
output voltage
RSENSE = 10 KΩ; IOUT = 1 A;
5
%
530
510
+8
455
455
Unit
%
490
480
%
µA
mA
V
VSENSEH(2)
Analog sense output
V = 13 V, RSENSE = 3.9 KΩ
voltage in fault condition CC
8
V
ISENSEH(2)
Analog sense output
V = 13 V, VSENSE = 5 V
current in fault condition CC
9
mA
Delay response time
tDSENSE1H from falling edge of
CS_DIS pin
VSENSE < 4 V,
0.025 A < IOUT < 1.5 A
ISENSE = 90% of ISENSE max
(see Figure 4)
Doc ID 15730 Rev 4
40
100
µs
11/34
Electrical specifications
Table 9.
Symbol
VN5E160MS-E
Current sense (8 V < VCC < 18 V) (continued)
Parameter
Test conditions
Min.
Typ.
Max.
Unit
Delay response time
tDSENSE1L from rising edge of
CS_DIS pin
VSENSE < 4 V,
0.025 A < IOUT < 1.5 A
ISENSE = 10% of ISENSE max
(see Figure 4)
5
20
µs
Delay response time
tDSENSE2H from rising edge of IN
pin
VSENSE < 4 V,
0.025 A < IOUT < 1.5 A
ISENSE=90% of ISENSE max
(see Figure 4)
30
160
µs
Delay response time
between rising edge of
ΔtDSENSE2H
output current and rising
edge of current sense
VSENSE < 4 V,
ISENSE = 90% of ISENSEMAX,
IOUT = 90% of IOUTMAX
IOUTMAX=1.5A (see Figure 7)
110
µs
Delay response time
tDSENSE2L from falling edge of IN
pin
VSENSE < 4 V,
0.025 A < IOUT < 1.5 A
ISENSE=10% of ISENSE max
(see Figure 4)
250
µs
80
1. Parameter guaranteed by design; it is not tested.
2. Fault condition includes: power limitation and overtemperature.
Figure 4.
Current sense delay characteristics
,1387
&6B',6
/2$'&855(17
6(16(&855(17
W'6(16(+
W'6(16(/
W'6(16(+
W'6(16(/
$*9
12/34
Doc ID 15730 Rev 4
VN5E160MS-E
Electrical specifications
Figure 5.
Switching characteristics
9287
W:RQ
W:RII
G9287GW RII
G9287GW RQ
WU
WI
W
,1387
WG RQ
WG RII
W
*$3*&)7
Figure 6.
Output voltage drop limitation
9&&9287
7M &
7M &
7M &
921
,287
921521 7
$*9
Doc ID 15730 Rev 4
13/34
Electrical specifications
Figure 7.
VN5E160MS-E
Delay response time between rising edge of ouput current and rising
edge of current sense (CS enabled)
9,1
ǻW'6(16(+
W
,287
,2870$;
,2870$;
W
,6(16(
,6(16(0$;
,6(16(0$;
W
$*9
Figure 8.
IOUT/ISENSE vs IOUT
IOUT/ISENSE
620
590
560
A
530
B
500
470
C
440
410
D
380
E
350
320
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
IOUT (A)
A: Max, Tj = -40 °C to 150 °C
B: Max, Tj = 25 °C to 150 °C
C: Typical, Tj = -40 °C to 150 °C
14/34
Doc ID 15730 Rev 4
D: Min, Tj = 25 °C to 150 °C
E: Min, Tj = -40 °C to 150 °C
1.8
VN5E160MS-E
Electrical specifications
Figure 9.
Maximum current sense ratio drift vs load current(1)
dK/K (%)
15
12
9
A
6
3
0
-3
-6
B
-9
-12
-15
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
IOUT (A)
A: Max, Tj = -40 °C to 150 °C
B: Min, Tj = 25 °C to 150 °C
1. Parameter guaranteed by design; it is not tested.
Table 10.
Truth table
Conditions
IN
OUT
SENSE (VCSD = 0 V)(1)
Normal operation
L
H
L
H
0
Nominal
Overtemperature
L
H
L
L
0
VSENSEH
Undervoltage
L
H
L
L
0
0
H
X
(no power limitation)
Cycling
(power limitation)
Nominal
Overload
H
VSENSEH
Short-circuit to GND
(Power limitation)
L
H
L
L
0
VSENSEH
Negative output voltage
clamp
L
L
0
1. If the VCSD is high, the SENSE output is at a high impedance, its potential depends on leakage currents
and external circuit.
Doc ID 15730 Rev 4
15/34
Electrical specifications
Table 11.
ISO 7637-2:
2004(E)
VN5E160MS-E
Electrical transient requirements (part 1)
Test levels(1)
Number of
pulses or
test times
Burst cycle/pulse
repetition time
Delays and
Impedance
Test pulse
III
IV
1
-75 V
-100 V
5000
pulses
0.5 s
5s
2 ms, 10 Ω
2a
+37 V
+50 V
5000
pulses
0.2 s
5s
50 µs, 2 Ω
3a
-100 V
-150 V
1h
90 ms
100 ms
0.1 µs, 50 Ω
3b
+75 V
+100 V
1h
90 ms
100 ms
0.1 µs, 50 Ω
4
-6 V
-7 V
1 pulse
100 ms,
0.01 Ω
5b(2)
+65 V
+87 V
1 pulse
400 ms, 2 Ω
Table 12.
Electrical transient requirements (part 2)
Test level results(1)
ISO 7637-2:
2004(E)
Test pulse
III
IV
1
C
C
2a
C
C
3a
C
C
3b
C
C
4
C
C
5b(2)
C
C
1. The above test levels must be considered referred to VCC = 13.5 V except for pulse 5b
2. Valid in case of external load dump clamp: 40 V maximum referred to ground.
Table 13.
16/34
Electrical transient requirements (part 3)
Class
Contents
C
All functions of the device are performed as designed after exposure to disturbance.
E
One or more functions of the device are not performed as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.
Doc ID 15730 Rev 4
VN5E160MS-E
2.4
Electrical specifications
Waveforms
Figure 10. Normal operation
1RUPDORSHUDWLRQ
,1387
1RPLQDOORDG
1RPLQDOORDG
,287
96(16(
9&6B',6
$*9
Figure 11.
Overload or short to GND
2YHUORDGRU6KRUWWR*1'
,1387
3RZHU/LPLWDWLRQ
, /LP+!
7KHUPDOF\FOLQJ
, /LP/!
,287
96(16(
9&6B',6
$*9
Doc ID 15730 Rev 4
17/34
Electrical specifications
VN5E160MS-E
Figure 12. Intermittent overload
,QWHUPLWWHQW2YHUORDG
,1387
2YHUORDG
,/LP+ !
,/LP/ !
1RPLQDOORDG
,287
96(16(+ !
96(16(
9&6B',6
$* 9
Figure 13. TJ evolution in overload or short to GND
7- HYROXWLRQLQ
2YHUORDGRU6KRUWWR*1'
,1387
6HOIOLPLWDWLRQRIIDVWWKHUPDOWUDQVLHQWV
776'
7+Q$@
,LK>X$@
7JO 7
7F> &@
Figure 16. Input voltage clamp
Figure 17. Low-level input voltage
9LO>9@
*JO N"
*$3*&)7
9LFO>9@
7F> &@
*$3*&)7
7F> &@
7F> &@
*$3*&)7
Figure 18. High-level input voltage
*$3*&)7
Figure 19. Hysteresis input voltage
9LK\VW>9@
9LK>9@
7F> &@
7F> &@
*$3*&)7
*$3*&)7
Doc ID 15730 Rev 4
19/34
Electrical specifications
VN5E160MS-E
Figure 20. ON-state resistance vs. Tcase Figure 21. ON-state resistance vs. VCC
5RQ>P2KP@
5RQ>P2KP@
,RXW $
9FF 9
5D ¡$
5D ¡$
5D ¡$
5D ¡$
7F> &@
*$3*&)7
*$3*&)7
Figure 22. Undervoltage shutdown
Figure 23. Turn-on voltage slope
9XVG>9@
G9RXWGW 2Q>9PV@
9FF 9
5O ȍ
7F> &@
Figure 24. ILIMH vs. Tcase
*$3*&)7
Figure 25. Turn-off voltage slope
,OLPK>$@
G9RXWGW 2II>9PV@
9FF 9
7F> &@
*$3*&)7
7F> &@
9FF 9
5O ȍ
7F> &@
*$3*&)7
20/34
9FF>9@
Doc ID 15730 Rev 4
*$3*&)7
VN5E160MS-E
Electrical specifications
Figure 26. High-level CS_DIS voltage
Figure 27. CS_DIS voltage clamp
9FVGFO>9@
9FVGK>9@
*JO N"
7F> &@
7F> &@
*$3*&)7
*$3*&)7
Figure 28. Low-level CS_DIS voltage
9FVGO>9@
7F> &@
*$3*&)7
Doc ID 15730 Rev 4
21/34
Application information
3
VN5E160MS-E
Application information
Figure 29. Application schematic
9
9&&
5SURW
&6B',6
'OG
P&
5SURW
,1
287
5SURW
&6
*1'
56(16(
9*1'
&H[W
5*1'
'*1'
*$3*&)7
3.1
GND protection network against reverse battery
3.1.1
Solution 1: resistor in the ground line (RGND only)
This can be used with any type of load.
The following is an indication on how to dimension the RGND resistor.
1.
RGND ≤ 600 mV / (IS(on)max).
2.
RGND ≥ (−VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device datasheet.
Power dissipation in RGND (when VCC < 0: during reverse battery situations) is:
Equation 1
PD = (-VCC)2 / RGND
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the
maximum ON-state currents of the different devices.
Please note that if the microprocessor ground is not shared by the device ground then the
RGND produces a shift (IS(on)max * RGND) in the input thresholds and the status output
22/34
Doc ID 15730 Rev 4
VN5E160MS-E
Application information
values. This shift varies depending on how many devices are ON in the case of several
high-side drivers sharing the same RGND.
If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests to utilize Solution 2 (see Section 3.1.2: Solution 2: a
diode (DGND) in the ground line).
3.1.2
Solution 2: a diode (DGND) in the ground line
A resistor (RGND = 1 kΩ) should be inserted in parallel to DGND if the device drives an
inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network produces a shift (≈600 mV) in the input threshold
and in the status output values if the microprocessor ground is not common to the device
ground. This shift not varies if more than one HSD shares the same diode/resistor network.
3.2
Load dump protection
Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
VCC max DC rating. The same applies if the device is subject to transients on the VCC line
that are greater than the ones shown in the ISO T/R 7637/1 table.
3.3
MCU I/Os protection
If a ground protection network is used and negative transients are present on the VCC line,
the control pins is pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent
the microcontroller I/O pins to latch-up.
The value of these resistors is a compromise between the leakage current of microcontroller
and the current required by the HSD I/Os (input levels compatibility) with the latch-up limit of
microcontroller I/Os.
Equation 2
-VCCpeak / Ilatchup ≤ Rprot ≤ (VOHμC - VIH - VGND) / IIHmax
Calculation example:
For VCCpeak = - 100 V, Ilatchup ≥ 20 mA, VOHμC ≥ 4.5 V
5 kΩ ≤ Rprot ≤ 180 kΩ.
Recommended values: Rprot =10 kΩ, CEXT = 10 nF.
Doc ID 15730 Rev 4
23/34
Application information
3.4
VN5E160MS-E
Current sense and diagnostic
The current sense pin performs a double function (see Figure 30: Current sense and
diagnostic):
●
Current mirror of the load current in normal operation, delivering a current
proportional to the load one according to a know ration KX.
The current ISENSE can be easily converted to a voltage VSENSE by means of an
external resistor RSENSE. Linearity between IOUT and VSENSE is ensured up to 5 V
minimum (see parameter VSENSE in Table 9: Current sense (8 V < VCC < 18 V)). The
current sense accuracy depends on the output current (refer to current sense electrical
characteristics Table 9: Current sense (8 V < VCC < 18 V)).
●
Diagnostic flag in fault conditions, delivering a fixed voltage VSENSEH up to a
maximum current ISENSEH in case of the following fault conditions (refer to Table 10:
Truth table):
–
Power limitation activation
–
Overtemperature
A logic high-level on CS_DIS pin sets at the same time all the current sense pins of the
devices in a high-impedance-state, thus disabling the current monitoring and diagnostic
detection. This feature allows multiplexing of the microcontroller analog inputs by sharing of
sense resistance and ADC line among different devices.
Figure 30. Current sense and diagnostic
9 %$7
9 &&
0 DLQ0 2 6Q
9
2 YHUWHP SHUDWXUH
, 28 7 . ;
, 6(16(+
3ZUB/LP
2 8 7Q
9 6(16 (+
&6B' ,6
&8 55 (1 7
6(16( Q
* 1'
/RD G
5 352 7
7RX&$' &
5 6( 16(
9 6(16(
("1($'5
24/34
Doc ID 15730 Rev 4
VN5E160MS-E
Maximum demagnetization energy (VCC = 13.5 V)
Figure 31. Maximum turn-off current versus inductance (for each channel)(1)
, $
3.5
Application information
/ P+
*$3*&)7
A: Tjstart = 150 °C single pulse
B: Tjstart = 100 °C repetitive pulse
C: Tjstart = 125 °C repetitive pulse
9,1,/
'HPDJQHWL]DWLRQ
'HPDJQHWL]DWLRQ
'HPDJQHWL]DWLRQ
W
*$3*&)7
1. Values are generated with RL = 0 Ω.
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed
the temperature specified above for curves A and B.
Doc ID 15730 Rev 4
25/34
Package and PCB thermal data
VN5E160MS-E
4
Package and PCB thermal data
4.1
SO-8 thermal data
Figure 32. SO-8 PC board(1)
("1($'5
1. Layout condition of Rth and Zth measurements (PCB: FR4 area = 4.8 mm x 4.8 mm,
PCB thickness = 2 mm, Cu thickness = 35 µm, Copper areas: from minimum pad lay-out to 2 cm2).
Figure 33. Rthj-amb vs. PCB copper area in open box free air condition
RTHj_amb(°C/W)
110
100
90
80
70
60
0
0.5
1
1.5
PCB Cu heatsink area (cm^2)
26/34
Doc ID 15730 Rev 4
2
2.5
VN5E160MS-E
Package and PCB thermal data
Figure 34. SO-8 thermal impedance junction ambient single pulse
ZTH (°C/W)
1000
Footprint
100
2 cm2
10
1
0.1
0.0001
0.001
0.01
0.1
1
Time (s)
10
100
1000
Equation 3: pulse calculation formula
Z
THδ
= R
TH
⋅δ+Z
THtp
(1 – δ)
where δ = tP/T
Figure 35. Thermal fitting model of an HSD in SO-8(1)
*$3*&)7
1. The fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
Doc ID 15730 Rev 4
27/34
Package and PCB thermal data
Table 14.
28/34
VN5E160MS-E
Thermal parameters
Area/island (cm2)
Footprint
R1 (°C/W)
1.2
R2 (°C/W)
6
R3 (°C/W)
3.5
R4 (°C/W)
21
R5 (°C/W)
16
R6 (°C/W)
58
C1 (W.s/°C)
0.0008
C2 (W.s/°C)
0.0016
C3 (W.s/°C)
0.0075
C4 (W.s/°C)
0.045
C5 (W.s/°C)
0.35
C6 (W.s/°C)
1.05
Doc ID 15730 Rev 4
2
28
25
VN5E160MS-E
Package and packing information
5
Package and packing information
5.1
ECOPACK®
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Package mechanical data
Figure 36. SO-8 package dimensions
6
H
E
H
D
E
$
&
F
D
/
D
(
'
0
)
5.2
("1($'5
Doc ID 15730 Rev 4
29/34
Package and packing information
Table 15.
VN5E160MS-E
SO-8 mechanical data
mm.
Dim.
Min.
Typ.
A
a1
1.75
0.1
0.25
a2
1.65
a3
0.65
0.85
b
0.35
0.48
b1
0.19
0.25
C
0.25
0.5
c1
45 (typ.)
D
4.8
5
E
5.8
6.2
e
1.27
e3
3.81
F
3.8
4
L
0.4
1.27
M
0.6
S
L1
30/34
Max.
8 (max.)
0.8
Doc ID 15730 Rev 4
1.2
VN5E160MS-E
5.3
Package and packing information
Packing information
Figure 37. SO-8 tube shipment (no suffix)
%
Base q.ty
Bulk q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
&
$
100
2000
532
3.2
6
0.6
All dimensions are in mm.
("1($'5
Figure 38. SO-8 tape and reel shipment (suffix “TR”)
5((/
',0(16,216
%DVHTW\
%XONTW\
$ PD[
% PLQ
&
)
*
1 PLQ
7 PD[
$OOGLPHQVLRQVDUHLQPP
7$3(',0(16,216
$FFRUGLQJWR(OHFWURQLF,QGXVWULHV$VVRFLDWLRQ
(,$ 6WDQGDUGUHY$)HE
7DSHZLGWK
7DSHKROHVSDFLQJ
&RPSRQHQWVSDFLQJ
+ROHGLDPHWHU
+ROHGLDPHWHU
+ROHSRVLWLRQ
&RPSDUWPHQWGHSWK
+ROHVSDFLQJ
:
3
3
'
' PLQ
)
. PD[
3
$OOGLPHQVLRQVDUHLQPP
(QG
6WDUW
7R S
FRYHU
WDSH
1RFRPSRQHQWV
&RPSRQHQWV
1RFRPSRQHQWV
PPPLQ
(PSW\FRPSRQHQWVSRFNHWV
VDOHGZLWKFRYHUWDSH
PPPLQ
8VHUGLUHFWLRQRIIHHG
*$3*&)7
Doc ID 15730 Rev 4
31/34
Order codes
6
VN5E160MS-E
Order codes
Table 16.
Device summary
Order codes
Package
SO-8
32/34
Tube
Tape and reel
VN5E160MS-E
VN5E160MSTR-E
Doc ID 15730 Rev 4
VN5E160MS-E
7
Revision history
Revision history
Table 17.
Document revision history
Date
Revision
Changes
10-Jun-2009
1
Initial release.
25-Jan-2010
2
Updated Table 9: Current sense (8 V < VCC < 18 V).
26-May-2011
3
Table 9: Current sense (8 V < VCC < 18 V):
– tDSENSE2H: updated typical and maximum values
19-Sep-2013
4
Updated Disclaimer.
Doc ID 15730 Rev 4
33/34
VN5E160MS-E
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
time, without notice.
All ST products are sold pursuant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products
or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such
third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
ST PRODUCTS ARE NOT DESIGNED OR AUTHORIZED FOR USE IN: (A) SAFETY CRITICAL APPLICATIONS SUCH AS LIFE
SUPPORTING, ACTIVE IMPLANTED DEVICES OR SYSTEMS WITH PRODUCT FUNCTIONAL SAFETY REQUIREMENTS; (B)
AERONAUTIC APPLICATIONS; (C) AUTOMOTIVE APPLICATIONS OR ENVIRONMENTS, AND/OR (D) AEROSPACE APPLICATIONS
OR ENVIRONMENTS. WHERE ST PRODUCTS ARE NOT DESIGNED FOR SUCH USE, THE PURCHASER SHALL USE PRODUCTS AT
PURCHASER’S SOLE RISK, EVEN IF ST HAS BEEN INFORMED IN WRITING OF SUCH USAGE, UNLESS A PRODUCT IS
EXPRESSLY DESIGNATED BY ST AS BEING INTENDED FOR “AUTOMOTIVE, AUTOMOTIVE SAFETY OR MEDICAL” INDUSTRY
DOMAINS ACCORDING TO ST PRODUCT DESIGN SPECIFICATIONS. PRODUCTS FORMALLY ESCC, QML OR JAN QUALIFIED ARE
DEEMED SUITABLE FOR USE IN AEROSPACE BY THE CORRESPONDING GOVERNMENTAL AGENCY.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any
liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries.
Information in this document supersedes and replaces all information previously supplied.
The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
© 2013 STMicroelectronics - All rights reserved
STMicroelectronics group of companies
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
www.st.com
34/34
Doc ID 15730 Rev 4
工商网监
湘ICP备2023018690号
