VN7003ALH
High-side driver with CurrentSense analog feedback for
automotive applications
Datasheet - production data
Features
Undervoltage shutdown
Overvoltage clamp
Load current limitation
Self limiting of fast thermal transients
Loss of ground and loss of VCC
Configurable latch-off on
overtemperature or power limitation
Reverse battery
Electrostatic discharge protection
Applications
Max transient supply voltage
VCC
40 V
Operating voltage range
VCC
4 to
28 V
Typ. on-state resistance (per
Ch)
RON
3.5 mΩ
Current limitation (typ)
ILIMH
135 A
Description
Stand-by current (max)
ISTBY
0.5 µA
VUSD_Cranking
3V
The device is a single channel high-side driver
manufactured using ST proprietary VIPower®
technology and housed in the Octapak package.
The device is designed to drive 12 V automotive
grounded loads through a 3 V and 5 V CMOScompatible interface, and to provide protection
and diagnostics.
Minimum cranking supply
voltage (VCC decreasing)
AEC-Q100 qualified
Extreme low voltage operation for deep cold
cranking applications (compliant with LV124,
revision 2013)
General
Single channel smart high-side driver
with CurrentSense analog feedback
Very low standby current
Compatible with 3 V and 5 V CMOS
outputs
Diagnostic functions
Overload and short to ground (power
limitation) indication
Thermal shutdown indication
OFF-state open-load detection
Output short to VCC detection
Protections
November 2016
Specially intended for Automotive smart power
distribution, glow plugs, heating systems, DC
motors, relay replacement and high power
resistive and inductive actuators.
The device integrates advanced protective
functions such as load current limitation, overload
active management by power limitation and
overtemperature shutdown.
A combination of INPUT and FR_DIAG pins
latches the output in case of fault, disables the
latch-off functionality and enables OFF-state
diagnostic.
Table 1: Device summary
Order codes
Package
Octapak
DocID028717 Rev 5
This is information on a product in full production.
Tape and reel
VN7003ALHTR
1/37
www.st.com
Contents
VN7003ALH
Contents
1
Block diagram and pin description ................................................ 5
2
Electrical specification .................................................................... 7
3
4
2.1
Absolute maximum ratings ................................................................ 7
2.2
Thermal data ..................................................................................... 8
2.3
Electrical characteristics .................................................................... 8
2.4
Electrical characteristics curves ...................................................... 16
Protections..................................................................................... 20
3.1
Power limitation ............................................................................... 20
3.2
Thermal shutdown ........................................................................... 20
3.3
Current limitation ............................................................................. 20
3.4
Negative voltage clamp ................................................................... 20
Application information ................................................................ 21
4.1
GND protection network against reverse battery............................. 21
4.2
Immunity against transient electrical disturbances .......................... 22
4.3
MCU I/Os protection ........................................................................ 22
4.4
CS - analog current sense .............................................................. 23
4.4.1
Principle of CurrentSense signal generation .................................... 24
4.4.2
Short to VCC and OFF-state open-load detection ........................... 26
5
Maximum demagnetization energy (VCC = 16 V) ........................ 28
6
Package and PCB thermal data .................................................... 29
6.1
7
8
2/37
Octapak thermal data ...................................................................... 29
Package information ..................................................................... 32
7.1
Octapak package information.......................................................... 32
7.2
Octapak packing information ........................................................... 33
7.3
Octapak marking information .......................................................... 35
Revision history ............................................................................ 36
DocID028717 Rev 5
VN7003ALH
List of tables
List of tables
Table 1: Device summary ........................................................................................................................... 1
Table 2: Pin functions ................................................................................................................................. 5
Table 3: Suggested connections for unused and not connected pins ........................................................ 6
Table 4: Absolute maximum ratings ........................................................................................................... 7
Table 5: Thermal data ................................................................................................................................. 8
Table 6: Electrical characteristics during cranking ..................................................................................... 8
Table 7: Power section ............................................................................................................................... 9
Table 8: Switching..................................................................................................................................... 10
Table 9: Logic Inputs................................................................................................................................. 10
Table 10: Protections ................................................................................................................................ 11
Table 11: CurrentSense ............................................................................................................................ 11
Table 12: Truth table ................................................................................................................................. 15
Table 13: FR_DIAG functionality .............................................................................................................. 16
Table 14: ISO 7637-2 - electrical transient conduction along supply line ................................................. 22
Table 15: CurrentSense pin levels in off-state .......................................................................................... 26
Table 16: PCB properties ......................................................................................................................... 29
Table 17: Thermal parameters ................................................................................................................. 31
Table 18: Octapak mechanical data ......................................................................................................... 32
Table 19: Reel dimensions ....................................................................................................................... 34
Table 20: Document revision history ........................................................................................................ 36
DocID028717 Rev 5
3/37
List of figures
VN7003ALH
List of figures
Figure 1: Block diagram .............................................................................................................................. 5
Figure 2: Configuration diagram (top view)................................................................................................. 6
Figure 3: Current and voltage conventions ................................................................................................. 7
Figure 4: IOUT/ISENSE versus IOUT ....................................................................................................... 13
Figure 5: Current sense precision vs. IOUT ............................................................................................. 14
Figure 6: Switching times and Pulse skew ............................................................................................... 14
Figure 7: TDSTKON.................................................................................................................................. 15
Figure 8: OFF-state output current ........................................................................................................... 16
Figure 9: Standby current ......................................................................................................................... 16
Figure 10: IGND(ON) vs. Iout ................................................................................................................... 16
Figure 11: Logic input high level voltage .................................................................................................. 16
Figure 12: Logic input low level voltage .................................................................................................... 17
Figure 13: High level logic input current ................................................................................................... 17
Figure 14: Low level logic input current .................................................................................................... 17
Figure 15: Logic input hysteresis voltage ................................................................................................. 17
Figure 16: Undervoltage shutdown ........................................................................................................... 17
Figure 17: On-state resistance vs. Tcase ................................................................................................. 17
Figure 18: On-state resistance vs. VCC ................................................................................................... 18
Figure 19: Turn-on voltage slope .............................................................................................................. 18
Figure 20: Turn-off voltage slope .............................................................................................................. 18
Figure 21: Won vs. Tcase ......................................................................................................................... 18
Figure 22: Woff vs. Tcase ......................................................................................................................... 18
Figure 23: ILIMH vs. Tcase ....................................................................................................................... 18
Figure 24: Turn-off output voltage clamp .................................................................................................. 19
Figure 25: OFF-state open-load voltage detection threshold ................................................................... 19
Figure 26: Vs clamp vs. Tcase ................................................................................................................. 19
Figure 27: Vsenseh vs. Tcase .................................................................................................................. 19
Figure 28: Application diagram ................................................................................................................. 21
Figure 29: Simplified internal structure ..................................................................................................... 21
Figure 30: CurrentSense and diagnostic – block diagram........................................................................ 23
Figure 31: CurrentSense block diagram ................................................................................................... 24
Figure 32: Analogue HSD – open-load detection in off-state ................................................................... 25
Figure 33: Open-load / short to VCC condition ......................................................................................... 26
Figure 34: Maximum turn off current versus inductance .......................................................................... 28
Figure 35: Octapak on two-layers PCB (2s0p to JEDEC JESD 51-5) ...................................................... 29
Figure 36: Octapak on four-layers PCB (2s2p to JEDEC JESD 51-7) ..................................................... 29
Figure 37: Rthj-amb vs PCB copper area in open box free air conditions ............................................... 30
Figure 38: Octapak thermal impedance junction ambient single pulse .................................................... 30
Figure 39: Thermal fitting model for Octapak ........................................................................................... 31
Figure 40: Octapak package dimensions ................................................................................................. 32
Figure 41: Octapack reel 13" .................................................................................................................... 33
Figure 42: Octapak carrier tape ................................................................................................................ 34
Figure 43: Octapak schematic drawing of leader and trailer tape ............................................................ 35
Figure 44: Octapak marking information................................................................................................... 35
4/37
DocID028717 Rev 5
VN7003ALH
1
Block diagram and pin description
Block diagram and pin description
Figure 1: Block diagram
Table 2: Pin functions
Name
VCC
OUTPUT
GND
INPUT
CS
FR_DIAG
Function
Battery connection.
Power outputs. All the pins must be connected together.
Ground connection.
Voltage controlled input pin with hysteresis. Compatible with 3 V and 5 V CMOS outputs.
It controls output switch state.
Analog current sense output pin delivers a current proportional to the load current.
It sets auto-restart and latch-off protection. Moreover, it enables OFF-state diagnostic.
DocID028717 Rev 5
5/37
Block diagram and pin description
VN7003ALH
GND
CS
FR_DIAG
INPUT
OUTPUT
OUTPUT
OUTPUT
Figure 2: Configuration diagram (top view)
Table 3: Suggested connections for unused and not connected pins
Connection /
pin
CS
N.C.
Output
Input
FR_DIAG
Floating
Not allowed
X (1)
X
X
X
To ground
Through 1 kΩ
resistor
X
Not
allowed
Through 15 kΩ
resistor
Through 15 kΩ
resistor
Notes:
(1)X:
6/37
do not care.
DocID028717 Rev 5
VN7003ALH
2
Electrical specification
Electrical specification
Figure 3: Current and voltage conventions
VF = VOUT - VCC when VOUT > VCC and INPUT = LOW
2.1
Absolute maximum ratings
Stressing the device above the rating listed in Table 4: "Absolute maximum ratings" may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to the conditions in table below for extended
periods may affect device reliability.
Table 4: Absolute maximum ratings
Symbol
Parameter
Value
Unit
VCC
DC supply voltage
38
-VCC
Reverse DC supply voltage
16
VCCPK
Maximum transient supply voltage (ISO7637-2:2004 Pulse 5b level
IV clamped to 40 V; RL = 4 Ω)
40
-IGND
DC reverse ground pin current
200
mA
IOUT
OUTPUT DC output current
Internally
limited
A
-IOUT
Reverse DC output current
38
IIN
IFR_DIAG
ISENSE
EMAX
INPUT DC input current
FR_DIAG DC input current
-1 to 10
CS pin DC output current (VGND = VCC and VSENSE < 0 V)
10
CS pin DC output current in reverse (VCC < 0 V)
-20
Maximum switching energy (single pulse)
(TDEMAG = 0.13 ms; Tjstart = 150 °C)
105
DocID028717 Rev 5
V
mA
mA
mJ
7/37
Electrical specification
VN7003ALH
Symbol
Parameter
Value
Unit
VESD
Electrostatic discharge (JEDEC 22A-114F)
INPUT
CurrentSense
FR_DIAG
OUTPUT
VCC
4000
2000
4000
4000
4000
V
V
V
V
V
VESD
Charge device model (CDM-AEC-Q100-011)
750
V
Tj
Tstg
2.2
Junction operating temperature
-40 to 150
Storage temperature
-55 to 150
°C
Thermal data
Table 5: Thermal data
Symbol
Parameter
Typ. value
Thermal resistance junction-case (1)
Rcase
Unit
1.45
Rthj-amb
Thermal resistance junction-ambient (JEDEC JESD 51-5) (2)
58.1
Rthj-amb
(1)
15.6
Thermal resistance junction-ambient (JEDEC JESD 51-7)
°C/W
Notes:
2.3
(1)Device
mounted on four-layers 2s2p PCB
(2)Device
mounted on two-layers 2s0p PCB with 2 cm2 heatsink copper trace
Electrical characteristics
7 V < VCC < 28 V; -40°C < Tj < 150°C, unless otherwise specified.
All typical values refer to VCC = 13 V; Tj = 25°C, unless otherwise specified.
Table 6: Electrical characteristics during cranking
Symbol
VUSD_Cranking
RON
TTSD(1)
Parameter
Test conditions
Min.
Minimum cranking supply
voltage (VCC decreasing)
On-state resistance
IOUT = 4 A; VCC = 3 V;
VCC decreasing
Shutdown temperature (VCC
decreasing)
VCC = 3 V
140
Notes:
(1)Parameter
8/37
guaranteed by design and characterization; not subject to production test.
DocID028717 Rev 5
Typ.
Max.
Unit
—
3
V
—
15
mΩ
—
°C
VN7003ALH
Electrical specification
Table 7: Power section
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
4
13
28
VCC
Operating supply voltage
VUSD
Undervoltage shutdown
3
VUSDReset
Undervoltage shutdown
reset
5
V
VUSDhyst
Undervoltage shutdown
hysteresis
7
mΩ
0.3
IOUT = 15 A; Tj = 25°C
RON
On-state resistance
3.5
IOUT = 15 A; Tj = 150°C
IOUT = 15 A; VCC = 4 V; Tj = 25°C
RON_Rev
Vclamp
ISTBY
RDSON in reverse battery
condition
Clamp voltage
Supply current in
standby at VCC = 13 V
(1)
tD_STBY
IS(ON)
IGND(ON)
IL(off)
VF
mΩ
3.5
IS = 20 mA; Tj = -40°C
38
IS = 20 mA; 25°C < Tj < 150°C
41
V
46
52
VCC = 13 V;
VIN = VOUT = VFR_DIAG = 0 V;
Tj = 25°C
0.5
VCC = 13 V;
VIN = VOUT = VFR_DIAG = 0 V;
Tj = 85°C (2)
1.4
VCC = 13 V;
VIN = VOUT = VFR_DIAG = 0 V;
Tj = 125°C
11
VCC = 13 V; VIN = 5 V;
VFR_DIAG = 0 V; IOUT = 0 A
Supply current
VCC = 13 V; VFR_DIAG = 0 V;
VIN = 5 V; IOUT = 0 A
Control stage current
consumption in ON
state. All channels
active.
VCC = 13 V; VFR_DIAG = 5 V;
VIN = 5 V; IOUT = 15 A
Output - VCC diode
voltage
5.25
VCC = -13 V; IOUT = -15 A;
Tj = 25°C
Standby mode blanking
time
Off-state output current
at VCC = 13 V
Unit
60
VIN = VOUT = 0 V; VCC = 13 V;
Tj = 25°C
0
VIN = VOUT = 0 V; VCC = 13 V;
Tj = 125°C
0
IOUT = -15 A; Tj = 150°C
V
µA
300
550
µs
4
6.5
mA
9
mA
0.01
0.5
µA
11
0.7
V
Notes:
(1)PowerMOS
(2)Parameter
leakage included.
specified by design; not subject to production test.
DocID028717 Rev 5
9/37
Electrical specification
VN7003ALH
Table 8: Switching
VCC = 13 V; -40°C < Tj < 150°C, unless otherwise specified
Symbol
Test
conditions
Parameter
td(on)(1)
Turn-on delay time at Tj = 25 °C
td(off)(1)
Turn-off delay time at Tj = 25 °C
Typ.
Max.
10
50
120
10
60
100
0.075
0.28
0.7
V/µs
0.075
0.33
0.7
V/µs
RL = 0.87 Ω
(dVOUT/dt)on(1)
Turn-on voltage slope at Tj = 25 °C
(1)
Turn-off voltage slope at Tj = 25 °C
(dVOUT/dt)off
Min.
RL = 0.87 Ω
Unit
µs
WON
Switching energy losses at turn-on
(twon)
RL = 0.87 Ω
—
1.8
3.6(2)
mJ
WOFF
Switching energy losses at turn-off
(twoff)
RL = 0.87 Ω
—
2
3.6(2)
mJ
tSKEW (1)
Differential Pulse skew (tPHL - tPLH)
RL = 0.87 Ω
-50
0
50
µs
Max.
Unit
0.9
V
Notes:
(1)See Figure 6: "Switching times and Pulse skew" .
(2)Parameter
guaranteed by design and characterization; not subject to production test.
Table 9: Logic Inputs
7 V < VCC < 28 V; -40°C < Tj < 150°C
Symbol
Parameter
Test conditions
Min.
Typ.
INPUT characteristics
VIL
Input low level voltage
IIL
Low level input current
VIH
Input high level voltage
IIH
High level input current
VI(hyst)
Input hysteresis voltage
VICL
Input clamp voltage
VIN = 0.9 V
1
µA
2.1
V
VIN = 2.1 V
10
0.2
IIN = 1 mA
V
5.3
IIN = -1 mA
µA
7.5
-0.7
V
FR_DIAG characteristics (7 V < VCC < 18 V)
VFR_DIAGL
Input low level voltage
IFR_DIAGL
Low level input current
VFR_DIAGH
Input high level voltage
IFR_DIAGH
High level input current
VFR_DIAG(hyst)
Input hysteresis voltage
VFR_DIAGCL
10/37
Input clamp voltage
0.9
VIN = 0.9 V
1
µA
2.1
V
VIN = 2.1 V
10
0.2
IIN = 1 mA
IIN = -1 mA
DocID028717 Rev 5
V
µA
V
5.3
7.5
-0.7
V
VN7003ALH
Electrical specification
Table 10: Protections
7 V < VCC < 18 V; -40°C < Tj < 150°C
Symbol
Parameter
Test conditions
ILIMH(1)
DC short circuit current
ILIML
Short circuit current
during thermal cycling
TTSD
Shutdown temperature
VCC = 13 V
4 V < VCC < 18 V
Reset
TRS
Thermal reset of fault
diagnostic indication
Typ.
Max.
80
135
175
(2)
175
VCC = 13 V;
TR < Tj < TTSD
temperature(2)
TR
Min.
VFR_DIAG = 5 V;
38
150
175
TRS + 1
TRS + 7
Thermal hysteresis
(TTSD - TR)(2)
ΔTJ_SD
Dynamic temperature
VCC = 13 V
Fault reset time for
output unlatch(2)
VFR_DIAG = 5 V to 0 V;
VIN = 5 V
3
IOUT = 2 A; L = 6 mH;
Tj = -40°C
VCC 38
IOUT = 2 A; L = 6 mH;
Tj = 25°C to 150°C
VCC 41
tLATCH_RST
VDEMAG
Turn-off output voltage
clamp
A
A
200
°C
°C
135
THYST
Unit
°C
7
°C
60
K
10
20
µs
VCC 46
VCC 52
Typ.
Max.
Unit
-12
V
V
Notes:
(1)Parameter
(2)
guaranteed by an indirect test sequence.
Parameter guaranteed by design and characterization; not subject to production test.
Table 11: CurrentSense
7 V < VCC < 18 V; -40°C < Tj < 150°C
Symbol
VSENSE_CL
Parameter
Test conditions
CurrentSense clamp
voltage
VFR_DIAG = 0 V;
ISENSE = 1 mA
Min.
-17
VFR_DIAG = 0 V; ISENSE = 1 mA
7
V
CurrentSense characteristics
KOL(1)
IOUT/ISENSE
IOUT = 200 mA;
VSENSE = 0.5 V
8350
16800
25150
K0
IOUT/ISENSE
IOUT = 1 A; VSENSE = 0.5 V
9000
16650
24500
Current sense ratio drift
IOUT = 1 A; VSENSE = 0.5 V
-30
IOUT/ISENSE
IOUT = 10 A; VSENSE = 4 V
13150
Current sense ratio drift
IOUT = 10 A; VSENSE = 4 V
-10
IOUT/ISENSE
IOUT = 15 A; VSENSE = 4 V
14200
Current sense ratio drift
IOUT = 15 A; VSENSE = 4 V
-7
IOUT/ISENSE
IOUT = 45 A; VSENSE = 4 V
14760
Current sense ratio drift
IOUT = 45 A; VSENSE = 4 V
-5
dK0/K0
(2)(3)
K1
dK1/K1
(2)(3)
K2
dK2/K2(2)(3)
K3
dK3/K3(2)(3)
DocID028717 Rev 5
30
16450
%
19750
10
16450
19100
16450
18670
7
5
%
%
%
11/37
Electrical specification
VN7003ALH
7 V < VCC < 18 V; -40°C < Tj < 150°C
Symbol
ISENSE0
Parameter
Test conditions
CurrentSense leakage
current
Min.
Typ.
Max.
Unit
CurrentSense disabled:
VFR_DIAG = 0 V
0
0.5
µA
CurrentSense disabled:
-1 V < VSENSE < 5 (2)
-0.5
0.5
µA
CurrentSense enabled:
VIN = 5 V; IOUT = 0 A
0
5
µA
VOUT_CSD(2)
Output Voltage for
CurrentSense shutdown
VFR_DIAG = 5 V;
RSENSE = 2.7 kΩ;
VIN = 5 V; IOUT = 15 A
VSENSE_SAT
Multisense saturation
voltage
VCC = 7 V;
RSENSE = 10 KΩ;
VFR_DIAG = 5 V; VIN = 5 V;
IOUT = 15 A; Tj = -40°C
5
V
ISENSE_SAT(2)
CS saturation current
VCC = 7 V; VSENSE = 4 V;
VIN = 5 V; VFR_DIAG = 5 V;
Tj = -40°C
4
mA
Output saturation
current
VCC = 7 V; VSENSE = 4 V;
VIN = 5 V; VFR_DIAG = 5 V;
Tj = -40°C
75
A
2
IOUT_SAT(2)
5
V
OFF-state diagnostic
VOL
OFF-state open-load
voltage detection
threshold
VIN = 0 V; VFR_DIAG = 5 V
IL(off2)
OFF-state output sink
current
VIN = 0 V; VOUT = VOL;
Tj = -40°C to 125°C
-100
tDSTKON
OFF-state diagnostic
delay time from falling
edge of INPUT
(see Figure 7:
"TDSTKON")
VIN = 5 V to 0 V;
VFR_DIAG = 5 V; IOUT = 0 A;
VOUT = 4 V
100
tD_OL_V
Settling time for valid
OFF-state open load
diagnostic indication
from rising edge of
FR_DIAG
VIN = 0 V; VFR = 0 V;
VOUT = 4 V; VFR_DIAG = 0 V
to 5 V
tD_VOL
OFF-state diagnostic
delay time from rising
edge of VOUT
VIN = 0 V; VFR_DIAG = 5 V;
VOUT = 0 V to 4 V
3
350
5
4
V
-15
µA
700
µs
60
µs
30
µs
6.6
V
30
mA
Fault diagnostic feedback (see Table 12: "Truth table")
VSENSEH
CurrentSense output
voltage in fault condition
VCC = 13 V; VIN = 0 V;
VFR_DIAG = 5 V; IOUT = 0 A;
VOUT = 4 V; RSENSE = 1 kΩ
5
ISENSEH
CurrentSense output
current in fault condition
VCC = 13 V; VSENSE = 5 V
7
CurrentSense timings (current sense mode)(4)
12/37
DocID028717 Rev 5
20
VN7003ALH
Electrical specification
7 V < VCC < 18 V; -40°C < Tj < 150°C
Symbol
Parameter
tDSENSE2H
Current sense settling
time from rising edge of
INPUT
VIN = 0 V to 5 V;
VFR_DIAG = 5 V;
RSENSE = 1 kΩ;
RL = 0.87 Ω
ΔtDSENSE2H
Current sense settling
time from rising edge of
IOUT (dynamic response
to a step change of
IOUT)
VIN = 5 V; VFR_DIAG = 5 V;
RSENSE = 1 kΩ
ISENSE = 90 % of
ISENSEMAX; RL = 0.87 Ω
Current sense turn-off
delay time from falling
edge of INPUT
VIN = 5 V to 0 V;
VFR_DIAG = 5 V;
RSENSE = 1 kΩ;
RL = 0.87 Ω
tDSENSE2L
Test conditions
Min.
Typ.
Max.
Unit
100
380
µs
200
µs
250
µs
50
Notes:
(1)Digital
filtering is applied for testing
(2)Parameter
(3)All
guaranteed by design and characterization; not subject to production test.
values refer to VCC = 13 V; Tj = 25°C, unless otherwise specified.
(4)Transition
delay are measured up to ±10% of final conditions.
Figure 4: IOUT/ISENSE versus IOUT
DocID028717 Rev 5
13/37
Electrical specification
VN7003ALH
Figure 5: Current sense precision vs. IOUT
Figure 6: Switching times and Pulse skew
14/37
DocID028717 Rev 5
VN7003ALH
Electrical specification
Figure 7: TDSTKON
Table 12: Truth table
Mode
Stand by
Normal
Conditions
IN
FR_DIAG
OUT
Current
Sense
All logic inputs
low
L
L
L
Hi-Z
L
H
L
0
OFF-state diagnostic
enabled
H
L
H
ISENSE =
1/K * IOUT
Autorestart mode
H
H
H
ISENSE =
1/K * IOUT
Latch-off mode
H
L
H
VSENSEH
Autorestart mode
H
H
H
VSENSEH
Latch-off mode
Hi-Z
Re-start when
VCC > VUSD + VUSDhyst
(rising)
Nominal load
connected;
Tj < 150°C
Overload
Overload or
short to GND
causing:
Tj > TTSD or
ΔTj > ΔTj_SD
Undervoltage
VCC < VUSD
(falling)
X
X
L
OFF-state
diagnostics
Short to VCC
L
H
H
Open-load
L
H
H
Inductive loads
turn-off
L
X
VOL
Open-load
VOUT < VOL
4.4.2
Short to VCC
VOUT > VOL
Nominal
VOUT < VOL
Short to VCC and OFF-state open-load detection
Short to VCC
A short circuit between VCC and output is indicated by the relevant current sense pin set to
VSENSEH during the device off-state. Small or no current is delivered by the current sense
during the on-state depending on the nature of the short circuit.
OFF-state open-load with external circuitry
Detection of an open-load in off mode requires an external pull-up resistor RPU connecting
the output to a positive supply voltage VPU.
It is preferable VPU to be switched off during the module standby mode in order to avoid the
overall standby current consumption to increase in normal conditions, i.e. when load is
connected.
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Application information
RPU must be selected in order to ensure VOUT > VOLmax in accordance with the following
equation:
Equation
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Maximum demagnetization energy (VCC = 16 V)
5
Maximum demagnetization energy (VCC = 16 V)
Figure 34: Maximum turn off current versus inductance
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Package and PCB thermal data
6
Package and PCB thermal data
6.1
Octapak thermal data
Figure 35: Octapak on two-layers PCB (2s0p to JEDEC JESD 51-5)
Figure 36: Octapak on four-layers PCB (2s2p to JEDEC JESD 51-7)
Table 16: PCB properties
Dimension
Value
Board finish thickness
1.6 mm +/- 10%
Board dimension
77 mm x 86 mm
Board Material
FR4
Copper thickness (top and bottom layers)
0.070 mm
Copper thickness (inner layers)
0.035 mm
Thermal vias separation
1.2 mm
Thermal via diameter
0.3 mm +/- 0.08 mm
Copper thickness on vias
0.025 mm
Footprint dimension (top layer)
6.4 mm x 7 mm
Heatsink copper area dimension (bottom layer)
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Footprint, 2 cm2 or 8 cm2
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Package and PCB thermal data
VN7003ALH
Figure 37: Rthj-amb vs PCB copper area in open box free air conditions
Figure 38: Octapak thermal impedance junction ambient single pulse
Pulse calculation formula
Equation
ZTHδ = RTH · + ZTHtp (1 - δ)
where δ = tP/T
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Package and PCB thermal data
Figure 39: Thermal fitting model for Octapak
The fitting model is a simplified thermal tool and is valid for transient evolutions
where the embedded protections (power limitation or thermal cycling during
thermal shutdown) are not triggered.
Table 17: Thermal parameters
Area/island (cm2)
Footprint
2
8
4L
R1 (°C/W)
0.01
0.01
0.01
0.01
R2 (°C/W)
0.5
0.5
0.5
0.5
R3 (°C/W)
1.6
1.6
1.6
1.6
R4 (°C/W)
10
10
10
2.5
R5 (°C/W)
28
20
12
5
R6 (°C/W)
36
26
18
6
C1 (W.s/°C)
0.001
0.001
0.001
0.001
C2 (W.s/°C)
0.0018
0.0018
0.0018
0.0018
C3 (W.s/°C)
0.11
0.11
0.11
0.11
C4 (W.s/°C)
0.6
0.6
0.6
0.8
C5 (W.s/°C)
0.8
1.4
2.2
3
C6 (W.s/°C)
3
6
9
25
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Package information
7
VN7003ALH
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
7.1
Octapak package information
Figure 40: Octapak package dimensions
Table 18: Octapak mechanical data
Millimeters
Symbol
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Min.
Typ.
Max.
A
2.20
2.30
2.40
A1
0.90
1.00
1.10
A2
0.03
b
0.38
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0.15
0.45
0.52
VN7003ALH
Package information
Millimeters
Symbol
Min.
Typ.
b1
0.70
b4
5.20
5.30
5.40
c
0.45
0.50
0.60
c2
0.75
0.80
0.90
D
6.00
6.10
6.20
D1
E
5.15
6.40
E1
6.50
6.60
5.30
e
0.85 BSC
e1
1.60
1.70
1.80
e2
3.30
3.40
3.50
e3
5.00
5.10
5.20
H
9.35
9.70
10.10
L
1.00
—
(L1)
2.80
L2
0.80
L3
0.85
R
V2
7.2
Max.
0.40 BSC
0°
8°
Octapak packing information
Figure 41: Octapack reel 13"
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Package information
VN7003ALH
Table 19: Reel dimensions
Description
Value(1)
Base quantity
2500
Bulk quantity
2500
A (max)
330
B (min)
1.5
C (+0.5, -0.2)
13
D
20.2
N
100
W1 (+2 /-0)
16.4
W2 (max)
22.4
Notes:
(1)All
dimensions are in mm.
Figure 42: Octapak carrier tape
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Package information
Figure 43: Octapak schematic drawing of leader and trailer tape
7.3
Octapak marking information
Figure 44: Octapak marking information
Parts marked as "&" are not yet qualified and therefore not yet ready to be used in
production and any consequences deriving from such usage will not be at ST charge. In no
event, ST will be liable for any customer usage of these engineering samples in production.
ST Quality has to be contacted prior to any decision to use these Engineering Samples to
run qualification activity.
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Revision history
8
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Revision history
Table 20: Document revision history
Date
Revision
21-Dec-2015
1
Changes
Initial release.
Table 8: "Switching":
18-Apr-2016
2
tSKEW : updated value
Table 11: "CurrentSense":
KOL: added row
K0, K2, K3, dK3/K3: updated values
Table 11: "CurrentSense":
23-May-2016
3
ISENSE0: updated max current value of CurrentSense enabled test
condition.
Doc status upgraded to production data
Section "Features"
added AEC-Q100 qualification
ILIMH: updated current limitation feature
Figure 1: "Block diagram"
updated figure
Table 4: "Absolute maximum ratings"
EMAX: updated value and the TDEMAG
Table 5: "Thermal data"
Rthj-board changed to Rthj-case
All typ. values updated
Table 8: "Switching"
02-Aug-2016
4
updated Min., Typ. and Max. columns
Table 10: "Protections"
ILIMH: updated Typ. and Max. values
ILIML: updated Typ. value
ΔTJ_SD: removed temperature condition
Table 11: "CurrentSense"
KOL: added Typ. value
all text conditions for K characteristics: removed V SEn condition
VSENSE_SAT, ISENSE_SAT and IOUT_SAT: updated test conditions
Added Figure 4: "IOUT/ISENSE versus IOUT"
Added Figure 5: "Current sense precision vs. IOUT"
Added Section 3.4: "Electrical characteristics curves"
Added Figure 34: "Maximum turn off current versus inductance"
Updated Section 7.1: "Octapak thermal data"
02-Nov-2016
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5
Updated Applications section
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IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and
improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST
products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order
acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the
design of Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2016 STMicroelectronics – All rights reserved
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