VN7016AJEPTR

VN7016AJEP High-side driver with MultiSense analog feedback for automotive applications Datasheet - production data     Configurable latch-off on overtemperature or power limitation with dedicated fault reset pin Loss of ground and loss of VCC Reverse battery with external components Electrostatic discharge protection Features Max transient supply voltage VCC 40 V Operating voltage range VCC 4 to 28 V Typ. on-state resistance (per Ch) RON 16 mΩ Current limitation (typ) ILIMH 77 A Standby current (max) ISTBY 0.5 µA Applications   All types of Automotive resistive, inductive and capacitive loads Specially intended for Automotive Headlamps Description     AEC-Q100 qualified General  Single channel smart high-side driver with MultiSense analog feedback  Very low standby current  Compatible with 3 V and 5 V CMOS outputs MultiSense diagnostic functions  Multiplexed analog feedback of: load current with high precision proportional current mirror, VCC supply voltage and TCHIP device temperature  Overload and short to ground (power limitation) indication  Thermal shutdown indication  OFF-state open-load detection  Output short to VCC detection  Sense enable/disable Protections  Undervoltage shutdown  Overvoltage clamp  Load current limitation  Self limiting of fast thermal transients February 2018 The device is a dual channel high-side driver manufactured using ST proprietary VIPower® M07 technology and housed in PowerSSO-16 package. The device is designed to drive 12 V automotive grounded loads through a 3 V and 5 V CMOS-compatible interface, providing protection and diagnostics. The device integrates advanced protective functions such as load current limitation, overload active management by power limitation and overtemperature shutdown with configurable latch-off. A FaultRST pin unlatches the output in case of fault or disables the latch-off functionality. A dedicated multifunction multiplexed analog output pin delivers sophisticated diagnostic functions including high precision proportional load current sense, supply voltage feedback and chip temperature sense, in addition to the detection of overload and short circuit to ground, short to VCC and OFF-state open-load. A sense enable pin allows OFF-state diagnosis to be disabled during the module low-power mode as well as external sense resistor sharing among similar devices. DocID031378 Rev 3 This is information on a product in full production. 1/48 www.st.com Contents VN7016AJEP Contents 1 Block diagram and pin description ................................................ 5 2 Electrical specification .................................................................... 7 3 4 2.1 Absolute maximum ratings ................................................................ 7 2.2 Thermal data ..................................................................................... 8 2.3 Main electrical characteristics ........................................................... 8 2.4 Waveforms ...................................................................................... 19 2.5 Electrical characteristics curves ...................................................... 21 Protections..................................................................................... 26 3.1 Power limitation ............................................................................... 26 3.2 Thermal shutdown ........................................................................... 26 3.3 Current limitation ............................................................................. 26 3.4 Negative voltage clamp ................................................................... 26 Application information ................................................................ 27 4.1 GND protection network against reverse battery............................. 27 4.1.1 Diode (DGND) in the ground line ..................................................... 28 4.2 Immunity against transient electrical disturbances .......................... 28 4.3 MCU I/Os protection ........................................................................ 29 4.4 Multisense - analog current sense .................................................. 29 4.4.1 Principle of Multisense signal generation ......................................... 31 4.4.2 TCASE and VCC monitor ................................................................. 33 4.4.3 Short to VCC and OFF-state open-load detection ........................... 34 5 Maximum demagnetization energy (VCC = 16 V) ........................ 35 6 Package and PCB thermal data .................................................... 36 6.1 7 PowerSSO-16 thermal data ............................................................ 36 Package information ..................................................................... 39 7.1 PowerSSO-16 package information ................................................ 40 7.2 PowerSSO-16 packing information ................................................. 43 7.3 PowerSSO-16 marking information ................................................. 45 8 Device summary ............................................................................ 46 9 Revision history ............................................................................ 47 2/48 DocID031378 Rev 3 VN7016AJEP List of tables List of tables Table 1: Pin functions ................................................................................................................................. 5 Table 2: Suggested connections for unused and not connected pins ........................................................ 6 Table 3: Absolute maximum ratings ........................................................................................................... 7 Table 4: Thermal data ................................................................................................................................. 8 Table 5: Power section ............................................................................................................................... 8 Table 6: Switching..................................................................................................................................... 10 Table 7: Logic inputs ................................................................................................................................. 10 Table 8: Protections .................................................................................................................................. 11 Table 9: MultiSense .................................................................................................................................. 12 Table 10: Truth table ................................................................................................................................. 18 Table 11: MultiSense multiplexer addressing ........................................................................................... 19 Table 12: ISO 7637-2 - electrical transient conduction along supply line ................................................. 28 Table 13: MultiSense pin levels in off-state .............................................................................................. 33 Table 14: PCB properties ......................................................................................................................... 36 Table 15: Thermal parameters ................................................................................................................. 38 Table 16: PowerSSO-16 mechanical data................................................................................................ 41 Table 17: Reel dimensions ....................................................................................................................... 43 Table 18: PowerSSO-16 carrier tape dimensions .................................................................................... 44 Table 19: Device summary ....................................................................................................................... 46 Table 20: Document revision history ........................................................................................................ 47 DocID031378 Rev 3 3/48 List of figures VN7016AJEP List of figures Figure 1: Block diagram .............................................................................................................................. 5 Figure 2: Configuration diagram (top view)................................................................................................. 6 Figure 3: Current and voltage conventions ................................................................................................. 7 Figure 4: IOUT/ISENSE versus IOUT ....................................................................................................... 15 Figure 5: Current sense accuracy versus IOUT ....................................................................................... 16 Figure 6: Switching time and Pulse skew ................................................................................................. 16 Figure 7: MultiSense timings (current sense mode) ................................................................................. 17 Figure 8: Multisense timings (chip temperature and VCC sense mode) .................................................. 17 Figure 9: TDSTKON.................................................................................................................................. 18 Figure 10: Latch functionality - behavior in hard short circuit condition (TAMB