VN750
High-side driver
Datasheet − production data
Features
Type
RDS(on)
IOUT
VCC
60 mΩ
6A
u
d
o
CMOS compatible input
■
On-state open-load detection
■
Off-state open-load detection
■
Shorted load protection
■
Undervoltage and overvoltage shutdown
■
Protection against loss of ground
■
Very low standby current
■
Reverse battery protection
P2PAK
r
P
e
t
e
l
o
PPAK
Description
)
(s
t
c
u
od
r
P
e
PENTAWATT
36 V
■
t
e
l
o
s
b
O
Table 1.
)
s
(
ct
SO-8
VN750
VN750S
VN750PT
VN750-B5
s
b
O
The VN750 is a monolithic device designed using
STMicroelectronic® VIPower® M0-3 technology.
The VN750 is intended for driving any type of load
with one side connected to ground. The active
VCC pin voltage clamp protects the device against
low energy spikes.
Active current limitation combined with thermal
shutdown and automatic restart protect the device
against overload. The device detects the openload condition in both the on-state and
off-state. In the off-state the device detects if the
output is shorted to VCC. The device automatically
turns off where the ground pin becomes
disconnected.
Device summary
Order codes
Package
Tube
Tape and reel
PENTAWATT
VN750
—
SO-8
VN750S
VN750S13TR
P2PAK
VN750-B5
VN750-B513TR
PPAK
VN750PT
VN750PT13TR
May 2012
This is information on a product in full production.
Doc ID 6942 Rev. 4
1/46
www.st.com
1
Contents
VN750
Contents
1
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3
2.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.4
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2.5
GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 19
u
d
o
2.5.1
Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 19
2.5.2
Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 20
r
P
e
2.6
Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2.7
MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2.8
Open-load detection in Off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2.9
SO-8 maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . 22
2.10
PPAK/P2PAK
t
e
l
o
s
b
O
maximum demagnetization energy (VCC = 13.5V) . . . . . . 23
)
(s
Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.2
P2PAK thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
s
b
O
d
o
r
P
e
t
e
l
o
4
t
c
u
3.1
3.3
2/46
)
s
(
ct
PPAK thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
4.1
ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
4.2
SO-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
4.3
PENTAWATT mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
4.4
P2PAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
4.5
PPAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
4.6
SO-8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
4.7
PENTAWATT packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
4.8
P2PAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
4.9
PPAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Doc ID 6942 Rev. 4
VN750
5
Contents
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
)
s
(
ct
u
d
o
r
P
e
t
e
l
o
)
(s
s
b
O
t
c
u
d
o
r
P
e
t
e
l
o
s
b
O
Doc ID 6942 Rev. 4
3/46
List of tables
VN750
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Table 19.
Table 20.
Table 21.
Table 22.
Table 23.
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 7
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Switching (VCC = 13 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Input pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
VCC output diode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Electrical transient requirements on VCC pin (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Electrical transient requirements on VCC pin (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Electrical transient requirements on VCC pin (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
PENTAWATT mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
P2PAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
PPAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
)
s
(
ct
u
d
o
r
P
e
t
e
l
o
)
(s
s
b
O
t
c
u
d
o
r
P
e
t
e
l
o
s
b
O
4/46
Doc ID 6942 Rev. 4
VN750
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
Figure 37.
Figure 38.
Figure 39.
Figure 40.
Figure 41.
Figure 42.
Figure 43.
Figure 44.
Figure 45.
Figure 46.
Figure 47.
Figure 48.
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Open-load On-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Open-load Off-state voltage detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Ilim vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
SO-8 maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
PPAK /P2PAK maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . 23
SO-8 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 24
SO-8 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Thermal fitting model of a single channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
P2PAK PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 27
P2PAK thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . 27
Thermal fitting model of a single channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
PPAK PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 29
PPAK thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Thermal fitting model of a single channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
SO-8 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
PENTAWATT package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
P2PAK package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
PPAK package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
SO-8 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
PENTAWATT tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
P2PAK tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
P2PAK tape and reel (suffix “13TR”). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
)
s
(
ct
u
d
o
r
P
e
t
e
l
o
)
(s
s
b
O
t
c
u
d
o
r
P
e
s
b
O
t
e
l
o
Doc ID 6942 Rev. 4
5/46
List of figures
Figure 49.
Figure 50.
Figure 51.
VN750
PPAK suggested pad layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
PPAK tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
PPAK tape and reel (suffix “13TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
)
s
(
ct
u
d
o
r
P
e
t
e
l
o
)
(s
s
b
O
t
c
u
d
o
r
P
e
t
e
l
o
s
b
O
6/46
Doc ID 6942 Rev. 4
VN750
1
Block diagram and pin description
Block diagram and pin description
Figure 1.
Block diagram
VCC
OVERVOLTAGE
DETECTION
VCC
CLAMP
UNDERVOLTAGE
DETECTION
GND
)
s
(
ct
Power CLAMP
DRIVER
INPUT
du
LOGIC
o
r
P
CURRENT LIMITER
ON STATE OPENLOAD
DETECTION
STATUS
e
t
e
ol
OVERTEMPERATURE
DETECTION
VCC
OUTPUT
OUTPUT
VCC
e
t
e
l
t
c
u
s
b
O
Configuration diagram (top view)
5
od
Pr
8
4
1
5
N.C.
STATUS
INPUT
GND
4
3
2
1
OUTPUT
STATUS
VCC
INPUT
GND
OUTPUT
STATUS
VCC
INPUT
GND
5
4
3
2
1
PC10000
PPAK / P2PAK
SO-8
o
s
b
O
OFF STATE OPENLOAD
AND OUTPUT SHORTED TO VCC
DETECTION
)
(s
Figure 2.
OUTPUT
Table 2.
PENTAWATT
Suggested connections for unused and not connected pins
Connection / pin
Status
N.C.
Output
Input
Floating
X
X
X
X
To ground
X
Doc ID 6942 Rev. 4
Through 10KΩ resistor
7/46
Electrical specifications
2
VN750
Electrical specifications
Figure 3.
Current and voltage conventions
IS
VF
IIN
VCC
INPUT
ISTAT
IOUT
STATUS
VCC
OUTPUT
)
s
(
ct
GND
VIN
VSTAT
2.1
VOUT
IGND
u
d
o
r
P
e
t
e
l
o
Absolute maximum ratings
s
b
O
Stressing the device above the rating listed in the Table 3 may cause permanent damage to
the device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the operating sections of this specification is not implied.
Exposure to Absolute maximum rating conditions for extended periods may affect device
reliability.
Table 3.
ete
ol
s
b
O
od
Value
Parameter
SO-8
DC supply voltage
PENTAWATT
P2PAK
Unit
PPAK
41
V
-VCC
Reverse DC supply voltage
-0.3
V
-Ignd
DC reverse ground pin current
-200
mA
IOUT
DC output current
Internally limited
A
-IOUT
Reverse DC output current
-6
A
DC input current
+/- 10
mA
ISTAT
DC Status current
+/- 10
mA
VESD
Electrostatic discharge
(human body model: R = 1.5 KΩ;
C = 100 pF)
– INPUT
– STATUS
– OUTPUT
– VCC
4000
4000
5000
5000
V
V
V
V
IIN
8/46
t
c
u
Absolute maximum ratings
Pr
Symbol
VCC
)
(s
Doc ID 6942 Rev. 4
VN750
Electrical specifications
Table 3.
Absolute maximum ratings (continued)
Value
Symbol
Parameter
SO-8
EMAX
Maximum switching energy
(L = 1.8 mH; RL = 0 Ω;
Vbat = 13.5 V; Tjstart = 150°C;
IL = 9 A)
EMAX
Maximum switching energy
(L = 2.46 mH; RL = 0 Ω;
Vbat = 13.5 V; Tjstart = 150°C;
IL = 9 A)
Ptot
Power dissipation TC = 25°C
2.2
mJ
138
4.2
60
Tc
Case operating temperature
-40 to 150
Storage temperature
-55 to 150
Internally limited
)-
Symbol
Parameter
s
b
O
s
(
t
c
Rthj-lead
o
r
P
Rthj-amb
e
t
e
ol
du
Thermal resistance junction-lead
Thermal resistance junction-ambient
°C
°C
Max. value
S0-8
Rthj-case Thermal resistance junction-case
W
°C
Pr
e
t
e
ol
mJ
)
s
(
ct
60
u
d
o
Thermal data
Thermal data
138
60
Junction operating temperature
Table 4.
PPAK
100
Tj
Tstg
Unit
P2PAK
PENTAWATT
PENTAWATT P2PAK PPAK
Unit
-
2.1
2.1
2.1
°C/W
30
-
-
-
°C/W
62.1
52.1(2)
77.1(2)
°C/W
62.1
37(4)
44(4)
°C/W
93(1)
82(3)
1. When mounted on a standard single-sided FR-4 board with 0.5 cm2 of Cu (at least 35 µm thick) connected
to all VCC pins. Horizontal mounting and no artificial air flow.
O
bs
2. When mounted on a standard single-sided FR-4 board with 0.5 cm2 of Cu (at least 35 µm thick). Horizontal
mounting and no artificial air flow.
3. When mounted on a standard single-sided FR-4 board with 2 cm2 of Cu (at least 35 µm thick) connected to
all VCC pins. Horizontal mounting and no artificial air flow.
4. When mounted on a standard single-sided FR-4 board with 6 cm2 of Cu (at least 35 µm thick). Horizontal
mounting and no artificial air flow.
Doc ID 6942 Rev. 4
9/46
Electrical specifications
2.3
VN750
Electrical characteristics
Values specified in this section are for 8 V < VCC < 36 V; -40°C < Tj < 150°C, unless
otherwise stated.
Table 5.
Power
Symbol
Parameter
VCC
Test conditions
Min.
Typ.
Operating supply voltage
5.5
13
36
V
VUSD
Undervoltage shutdown
3
4
5.5
V
VUSDhyst
Undervoltage shutdown
hysteresis
VOV
Overvoltage shutdown
RON
On state resistance
0.5
mΩ
120
mΩ
10
25
µA
10
20
µA
2
3.5
mA
0
50
µA
-75
0
µA
VIN = VOUT = 0 V; VCC = 13 V;
Tj = 125°C
5
µA
VIN = VOUT = 0 V; VCC = 13 V;
Tj = 25°C
3
µA
e
t
e
l
o
r
P
so
On-state; VCC = 13 V; VIN = 5 V;
IOUT = 0 A
IL(off1)
Off-state output current
IL(off2)
Off-state output current
IL(off3)
Off-state output current
IL(off4)
Off-state output current
ete
Symbol
ol
s
b
O
)-
VIN = 0 V; VOUT = 3.5 V
Switching (VCC = 13 V)
Parameter
Test conditions
Min.
Typ.
Max. Unit
td(on)
Turn-on delay time
RL = 6.5 Ω from VIN rising edge to
VOUT = 1.3V
40
µs
td(off)
Turn-off delay time
RL = 6.5 Ω from VIN falling edge to
VOUT = 11.7 V
30
µs
dVOUT/dt(on) Turn-on voltage slope
RL = 6.5 Ω from VOUT = 1.3 V to
VOUT=10.4 V
See Figure 21
V/µs
dVOUT/dt(off) Turn-off voltage slope
RL = 6.5 Ω from VOUT = 11.7 V to
VOUT=1.3 V
See Figure 22
V/µs
Table 7.
Symbol
10/46
c
u
d
b
O
VIN = VOUT = 0 V
t(s
V
60
Off-state; VCC = 13 V;
VIN = VOUT = 0 V; Tj = 25°C
Supply current
o
r
P
)
s
(
t
c
u
d
IOUT = 2 A; Tj = 25°C; VCC > 8 V
Off-state; VCC = 13 V;
VIN = VOUT = 0 V
Table 6.
V
36
IOUT = 2 A; VCC > 8 V
IS
Max. Unit
Input pin
Parameter
Test conditions
VIL
Input low level
IIL
Low level input current
VIH
Input high level
VIN = 1.25 V
Doc ID 6942 Rev. 4
Min.
Typ.
Max.
Unit
1.25
V
1
µA
3.25
V
VN750
Electrical specifications
Table 7.
Input pin (continued)
Symbol
Parameter
IIH
High level input current
Vhyst
Input hysteresis voltage
VICL
Input clamp voltage
Table 8.
VF
Table 9.
Typ.
VIN = 3.25 V
Max.
Unit
10
µA
0.5
IIN = 1 mA
V
6
6.8
8
-0.7
V
V
VCC output diode
Parameter
Test conditions
Forward on voltage
-IOUT = 1.3 A; Tj = 150°C
Min.
Typ.
—
—
Parameter
Test conditions
VSTAT
Status low output voltage
ISTAT = 1.6 mA
ILSTAT
Status leakage current
Normal operation; VSTAT = 5 V
CSTAT
Status pin input capacitance Normal operation; VSTAT = 5 V
VSCL
Status clamp voltage
Table 10.
Protections(1)
Symbol
Parameter
ISTAT = 1 mA
O
)
P
e
6
6.8
Unit
0.6
V
Max.
Unit
0.5
V
10
µA
100
pF
8
V
-0.7
V
Min.
Typ.
Max.
Unit
Shutdown temperature
150
175
200
°C
TR
Reset temperature
135
Thyst
Thermal hysteresis
7
tSDL
Status delay in overload
Tj > Tjsh
condition
Ilim
Current limitation
TTSD
s
(
t
c
u
d
o
r
P
e
let
Vdemag
Test conditions
Typ.
ro
let
o
s
b
ISTAT = -1 mA
du
Min.
Max.
)
s
(
ct
Status pin
Symbol
O
Min.
IIN = -1 mA
Symbol
o
s
b
Test conditions
9 V < VCC < 36 V
6
°C
15
9
5 V< VCC < 36 V
Turn-off output clamp
voltage
IOUT = 2 A; VIN = 0 V;
L = 6 mH
°C
20
ms
15
A
15
A
VCC - 41 VCC - 48 VCC - 55
V
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device operates under
abnormal conditions this software must limit the duration and number of activation cycles.
Table 11.
Symbol
Open-load detection
Parameter
Test conditions
IOL
Open-load ON-state
detection threshold
VIN = 5 V
tDOL(on)
Open-load ON-state
detection delay
IOUT = 0 A
Doc ID 6942 Rev. 4
Min.
50
Typ.
Max.
Unit
200
mA
200
µs
11/46
Electrical specifications
Table 11.
VN750
Open-load detection (continued)
Symbol
Parameter
VOL
Open-load OFF-state
voltage detection threshold
tDOL(off)
Open-load detection delay
at turn-off
Figure 4.
Test conditions
Min.
VIN = 0 V
3.5
V
1000
µs
OVERTEMP STATUS TIMING
)
s
(
ct
Tj > Tjsh
VIN
VSTAT
VSTAT
tDOL(off)
Figure 5.
tDOL(on)
)
(s
t
c
u
d
o
r
P
e
VIN
u
d
o
r
P
e
t
e
l
o
tSDL
tSDL
s
b
O
Switching time waveforms
VOUT
90%
80%
dVOUT/dt(off)
dVOUT/dt(on)
10%
t
td(on)
td(off)
O
12/46
Unit
Status timings
VIN
o
s
b
Max.
1.5
OPEN LOAD STATUS TIMING (with external pull-up)
IOUT< IOL
VOUT > VOL
let
Typ.
t
Doc ID 6942 Rev. 4
VN750
Electrical specifications
Table 12.
Truth table
Conditions
Input
Output
Status
Normal operation
L
H
L
H
H
H
Current limitation
L
H
H
L
X
X
H
(Tj < TTSD) H
(Tj > TTSD) L
Overtemperature
L
H
L
L
H
L
Undervoltage
L
H
L
L
X
X
Overvoltage
L
H
L
L
Output voltage > VOL
L
H
H
H
Output current < IOL
L
H
L
H
)
(s
r
P
e
u
d
o
t
e
l
o
)
s
(
ct
H
H
L
H
H
L
s
b
O
t
c
u
d
o
r
P
e
t
e
l
o
s
b
O
Doc ID 6942 Rev. 4
13/46
Electrical specifications
Table 13.
VN750
Electrical transient requirements on VCC pin (part 1)
Test levels
ISO T/R 7637/1
Test pulse
I
II
III
IV
Delays and
impedance
1
- 25 V
- 50 V
- 75 V
- 100 V
2 ms 10 Ω
2
+ 25 V
+ 50 V
+ 75 V
+ 100 V
0.2 ms 10 Ω
3a
- 25 V
- 50 V
- 100 V
- 150 V
0.1 µs 50 Ω
3b
+ 25 V
+ 50 V
+ 75 V
+ 100 V
0.1 µs 50 Ω
4
-4V
-5V
-6V
-7V
100 ms, 0.01 Ω
5
+ 26.5 V
+ 46.5 V
+ 66.5 V
+ 86.5 V
400 ms, 2 Ω
Table 14.
Electrical transient requirements on VCC pin (part 2)
test pulse
I
II
1
C
C
2
C
C
3a
C
C
3b
C
4
C
5
C
Table 15.
Class
t
e
l
o
E
e
t
e
ol
t
c
u
C
C
C
C
C
C
C
C
C
C
E
E
E
s
b
O
od
Contents
All functions of the device are performed as designed after exposure to disturbance.
One or more functions of the device is not performed as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.
s
b
O
14/46
IV
C
C
)
(s
Pr
III
Electrical transient requirements on VCC pin (part 3)
r
P
e
C
u
d
o
Test levels results
ISO T/R 7637/1
)
s
(
ct
Doc ID 6942 Rev. 4
VN750
Electrical specifications
Figure 6.
Waveforms
NORMAL OPERATION
INPUT
LOAD VOLTAGE
STATUS
UNDERVOLTAGE
VUSDhyst
VCC
VUSD
)
s
(
ct
INPUT
LOAD VOLTAGE
STATUS
u
d
o
undefined
r
P
e
OVERVOLTAGE
VCC VOV
t
e
l
o
VCC
INPUT
LOAD VOLTAGE
STATUS
)
(s
s
b
O
OPEN LOAD with external pull-up
t
c
u
INPUT
LOAD VOLTAGE
d
o
r
STATUS
P
e
s
b
O
t
e
l
o
VOUT > VOL
VOL
OPEN LOAD without external pull-up
INPUT
LOAD VOLTAGE
STATUS
Tj
TTSD
TR
OVERTEMPERATURE
INPUT
LOAD CURRENT
STATUS
Doc ID 6942 Rev. 4
15/46
Electrical specifications
2.4
VN750
Electrical characteristics curves
Figure 7.
Off-state output current
Figure 8.
High level input current
Iih (uA)
IL(off1) (uA)
7
3
2.5
6
Off state
Vcc=36V
Vin=Vout=0V
2
Vin=3.25V
5
1.5
4
1
3
0.5
1
-0.5
-1
u
d
o
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
Tc (ºC)
Figure 9.
Input clamp voltage
Iin=1mA
7.6
7.4
)
(s
7.2
7
s
b
O
t
c
u
6.8
6.6
d
o
r
P
e
-50
-25
t
e
l
o
Figure 11.
0
100
125
150
175
t
e
l
o
7.8
6
75
r
P
e
Ilstat (uA)
6.2
50
Figure 10. Status leakage current
8
6.4
25
Tc (ºC)
Vicl (V)
s
b
O
)
s
(
ct
2
0
25
0.05
0.04
Vstat=5V
0.03
0.02
0.01
0
50
75
100
125
150
-50
175
-25
0
25
50
75
100
125
150
175
Tc (°C)
Tc (°C)
Status low output voltage
Figure 12. Status clamp voltage
Vstat (V)
Vscl (V)
0.6
8
7.8
Istat=1mA
0.5
7.6
Istat=1.6mA
7.4
0.4
7.2
7
0.3
6.8
0.2
6.6
6.4
0.1
6.2
0
6
-50
-25
0
25
50
75
100
125
150
175
16/46
-50
-25
0
25
50
75
Tc (°C)
Tc (ºC)
Doc ID 6942 Rev. 4
100
125
150
175
VN750
Electrical specifications
Figure 13. On-state resistance vs Tcase
Figure 14. On-state resistance vs VCC
Ron (mOhm)
Ron (mOhm)
140
120
110
120
Iout=2A
Iout=2A
Vcc=8V; 13V; 36V
100
100
Tc= 150°C
90
80
80
Tc= 125°C
70
60
60
50
40
Tc= 25°C
40
)
s
(
ct
Tc= - 40°C
20
30
0
20
-50
-25
0
25
50
75
100
125
150
175
5
10
15
20
25
30
35
40
u
d
o
Tc (ºC)
Vcc (V)
r
P
e
Figure 15. Open-load On-state detection Figure 16. Input high level
threshold
t
e
l
o
Iol (mA)
Vih (V)
3.6
220
bs
200
Vcc=13V
Vin=5V
180
O
)
160
140
120
80
60
u
d
o
40
20
0
Pr
-50
e
t
e
ol
-25
0
25
50
3
2.6
2.4
2.2
2
75
100
125
150
175
-50
-25
0
25
Tc (ºC)
50
75
100
125
150
175
Tc (ºC)
Figure 17. Input low level
s
b
O
3.2
2.8
s
(
t
c
100
3.4
Figure 18. Input hysteresis voltage
Vil (V)
Vhyst (V)
2.8
1.5
2.6
1.4
1.3
2.4
1.2
2.2
1.1
2
1
1.8
0.9
1.6
0.8
1.4
0.7
1.2
0.6
1
0.5
-50
-25
0
25
50
75
100
125
150
175
Tc (ºC)
-50
-25
0
25
50
75
100
125
150
175
Tc (ºC)
Doc ID 6942 Rev. 4
17/46
Electrical specifications
VN750
Figure 19. Overvoltage shutdown
Figure 20. Open-load Off-state voltage
detection threshold
Vol (V)
Vov (V)
5
50
48
4.5
Vin=0V
46
4
44
3.5
42
40
3
38
2.5
36
)
s
(
ct
2
34
1.5
32
30
1
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C)
bs
900
Vcc=13V
Rl=6.5Ohm
O
)
700
600
500
s
(
t
c
400
300
du
200
ro
-25
0
P
e
t
e
l
o
25
50
100
125
150
175
Tc (ºC)
Vcc=13V
14
12
10
8
6
4
2
0
50
75
100
125
150
175
Tc (ºC)
18/46
350
300
250
200
-50
-25
0
25
50
75
Tc (ºC)
16
25
Vcc=13V
Rl=6.5Ohm
0
75
18
0
400
50
Ilim (A)
-25
450
100
20
-50
175
150
Figure 23. Ilim vs Tcase
s
b
O
150
dVout/dt(off) (V/ms)
500
-50
125
r
P
e
t
e
l
o
dVout/dt/(on) (V/ms)
0
100
Figure 22. Turn-off voltage slope
1000
100
75
Tc (ºC)
Figure 21. Turn-on voltage slope
800
u
d
o
50
Doc ID 6942 Rev. 4
100
125
150
175
VN750
Electrical specifications
Figure 24. Application schematic
+5V
+5V
VCC
Rprot
STATUS
Dld
μC
Rprot
INPUT
OUTPUT
)
s
(
ct
GND
VGND
u
d
o
RGND
DGND
r
P
e
2.5
t
e
l
oreverse battery
GND protection network against
s
b
O
)
s
(
t
c
u
d
o
r
P
e
t
e
ol
2.5.1
Solution 1: resistor in the ground line (RGND only)
This can be used with any type of load.
The following is an indication on how to size the RGND resistor.
1.
RGND ≤ 600 mV / (IS(on)max).
2.
RGND ≥ (-VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device datasheet.
Power dissipation in RGND (when VCC < 0: during reverse battery situations) is:
O
bs
PD = (-VCC)2/ RGND
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the
maximum on-state currents of the different devices.
Please note that if the microprocessor ground is not shared by the device ground then the
RGND produces a shift (IS(on)max * RGND) in the input thresholds and the status output
values. This shift varies depending on how many devices are ON in case of several high
side drivers sharing the same RGND.
If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests to utilize Solution 2 (see below).
Doc ID 6942 Rev. 4
19/46
Electrical specifications
2.5.2
VN750
Solution 2: diode (DGND) in the ground line
A resistor (RGND = 1 kΩ) should be inserted in parallel to DGND if the device drives an
inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network produces a shift (≈600 mV) in the input threshold
and in the status output values if the microprocessor ground is not common to the device
ground. This shift does not vary if more than one HSD shares the same diode/resistor
network.
Series resistor in INPUT and STATUS lines are also required to prevent that, during battery
voltage transient, the current exceeds the absolute maximum rating.
)
s
(
ct
The safest configuration for unused INPUT and STATUS pin is to leave them unconnected.
2.6
u
d
o
Load dump protection
Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
VCC max DC rating. The same applies if the device is subject to transients on the VCC line
that are greater than the ones shown in the ISO 7637-2: 2004(E) table.
r
P
e
2.7
t
e
l
o
MCU I/Os protection
s
b
O
If a ground protection network is used and negative transient are present on the VCC line,
the control pins are pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent
the microcontroller I/O pins from latching-up.
)
(s
The value of these resistors is a compromise between the leakage current of microcontroller
and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of
microcontroller I/Os.
t
c
u
d
o
r
-VCCpeak/Ilatchup ≤ Rprot ≤ (VOHµC-VIH-VGND) / IIHmax
P
e
Calculation example:
t
e
l
o
For VCCpeak= - 100V and Ilatchup ≥ 20mA; VOHµC ≥ 4.5V
bs
O2.8
5kΩ ≤ Rprot ≤ 65kΩ.
Recommended values: Rprot =10kΩ .
Open-load detection in Off-state
Off-state open-load detection requires an external pull-up resistor (RPU) connected between
OUTPUT pin and a positive supply voltage (VPU) like the +5V line used to supply the
microprocessor.
The external resistor has to be selected according to the following requirements:
20/46
1.
No false open-load indication when load is connected: in this case we have to avoid
VOUT to be higher than VOlmin; this results in the following condition
VOUT= (VPU / (RL+RPU)) RL < VOlmin.
2.
No misdetection when load is disconnected: in this case the VOUT has to be higher than
VOLmax; this results in the following condition RPU < (VPU – VOLmax) / IL(off2).
Doc ID 6942 Rev. 4
VN750
Electrical specifications
Because Is(OFF) may significantly increase if Vout is pulled high (up to several mA), the pullup resistor RPU should be connected to a supply that is switched OFF when the module is in
standby.
The values of VOLmin, VOLmax and IL(off2) are available in the electrical characteristics
section.
Figure 25. Open-load detection in off-state
6BATT
60 5
6##
)
s
(
ct
20 5
$2)6%2
,/')#
).0 54
),OFF
t
e
l
o
2
bs
6/,
u
d
o
r
P
e
/54
3 4!453
2,
O
)
s
(
t
c
'2/5.$
du
e
t
e
ol
("1($'5
o
r
P
s
b
O
Doc ID 6942 Rev. 4
21/46
Electrical specifications
2.9
VN750
SO-8 maximum demagnetization energy (VCC = 13.5V)
Figure 26. SO-8 maximum turn-off current versus inductance
),-!8!
)
s
(
ct
"
u
d
o
#
r
P
e
$
t
e
l
o
,M(
bs
'!0'#&4
O
)
A: Tjstart = 150°C single pulse
B: Tjstart = 100°C repetitive pulse
s
(
t
c
C: Tjstart = 125°C repetitive pulse
VIN, IL
r
P
e
let
o
s
b
u
d
o
Demagnetization
Demagnetization
Demagnetization
O
t
1. Values are generated with RL = 0 Ω.In case of repetitive pulses, Tjstart (at the beginning of each
demagnetization) of every pulse must not exceed the temperature specified above for curves A and B.
22/46
Doc ID 6942 Rev. 4
VN750
Electrical specifications
PPAK/P2PAK maximum demagnetization energy (VCC = 13.5V)
2.10
Figure 27. PPAK /P2PAK maximum turn-off current versus inductance
),-!8!
)
s
(
ct
!
"
u
d
o
#
r
P
e
bs
t
e
l
o
O
)
,M(
'!0'#&4
A: Tjstart = 150°C single pulse
s
(
t
c
B: Tjstart = 100°C repetitive pulse
C: Tjstart = 125°C repetitive pulse
r
P
e
u
d
o
VIN, IL
t
e
l
o
Demagnetization
Demagnetization
Demagnetization
s
b
O
t
1. Values are generated with RL = 0 Ω.In case of repetitive pulses, Tjstart (at the beginning of each
demagnetization) of every pulse must not exceed the temperature specified above for curves A and B.
Doc ID 6942 Rev. 4
23/46
Package and PCB thermal data
VN750
3
Package and PCB thermal data
3.1
SO-8 thermal data
Figure 28. SO-8 PC board
)
s
(
ct
u
d
o
r
P
e
1. Layout condition of Rth and Zth measurements (PCB FR4 area = 58 mm x 58 mm,PCB thickness = 2 mm,
Cu thickness = 35 μm , Copper areas: 0.14 cm2, 0.8 cm2, 2 cm2).
t
e
l
o
Figure 29. Rthj-amb vs PCB copper area in open box free air condition
s
b
O
3/
ATPINSCONNECTEDTO4!"
24(J?AMB#7
)
(s
t
c
u
d
o
r
P
e
t
e
l
o
s
b
O
0#"#UHEATSINKAREACM>
'!0'#&4
24/46
Doc ID 6942 Rev. 4
VN750
Package and PCB thermal data
Figure 30. SO-8 thermal impedance junction ambient single pulse
:4( #7
CM
CM
)
s
(
ct
u
d
o
r
P
e
t
e
l
o
4IMES
s
b
O
'!0'#&4
Equation 1: pulse calculation formula
)
(s
Z
t
c
u
where δ = tP/T
THδ
= R
TH
⋅δ+Z
THtp
(1 – δ)
d
o
r
Figure 31. Thermal fitting model of a single channel
P
e
t
e
l
o
s
b
O
Doc ID 6942 Rev. 4
25/46
Package and PCB thermal data
Table 16.
VN750
Thermal parameter
Area/island (cm2)
0.5
R1 (°C/W)
0.05
R2 (°C/W)
0.8
R3 (°C/W)
3.5
R4 (°C/W)
21
R5 (°C/W)
16
R6 (°C/W)
58
C1 (W·s/°C)
0.006
C2 (W·s/°C)
0.0026
C3 (W·s/°C)
0.0075
C4 (W·s/°C)
0.045
C5 (W·s/°C)
0.35
C6 (W·s/°C)
1.05
P2PAK thermal data
3.2
Figure 32. P2PAK PC board
)
(s
2
28
)
s
(
ct
u
d
o
r
P
e
2
t
e
l
o
s
b
O
t
c
u
d
o
r
P
e
t
e
l
o
bs
O
26/46
("1($'5
1. Layout condition of Rth and Zth measurements (PCB FR4 area = 60 mm x 60 mm, PCB thickness = 2 mm,
Cu thickness = 35 μm , Copper areas: 0.97 cm2, 8 cm2).
Doc ID 6942 Rev. 4
VN750
Package and PCB thermal data
Figure 33. Rthj-amb vs PCB copper area in open box free air condition
24(J?AMB # 7
4J
4AMB #
)
s
(
ct
u
d
o
Pr
0#"#UHEATSINKAREACM>
e
t
e
ol
("1($'5
Figure 34. P2PAK thermal impedance junction ambient single pulse
:4( # 7
)
(s
t
c
u
t
e
l
o
O
bs
CM
od
r
P
e
s
b
O
CM
4IMES
("1($'5
Equation 2: pulse calculation formula
Z
THδ
= R
TH
⋅δ+Z
THtp
(1 – δ)
where δ = tP/T
Doc ID 6942 Rev. 4
27/46
Package and PCB thermal data
VN750
Figure 35. Thermal fitting model of a single channel
Table 17.
)
s
(
ct
Area/island (cm2)
0.5
R1 (°C/W)
0.15
e
t
e
ol
R2 (°C/W)
0.7
R3 (°C/W)
bs
O
)
R5 (°C/W)
R6 (°C/W)
s
(
t
c
C1 (W·s/°C)
9
37
C3 (W·s/°C)
0.055
C4 (W·s/°C)
0.4
C5 (W·s/°C)
2
C6 (W·s/°C)
3
O
Doc ID 6942 Rev. 4
22
0.0006
0.0025
o
s
b
28/46
6
4
C2 (W·s/°C)
u
d
o
Pr
Pr
0.7
R4 (°C/W)
e
t
e
l
u
d
o
Thermal parameter
5
VN750
3.3
Package and PCB thermal data
PPAK thermal data
Figure 36. PPAK PC board
)
s
(
ct
u
d
o
("1($'5
r
P
e
1. Layout condition of Rth and Zth measurements (PCB FR4 area = 60 mm x 60 mm, PCB thickness = 2 mm,
Cu thickness = 35 μm , Copper areas: 0.44 cm2, 8 cm2).
t
e
l
o
Figure 37. Rthj-amb vs PCB copper area in open box free air condition
24(J?AMB #7
)
(s
P
e
s
b
O
t
c
u
d
o
r
t
e
l
o
s
b
O
0#"#UHEATSINKAREACM>
Doc ID 6942 Rev. 4
("1($'5
29/46
Package and PCB thermal data
VN750
Figure 38. PPAK thermal impedance junction ambient single pulse
:4( #7
CM
CM
)
s
(
ct
u
d
o
4IMES
Z
where δ = tP/T
= R
)
(s
THδ
t
e
l
o
s
b
O
Equation 3: pulse calculation formula
TH
⋅δ+Z
t
c
u
r
P
e
THtp
(1 – δ)
Figure 39. Thermal fitting model of a single channel
d
o
r
P
e
t
e
l
o
s
b
O
30/46
Doc ID 6942 Rev. 4
("1($'5
VN750
Package and PCB thermal data
Table 18.
Thermal parameter
Area/island (cm2)
0.5
R1 (°C/W)
0.15
R2 (°C/W)
0.7
R3 (°C/W)
1.6
R4 (°C/W)
2
R5 (°C/W)
15
R6 (°C/W)
61
C1 (W·s/°C)
0.0006
C2 (W·s/°C)
0.0025
C3 (W·s/°C)
0.08
C4 (W·s/°C)
0.3
C5 (W·s/°C)
0.45
C6 (W·s/°C)
0.8
6
24
r
P
e
u
d
o
)
s
(
ct
5
t
e
l
o
)
(s
s
b
O
t
c
u
d
o
r
P
e
t
e
l
o
s
b
O
Doc ID 6942 Rev. 4
31/46
Package and packing information
VN750
4
Package and packing information
4.1
ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
SO-8 package information
)
s
(
ct
Figure 40. SO-8 package dimensions
u
d
o
6
H
)
(s
'
d
o
r
t
c
u
P
e
t
e
l
o
s
b
O
0
s
b
O
32/46
(
)
t
e
l
o
E
H
D
E
F
r
P
e
$
D
&
/
D
4.2
("1($'5
Doc ID 6942 Rev. 4
VN750
Package and packing information
Table 19.
SO-8 mechanical data
mm
Dim.
Min.
Typ.
Max.
A
1.75
a1
0.1
0.25
a2
1.65
a3
0.65
0.85
b
0.35
0.48
b1
0.19
C
0.25
c1
4.8
E
5.8
ete
ol
e
bs
e3
F
(s)
ct
du
S
o
r
P
5
6.2
3.81
4
0.4
M
Pr
0.5
1.27
-O
3.8
L
e
t
e
ol
u
d
o
45 (typ.)
D
L1
)
s
(
ct
0.25
1.27
0.6
8 (max.)
0.8
1.2
s
b
O
Doc ID 6942 Rev. 4
33/46
Package and packing information
4.3
VN750
PENTAWATT mechanical data
Figure 41. PENTAWATT package dimensions
)
s
(
ct
u
d
o
r
P
e
t
e
l
o
)
(s
s
b
O
t
c
u
d
o
r
P
e
Table 20.
t
e
l
o
bs
O
34/46
PENTAWATT mechanical data
mm
Dim.
Min.
Typ.
Max.
A
4.8
C
1.37
D
2.4
2.8
D1
1.2
1.35
E
0.35
0.55
F
0.8
1.05
F1
1
1.4
G
3.2
Doc ID 6942 Rev. 4
3.4
3.6
VN750
Package and packing information
Table 20.
PENTAWATT mechanical data (continued)
mm
Dim.
G1
Min.
Typ.
Max.
6.6
6.8
7
H2
10.4
H3
10.05
10.4
L
17.85
L1
15.75
L2
21.4
L3
22.5
L5
2.6
L6
15.1
L7
6
ol
ete
M
bs
M1
O
)
Diam.
3.65
)
s
(
ct
Pr
u
d
o
3
15.8
6.6
4.5
4
3.85
s
(
t
c
u
d
o
r
P
e
t
e
l
o
s
b
O
Doc ID 6942 Rev. 4
35/46
Package and packing information
VN750
P2PAK mechanical data
4.4
Figure 42. P2PAK package dimensions
)
s
(
ct
u
d
o
r
P
e
t
e
l
o
)
(s
s
b
O
t
c
u
d
o
r
P
e
t
e
l
o
s
b
O
36/46
("1($'5
Doc ID 6942 Rev. 4
VN750
Package and packing information
P2PAK mechanical data
Table 21.
mm
Dim.
Min.
Typ.
A
4.30
4.80
A1
2.40
2.80
A2
0.03
0.23
b
0.80
1.05
c
0.45
0.60
c2
1.17
D
8.95
u
d
o
8.00
E
10.00
e
t
e
ol
E1
8.50
e
3.20
e1
6.60
L
13.70
(s)
L2
ct
L3
du
L5
o
r
P
R
)
s
(
ct
1.37
D2
e
t
e
ol
Max.
V2
Pr
bs
-O
9.35
10.40
3.60
7.00
14.50
1.25
1.40
0.90
1.70
1.55
2.40
0.40
0º
Package weight
8º
1.40 Gr (typ)
s
b
O
Doc ID 6942 Rev. 4
37/46
Package and packing information
4.5
VN750
PPAK mechanical data
Figure 43. PPAK package dimensions
)
s
(
ct
u
d
o
r
P
e
t
e
l
o
)
(s
s
b
O
t
c
u
d
o
r
P
e
t
e
l
o
s
b
O
("1($'5
38/46
Doc ID 6942 Rev. 4
VN750
Package and packing information
Table 22.
PPAK mechanical data
mm
Dim.
Min.
Typ.
A
2.20
2.40
A1
0.90
1.10
A2
0.03
0.23
B
0.40
0.60
B2
5.20
5.40
C
0.45
C2
0.48
D
6.00
)
s
(
ct
0.60
5.1
E
t
e
l
o
6.40
E1
G
bs
6.20
6.60
(s)
ct
H
du
L2
o
r
P
L5
1.27
-O
4.90
G1
s
b
O
0.60
4.7
e
L4
u
d
o
r
P
e
D1
e
t
e
ol
Max.
5.25
2.38
2.70
9.35
10.10
0.8
0.60
1.00
1
—
L6
2.80
R
0.2
V2
1.00
0°
Package weight
8°
Gr. 0.3
Doc ID 6942 Rev. 4
39/46
Package and packing information
4.6
VN750
SO-8 packing information
The devices can be packed in tube or tape and reel shipments (see the Table 1: Device
summary ).
Figure 44. SO-8 tube shipment (no suffix)
B
Base Q.ty
Bulk Q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
C
A
100
2000
532
3.2
6
0.6
)
s
(
ct
All dimensions are in mm.
u
d
o
Figure 45. SO-8 tape and reel shipment (suffix “TR”)
r
P
e
Reel dimensions
t
e
l
o
)
(s
2500
2500
330
1.5
13
20.2
12.4
60
18.4
All dimensions are in mm.
t
c
u
d
o
r
Tape dimensions
s
b
O
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
P
e
t
e
l
o
s
b
O
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
P
D (+0.1/-0)
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
12
4
8
1.5
1.5
5.5
4.5
2
All dimensions are in mm.
End
Start
Top
cover
tape
No components
Components
Empty components pockets
saled with cover tape.
User direction of feed
40/46
Doc ID 6942 Rev. 4
No components
500mm min
500mm min
VN750
4.7
Package and packing information
PENTAWATT packing information
The devices can be packed in tube or tape and reel shipments (see the Table 1: Device
summary ).
Figure 46. PENTAWATT tube shipment (no suffix)
Base Q.ty
Bulk Q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
"
#
50
1000
532
18
33.1
1
u
d
o
!
r
P
e
("1($'5
t
e
l
o
P2PAK packing information
4.8
)
s
(
ct
All dimensions are in mm.
s
b
O
The devices can be packed in tube or tape and reel shipments (see the Table 1: Device
summary ).
)
(s
Figure 47. P2PAK tube shipment (no suffix)
ct
"
u
d
o
r
P
e
let
O
o
s
b
#
Base Q.ty
Bulk Q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
50
1000
532
18
33.1
1
All dimensions are in mm.
!
("1($'5
Doc ID 6942 Rev. 4
41/46
Package and packing information
VN750
Figure 48. P2PAK tape and reel (suffix “13TR”)
REEL DIMENSIONS
All dimensions are in mm.
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
1000
1000
330
1.5
13
20.2
24.4
60
30.4
)
s
(
ct
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
P
D (± 0.1/-0)
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
24
4
12
1.5
1.5
11.5
6.5
2
All dimensions are in mm.
u
d
o
r
P
e
t
e
l
o
s
b
O
End
ct
)
(s
u
d
o
Top
cover
tape
Components
No components
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
r
P
e
t
e
l
o
s
b
O
42/46
Start
No components
Doc ID 6942 Rev. 4
500mm min
VN750
4.9
Package and packing information
PPAK packing information
The devices can be packed in tube or tape and reel shipments (see the Table 1: Device
summary ).
Figure 49. PPAK suggested pad layout
3
1.8
C
B
t
c
u
)
(s
u
d
o
6.7
Figure 50. PPAK tube shipment (no suffix)
A
)
s
(
ct
t
e
l
o
r
P
e
Base Q.ty
Bulk Q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
s
b
O
75
3000
532
6
21.3
0.6
All dimensions are in mm.
d
o
r
P
e
t
e
l
o
s
b
O
Doc ID 6942 Rev. 4
43/46
Package and packing information
VN750
Figure 51. PPAK tape and reel (suffix “13TR”)
REEL DIMENSIONS
All dimensions are in mm.
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
TAPE DIMENSIONS
2500
2500
330
1.5
13
20.2
16.4
60
22.4
u
d
o
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
P
D (± 0.1/-0)
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
All dimensions are in mm.
e
t
e
ol
r
P
e
t
e
l
o
s
b
O
End
)
(s
ct
u
d
o
16
4
8
1.5
1.5
7.5
2.75
2
Start
Top
cover
tape
No components
Components
Pr
User direction of feed
Doc ID 6942 Rev. 4
No components
500mm min
Empty components pockets
saled with cover tape.
s
b
O
44/46
)
s
(
ct
500mm min
VN750
5
Revision history
Revision history
Table 23.
Document revision history
Date
Revision
21-Jun-2004
1
Initial release.
2
Current and voltage convention update (page 2).
Configuration diagram (top view) & suggested connections for
unused and n.c. pins: insertion (page 2).
6cm2 Cu condition insertion in thermal data table (page 3).
VCC - output diode section update (page 4).
Revision history table insertion (page 30).
Disclaimers update (page 31).
03-May-2006
Changes
)
s
(
ct
u
d
o
24-Nov-2008
3
Document reformatted and restructured.
Added content, list of figures and tables.
Added ECOPACK® packages information.
Updated Figure 48.: P2PAK tape and reel (suffix “13TR”):
– changed component spacing (P) in tape dimensions table from 16
mm to 12 mm.
18-May-2012
4
Updated Section 4.5: PPAK mechanical data
r
P
e
t
e
l
o
)
(s
s
b
O
t
c
u
d
o
r
P
e
t
e
l
o
s
b
O
Doc ID 6942 Rev. 4
45/46
VN750
)
s
(
ct
Please Read Carefully:
u
d
o
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
time, without notice.
r
P
e
All ST products are sold pursuant to ST’s terms and conditions of sale.
t
e
l
o
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products
or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such
third party products or services or any intellectual property contained therein.
)
(s
s
b
O
UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
t
c
u
d
o
r
UNLESS EXPRESSLY APPROVED IN WRITING BY TWO AUTHORIZED ST REPRESENTATIVES, ST PRODUCTS ARE NOT
RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING
APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY,
DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE
GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER’S OWN RISK.
P
e
t
e
l
o
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any
liability of ST.
s
b
O
ST and the ST logo are trademarks or registered trademarks of ST in various countries.
Information in this document supersedes and replaces all information previously supplied.
The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
© 2012 STMicroelectronics - All rights reserved
STMicroelectronics group of companies
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
www.st.com
46/46
Doc ID 6942 Rev. 4