VN750SMPTR-E

VN750SMP-E High side driver Features Type RDS(on) IOUT VCC VN750SMP-E 55 m 6A 36 V • ECOPACK® : lead free and RoHS compliant • Automotive Grade: compliance with AEC guidelines • CMOS compatible input • On-state open-load detection • Off-state open-load detection • Shorted load protection • Undervoltage and overvoltage shutdown • Protection against loss of ground • Very low standby current • Reverse battery protection (see Application schematic on page 16 ) • In compliance with the 2002/95/EC european directive Table 1. SO-8 Description The VN750SMP-E is a monolithic device designed in STMicroelectronics VIPower™ M0-3 Technology, intended for driving any kind of load with one side connected to ground. Active VCC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table). Active current limitation combined with thermal shutdown and automatic restart help protect the device against overload. The device detects open-load condition in on and off-state. The open-load threshold is aimed at detecting the 5W/12V standard bulb as an openload fault in the on-state. Output shorted to VCC is detected in the off-state. Device automatically turns off in case of ground pin disconnection. Device summary Order codes Package SO-8 September 2013 Tube Tape and reel VN750SMP-E VN750SMPTR-E Doc ID 16812 Rev 2 1/27 www.st.com 1 Contents VN750SMP-E Contents 1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2.5 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 16 5 2/27 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 16 2.5.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 17 2.6 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2.7 Microcontroller I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2.8 Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2.9 SO-8 maximum demagnetization energy (VCC = 13.5 V) . . . . . . . . . . . . 19 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.1 4 2.5.1 SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 4.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 4.2 SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 4.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Doc ID 16812 Rev 2 VN750SMP-E List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Switching (VCC=13 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Input pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 VCC output diode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Electrical transient requirements on VCC pin (part 1/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Electrical transient requirements on VCC pin (part 2/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Electrical transient requirements on VCC pin (part 3/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 SO-8 thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Doc ID 16812 Rev 2 3/27 List of figures VN750SMP-E List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. 4/27 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Open-load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Open-load off-state voltage detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Ilim vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 SO-8 maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 SO-8 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 20 SO-8 thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . 21 SO-8 thermal fitting model of a single channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 SO-8 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 SO-8 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Doc ID 16812 Rev 2 VN750SMP-E 1 Block diagram and pin description Block diagram and pin description Figure 1. Block diagram VCC OVERVOLTAGE DETECTION VCC CLAMP UNDERVOLTAGE DETECTION GND Power CLAMP DRIVER INPUT OUTPUT LOGIC CURRENT LIMITER ON STATE OPENLOAD DETECTION STATUS OVERTEMPERATURE DETECTION Figure 2. OFF STATE OPENLOAD AND OUTPUT SHORTED TO VCC DETECTION Configuration diagram (top view) VCC OUTPUT OUTPUT VCC 5 6 7 8 4 3 2 1 STAT_DIS STATUS INPUT GND SO-8 Table 2. Suggested connections for unused and not connected pins Connection/pin Status N.C. Output Input Floating X X X X To ground X Doc ID 16812 Rev 2 Through 10 Kresistor 5/27 Electrical specifications 2 VN750SMP-E Electrical specifications Figure 3. Current and voltage conventions IS VF IIN VCC INPUT ISTAT IOUT STATUS VCC OUTPUT GND VIN VSTAT 2.1 IGND VOUT Absolute maximum ratings Stress values that exceed those listed in the “Absolute maximum ratings” table can cause permanent damage to the device. These are stress ratings only, and operation of the device at these, or any other conditions greater than those, indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics sure program and other relevant quality documents. Table 3. Absolute maximum ratings Symbol VCC DC supply voltage Value Unit 41 V - VCC Reverse DC supply voltage - 0.3 V - Ignd DC reverse ground pin current - 200 mA IOUT DC output current Internally limited A -6 A - IOUT 6/27 Parameter Reverse DC output current IIN DC input current +/- 10 mA ISTAT DC status current +/- 10 mA VESD Electrostatic discharge (human body model: R=1.5 K C=100pF) - Input - Status - Output - VCC 4000 4000 5000 5000 V V V V Doc ID 16812 Rev 2 VN750SMP-E Electrical specifications Table 3. Absolute maximum ratings (continued) Value Unit (L=1.3mH; RL=0; Vbat=13.5V; Tjstart=150ºC; IL=10A) 90 mJ Power dissipation TC=25°C 4.2 W Internally limited °C - 55 to 150 °C Symbol Parameter Maximum switching energy EMAX Ptot Tj Junction operating temperature Storage temperature Tstg 2.2 Thermal data Table 4. Thermal data Symbol Rthj-case Rthj-amb Parameter Max. value Thermal resistance junction-case Unit 1.7 Thermal resistance junction-ambient 93 (1) °C/W (2) 82 °C/W 2 1. When mounted on a standard single-sided FR-4 board with 0.5cm of Cu (at least 35µm thick) connected to all VCC pins. Horizontal mounting and no artificial air flow. 2. When mounted on a standard single-sided FR-4 board with 2cm2 of Cu (at least 35µm thick) connected to all VCC pins. Horizontal mounting and no artificial air flow. 2.3 Electrical characteristics Values specified in this section are for 8 VTjsh Ilim Current limitation 5.5 V Tjsh VIN VIN VSTAT VSTAT tDOL(off) Figure 5. tDOL(on) tSDL tSDL Switching time waveforms VOUT 90% 80% dVOUT/dt(off) dVOUT/dt(on) 10% t VIN td(on) td(off) t Table 12. 10/27 Truth table Conditions Input Output Status Normal operation L H L H H H Current limitation L H H L X X H (Tj < TTSD) H (Tj > TTSD) L Overtemperature L H L L H L Undervoltage L H L L X X Overvoltage L H L L H H Doc ID 16812 Rev 2 VN750SMP-E Electrical specifications Table 12. Truth table Conditions Input Output Status Output voltage > VOL L H H H L H Output current < IOL L H L H H L Table 13. Electrical transient requirements on VCC pin (part 1/3) Test levels ISO T/R 7637/1 test pulse I II III IV Delays and impedance 1 -25 V -50 V -75 V -100 V 2 ms 10  2 +25 V +50 V +75 V +100 V 0.2 ms 10  3a -25 V -50 V -100 V -150 V 0.1 µs 50  3b +25 V +50 V +75 V +100 V 0.1 µs 50  4 -4 V -5 V -6 V -7 V 100 ms, 0.01  5 +26.5 V +46.5 V +66.5 V +86.5 V 400 ms, 2  Table 14. Electrical transient requirements on VCC pin (part 2/3) Test levels results ISO T/R 7637/1 test pulse I II III IV 1 C C C C 2 C C C C 3a C C C C 3b C C C C 4 C C C C 5 C E E E Table 15. Class Electrical transient requirements on VCC pin (part 3/3) Contents C All functions of the device are performed as designed after exposure to disturbance. E One or more functions of the device is not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device. Doc ID 16812 Rev 2 11/27 Electrical specifications Figure 6. VN750SMP-E Waveforms NORMAL OPERATION INPUT LOAD VOLTAGE STATUS UNDERVOLTAGE VUSDhyst VCC VUSD INPUT LOAD VOLTAGE STATUS undefined OVERVOLTAGE VCCVOV VCC INPUT LOAD VOLTAGE STATUS OPEN LOAD with external pull-up INPUT VOUT>VOL LOAD VOLTAGE VOL STATUS OPEN LOAD without external pull-up INPUT LOAD VOLTAGE STATUS Tj TTSD TR OVERTEMPERATURE INPUT LOAD CURRENT STATUS 12/27 Doc ID 16812 Rev 2 VN750SMP-E 2.4 Electrical specifications Electrical characteristics curves Figure 7. Off-state output current Figure 8. High level input current Iih (uA) IL(off1) (uA) 7 3 2.5 6 Off state Vcc=36V Vin=Vout=0V 2 Vin=3.25V 5 1.5 4 1 3 0.5 2 0 -0.5 1 -1 -50 -25 0 25 50 75 100 125 150 0 175 -50 -25 0 25 Tc (ºC) Figure 9. 50 75 100 125 150 175 Tc (ºC) Input clamp voltage Figure 10. Status leakage current Ilstat (uA) Vicl (V) 0.05 8 7.8 Iin=1mA 7.6 0.04 Vstat=5V 7.4 0.03 7.2 7 0.02 6.8 6.6 6.4 0.01 6.2 6 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 Tc (°C) Figure 11. 50 75 100 125 150 175 Tc (°C) Status low output voltage Figure 12. Status clamp voltage Vscl (V) Vstat (V) 8 0.6 7.8 0.5 Istat=1mA 7.6 Istat=1.6mA 7.4 0.4 7.2 7 0.3 6.8 0.2 6.6 6.4 0.1 6.2 0 -50 -25 0 25 50 75 100 125 150 175 Tc (ºC) 6 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) Doc ID 16812 Rev 2 13/27 Electrical specifications VN750SMP-E Figure 13. On-state resistance vs Tcase Figure 14. On-state resistance vs VCC Ron (mOhm) Ron (mOhm) 140 120 110 120 Iout=2A Vcc=8V; 13V; 36V 100 Iout=2A 100 Tc= 150°C 90 80 80 Tc= 125°C 70 60 60 50 40 Tc= 25°C 40 20 Tc= - 40°C 30 0 20 -50 -25 0 25 50 75 100 125 150 175 5 10 15 Tc (ºC) 20 25 30 35 40 Vcc (V) Figure 15. Open-load on-state detection Figure 16. Open-load off-state voltage threshold detection threshold Vol (V) 5 4.5 Vin=0V 4 3.5 3 2.5 2 1.5 1 -50 -25 0 25 50 75 100 125 150 175 125 150 175 Tc (ºC) Figure 17. Input high level Figure 18. Input low level Vih (V) Vil (V) 3.6 2.8 3.4 2.6 2.4 3.2 2.2 3 2 2.8 1.8 2.6 1.6 2.4 1.4 2.2 1.2 2 1 -50 -25 0 25 50 75 100 125 150 175 Tc (ºC) 14/27 -50 -25 0 25 50 75 Tc (ºC) Doc ID 16812 Rev 2 100 VN750SMP-E Electrical specifications Figure 19. Turn-on voltage slope Figure 20. Turn-off voltage slope dVout/dt/(on) (V/ms) dVout/dt(off) (V/ms) 1000 500 900 450 Vcc=13V Rl=6.5Ohm 800 Vcc=13V Rl=6.5Ohm 400 700 350 600 300 500 250 400 200 300 150 200 100 100 50 0 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 Tc (ºC) 50 75 100 125 150 175 100 125 150 175 Tc (ºC) Figure 21. Overvoltage shutdown Figure 22. Ilim vs Tcase Vov (V) Ilim (A) 50 20 48 18 46 16 44 14 42 12 40 10 38 8 36 6 34 4 32 2 30 Vcc=13V 0 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) -50 -25 0 25 50 75 Tc (ºC) Figure 23. Input hysteresis voltage Vhyst (V) 1.5 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 0.5 -50 -25 0 25 50 75 100 125 150 175 Tc (ºC) Doc ID 16812 Rev 2 15/27 Electrical specifications VN750SMP-E Figure 24. Application schematic +5V +5V VCC Rprot STATUS Dld C Rprot INPUT OUTPUT GND VGND RGND DGND 2.5 GND protection network against reverse battery 2.5.1 Solution 1: resistor in the ground line (RGND only) This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1. RGND  600mV / (IS(on)max). 2. RGND VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. Power Dissipation in RGND (when VCC