VN771

® VN771 QUAD SMART POWER SOLID STATE RELAY FOR COMPLETE H-BRIDGE CONFIGURATIONS T YPE VN771 R DS( on) * 0.140 Ω I OUT 14 A V CC 26 V * Total resistance of one side in bridge configuration s s s s s s s IDEAL AS A LOW VOLTAGE BRIDGE VERY LOW STAND-BY POWER DISSIPATION OVER-CURRENT PROTECTED STATUS FLAG DIAGNOSTICS ON UPPER SIDE OPEN DRAIN DIAGNOSTICS OUTPUT UNDER-VOLTAGE PROTECTION SUITABLE AS QUAD SWITCH SO-28 DESCRIPTION The VN771 is a device formed by three monolithic chips housed in a standard SO-28 package: a double high side and two Power MOSFETs. The double high side are made using STMicroelectronics VIPower technology; Power MOSFETs are made by using the new advanced strip lay-out technology This device is suitable to drive a DC motor in a bridge configuration as well as to be used as a quad switch for any low voltage application. The dual high side switches have built-in thermal shut-down to protect the chip from over temperature and short circuit, status output to provide indication for open load in off and on state, overtemperature conditions and stuck-on to VCC. DUAL HIGH-SIDE SWITCH From the falling edge of the input signal, the status output, initially low to signal a fault condition (overtemperature or open load on-state), will go back to a high state with a different delay in case of overtemperature (tpovl) and in case of open open load (tpol) respectively. This feature allows to discriminate the nature of the detected fault. To protect the device against short circuit and over current condition, the thermal protection turns the integrated Power October 1998 MOS off at a minimum junction temperature of 140 oC. When this temperature returns to 125 oC the switch is automatically turned on again. In short circuit the protection reacts with virtually no delay, the sensor (one for each channel) being located inside each of the two Power MOS areas. This positioning allows the device to operate with one channel in automatic thermal cycling and the other one on a normal load. An internal function of the devices ensures the fast demagnetization of inductive loads with a typical voltage (Vdemag) of -18V. This function allows to greatly reduces the power dissipation according to the formula: Pdem = 0.5 • Lload • (Iload)2 • [(VCC+Vdemag)/Vdemag] • f where f = switching frequency and Vdemag = demagnetization voltage. In this device if the GND pin is disconnected, with VCC not exceeding 16V, both channel will switch off. Power MOSFETs During normal operation, the Input pin is electrically connected to the gate of the internal power MOSFET. The devices can be used as a switch from DC to very high frequency. 1/10 VN771 BLOCK DIAGRAM 2/10 VN771 CONNECTION DIAGRAM PIN FUNCTION No 1, 3, 25, 28 2 4, 11 5, 10, 19, 24 6 7 8 9 12, 14, 15, 18 13 16, 17 20, 21 22, 23 26, 27 NAME DRAIN 3 INPUT 3 N.C. V CC GND INPUT 1 FUNCT ION Drain of Switch 3 (low-side switch) Input of Switch 3 (low-side switch) Not Connected Drain of Switches 1and 2 (high-side switches) and Power Supply Voltage Ground of Switches 1 and 2 (high-side switches) Input of Switch 1 (high-side switch) DIAG NO STIC Diagnostic of Switches 1 and 2 (high-side switc hes) INPUT 2 DRAIN 4 INPUT 4 SO URCE 4 SO URCE 2 SO URCE 1 SO URCE 3 Input of Switch 2 (high-side switch) Drain of Switch 4 (low-side switch) Input of Switch 4 (low-side switch) Source of Switch 4 (low-side switch) Source of Switch 2 (high-side switch) Source of Switch 1 (high-side switch) Source of Switch 3 (low-side switch) 3/10 VN771 PROTECTION CIRCUITS DUAL HIGH SIDE SWITCH The simplest way to protect the device against a continuous reverse battery voltage (-26V) is to insert a a small resistor between pin 2 (GND) and ground. The suggested resistance value is about 150Ω. In any case the maximum voltage drop on this resistor should not overcome 0.5V. If there is no need for the control unit to handle external analog signals referred to the power GND, the best approach is to connect the reference potential of the control unit to the device ground (see application circuit in fig. 3), which becomes the common signal GND for the whole control board avoiding shift of Vih, Vil and Vstat. TRUTH TABLE (for Dual high-side switch only) INPUT 1 Normal Operation L H L H X INPUT 2 L H H L X X H X L H L X L H L SO URCE 1 SOURCE 2 DIAG NO STIC L H L H L L X H L X L H H X L L H H L L X L X L H L X L H H H H H H H L L L L L L L L L L Under-voltage T hermal Shutdown O pen Load Channel 1 Channel 2 Channel 1 Channel 2 H X H L X L H L X L O utput Shorted to V CC Channel 1 Channel 2 NOTE: The low-side switches have the fault feedback which can be detected by monitoring the voltage at the input pins. L = Logic LOW, H = Logic HIGH, X = Don’t care ABSOLUTE MAXIMUM RATING (-40 oC < Tj < 150 oC) HIGH SIDE SWITCH Symb ol V (BR)DSS I OUT IR I IN -V CC I STAT V ESD P tot Tj T s tg Parameter Drain-Source Brekdown Voltage Output Current (continuous) Reverse O utput Current Input Current Reverse Supply Current Status Current Electrostatic Discharge (C = 100 pF, R = 1.5 K Ω) Power Dissipation @ Tc = 25 C Junction Operating Temperature Storage Temperature o Value 40 14 -14 ± 10 -4 ± 10 2000 Internally Limited -40 to 150 -55 to 150 Unit V A A mA V mA V W o o C C 4/10 VN771 ABSOLUTE MAXIMUM RATING (continued) LOW SIDE SWITCH Symb ol V DS V DGR V GS ID ID I DM(*) dv/dt (1) T s tg Tj Parameter Drain-Source Voltage (VGS = 0) Drain-Gate Voltage (RG S = 20 KΩ ) Gate-Source Voltage Drain Current (continuous) @ Tc = 25 C Drain Current (continuous) @ Tc = 100 oC Drain Current (pulsed) Peak Diode Recovery Voltage Slope Storage Temperature Operating Junction Temperature o Value 60 60 ± 20 36 24 144 7 -55 to 150 -40 to 150 Unit V V V A A A V/ns o C o W/ C THERMAL DATA R t hj-ca se R t hj-ca se R t hj- amb Thermal Resistance Junction-case (High-side switch) Thermal Resistance Junction-case (Low-side switch) Thermal Resistance Junction-ambient Max Max Max 20 20 60 o o C/W C/W o C/W ELECTRICAL CHARACTERISTICS FOR DUAL HIGH SIDE SWITCH (8 < VCC < 16 V; -40 ≤ Tj ≤ 125 oC unless otherwise specified) POWER Symb ol VCC In(*) R on IS V DS(MAX) Ri Parameter Supply Voltage Nominal Current On State Resistance Supply Current T c = 85 C V DS(on ) ≤ 0.5 V CC = 13 V I OUT = I n V CC = 13 V Off St ate o o o o o Test Cond ition s Min. 6 3.4 0.065 Typ . 13 Max. 26 5.2 0.1 Un it V A Ω µA V KΩ T j = 25 C V CC = 13 V VCC = 13 V Tj = 25 C Tj = 85 C 35 1.2 5 10 100 2 20 Maximum Voltage Drop I OUT = 13 A Output to G ND internal T j = 25 C Impedance SWITCHING Symb ol t d(on)(^) t r (^) t d(off )(^) tf (^) Parameter Test Cond ition s Min. 5 28 10 28 Typ . 35 110 140 75 Max. 200 360 500 360 Un it µs µs µs µs Turn-on Delay Time O f R out = 2.7 Ω Output Current Rise Time Of Output Current R out = 2.7 Ω Turn-off Delay Time O f R out = 2.7 Ω Output Current Fall Time Of Output Current R out = 2.7 Ω 5/10 VN771 ELECTRICAL CHARACTERISTICS FOR DUAL HIGH SIDE SWITCH (continued) ( di/dt) on (di/dt) off Turn-on Current Slope Turn-off Current Slope R out = 2.7 Ω R out = 2.7 Ω 0.003 0.005 0.1 0.1 A/ µ s A/ µ s LOGIC INPUT Symbol VI L V IH V I(hys t.) II N V ICL Parameter Input Low Level Voltage Input High Level Voltage Input Hysteresis Voltage Input Current Input Clamp Voltage VI N = 5 V Tj = 25 oC 5 IIN = 10 mA IIN = -10 mA 3.5 0.2 0.9 30 6 -0.7 Test Co nditio ns Min. Typ . Max. 1.5 (•) 1.5 100 7 Unit V V V µA V V PROTECTION AND DIAGNOSTICS Symbol V STAT VUSD V SCL T TSD T SD( hys t.) TR V OL IOL t povl t pol Parameter St atus Voltage Output Low Under Voltage Shut Down St atus Clamp Voltage Thermal Shut-down Temperature Thermal Shut-down Hysteresis Reset Temperature Open Voltage Level Open Load Current Level St atus Delay St atus Delay Of f-State (note 2) On-State (note 3) (note 3) 50 125 2.5 0.6 4 0.9 5 500 5 1.4 10 2500 IST AT = 10 mA IST AT = -10 mA Test Co nditio ns IST AT = 1.6 mA 3.5 5 140 4.5 6 -0.7 160 Min. Typ . Max. 0.4 6 7 180 50 Unit V V V V o C C C o o V A µs µs (*) In= Nominal current according to ISO definition for high side automotive switch (see note 1) (^) See switching time waveform () The VIH is internally clamped at 6V about. It is possible to connect this pin to an higher voltage via an external resistor calculated to not exceed 10 mA at the input pin. note 1: The Nominal Current is the current at Tc = 85 oC for battery voltage of 13V which produces a voltage drop of 0.5 V note 2: IOL(off) = (VCC -VOL)/ROL note 3: tpovl tpol: ISO definition ELECTRICAL CHARACTERISTICS FOR LOW SIDE SWITCH 6/10 VN771 (Tcase = 25 oC unless otherwise specified) OFF Symbol V (BRDSS) I DSS I GSS Parameter Drain-source Brekdown Voltage Test Co nditio ns ID = 250 µ A V GS = 0 Min. 60 1 10 ± 100 Typ . Max. Unit V µA µA nA VDS = Max Rating Zero G ate Voltage Drain Current (V GS = 0) VDS = Max Rating, TC = 125 o C Gate-Body Leakage Current (V DS = 0) VGS = ± 20 V ON (∗) Symbol V GS(th) R DS(on) I D( on) Parameter Gate Threshold Voltage St atic Drain-Source On Resistance On State Drain Current (V DS = 0) VDS = V GS VGS = 10 V Test Co nditio ns I D = 250 µ A I D = 18 A 36 Min. 1 0.032 Typ . Max. 2.5 0.04 Unit V Ω A VDS > I D(on ) x R DS(o n)max VGS = 10 V DYNAMIC Symbol g fs (∗ ) C iss C os s C rs s Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse T ransfer Capacitance Test Co nditio ns VDS > I D(on ) x R DS(o n)max VDS = 25 V f = 1 MHz I D = 18A V GS = 0 Min. 7 2115 260 65 2800 350 90 Typ . Max. Unit S pF pF pF SWITCHING-ON (**) Symbol t d(o n) tr (di/dt) on Qg Q gs Q gd Parameter Turn-on Time Rise Time Turn-on Current Slope Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Co nditio ns VDD = 30 V R G = 4.7 Ω VDD = 48 V R G = 47 Ω VDD = 48 V VGS = 10 V I D = 18 A V GS = 10 V I D = 36 A V GS = 10 V I D = 36 A Min. Typ . 28 85 250 50 13 18 70 Max. 40 115 Unit ns ns A/ µ s nC nC nC SWITCHING-OFF Symbol t r(Vof f) tr tc Parameter Of f-Voltage Rise Time Fall Time Cross-Over Time Test Co nditio ns VDD = 48 V R G = 4.7 Ω I D = 36 A V GS = 10 V Min. Typ . 12 25 40 Max. 16 35 55 Unit ns ns ns 7/10 VN771 ELECTRICAL CHARACTERISTICS FOR DUAL LOW SIDE SWITCH (continued) SOURCE-DRAIN DIODE Symbo l I SD I SDM ( ∗∗) V SD ( ∗) t rr Q rr IRRM Parameter Source-Drain Current Source-Drain Current (pulsed) Forward O n Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 36 A I SD = 36 A, V r = 30 V V GS =0 di/dt = 100 A/µ s o Tj = 150 C 75 245 6.5 Test Con ditio ns Min . Typ . Max. 36 144 1.5 Unit A A V ns nC A (∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % (∗∗) Pulse width limited by Safe Operating Area. TYPICAL APPLICATION DIAGRAM 8/10 VN771 SO-28 MECHANICAL DATA mm MIN. A a1 b b1 C c1 D E e e3 F L S 7.40 0.40 17.7 10.00 1.27 16.51 7.60 1.27 8 (max.) 0.291 0.016 18.1 10.65 0.10 0.35 0.23 0.50 45 (typ.) 0.697 0.393 0.050 0.650 0.299 0.050 0.713 0.419 TYP. MAX. 2.65 0.30 0.49 0.32 0.004 0.013 0.009 0.020 MIN. inch TYP. MAX. 0.104 0.012 0.019 0.012 DIM. 0016572 9/10 VN771 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics © 1998 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. http://www.st.com . 10/10