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VN820-12-E

VN820-12-E

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    Pentawatt5

  • 描述:

    IC PWR DRVR N-CH 1:1 5PENTAWATT

  • 数据手册
  • 价格&库存
VN820-12-E 数据手册
VN820-E High-side driver Datasheet − production data Features Type RDS(on) IOUT 10 VCC 1 VN820-E VN820SP-E VN820B5-E VN820PT-E VN820-12-E VN820-11-E PowerSO-10 40 mΩ 9A 36 V ■ ECOPACK®: lead free and RoHS compliant ■ Automotive Grade: compliance with AEC guidelines ■ Very low stadby current ■ CMOS compatible input ■ On-state open-load detection ■ Off-state open-load detection ■ Thermal shutdown protection and diagnosis ■ Undervoltage shutdown ■ Overvoltage clamp ■ Output stuck to VCC detection ■ Load current limitation ■ Reverse battery protection ■ Electrostatic discarge protection Table 1. P2PAK PPAK PENTAWATT Description The VN820-E is a monolithic device designed in STMicroelectronic's VIPower® M0-3 technology. The VN820-E is intended for driving any type of load with one side connected to ground. The active VCC pin voltage clamp protects the device against low energy spikes. Active current limitation combined with thermal shutdown and automatic restart protect the device against overload. The device detects the openload condition in both on- and off-state mode. In the off-state the device detects if the output is shorted to VCC. The device automatically turns off where the ground pin becomes disconnected. Device summary Order codes Package Tube Tape and reel PENTAWATT VN820-E VN820-12-E VN820-11-E - PowerSO-10 VN820SP-E VN820SPTR-E P2PAK VN820B5-E VN820B5TR-E PPAK VN820PT-E VN820PTTR-E September 2013 This is information on a product in full production. Doc ID 10890 Rev 8 1/44 www.st.com 1 Contents VN820-E Contents 1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.1 4 5 2/44 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 18 3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 18 3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 19 3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.4 Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.5 PowerSO-10, P2PAK, PPAK, PENTAWATT maximum demagnetization energy (VCC = 13.5V) 21 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.1 P2PAK thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.2 PPAK thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.3 PowerSO-10 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.2 PENTAWATT mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.3 P2PAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 5.4 PPAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 5.5 PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 5.6 PENTAWATT packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 5.7 P2PAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 5.8 PPAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Doc ID 10890 Rev 8 VN820-E Contents 5.9 6 PowerSO-10 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Doc ID 10890 Rev 8 3/44 List of tables VN820-E List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. 4/44 Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 7 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Switching (VCC = 13 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Input pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 VCC output diode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 P2PAK thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 PPAK thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 PowerSO-10 thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 PENTAWATT mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 P2PAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 PPAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Doc ID 10890 Rev 8 VN820-E List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40. Figure 41. Figure 42. Figure 43. Figure 44. Figure 45. Figure 46. Figure 47. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 High-level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Open-load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Input high-level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Input low-level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Open-load off-state voltage detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Ilim vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 PowerSO-10, P2PAK, PPAK, PENTAWATT maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 P2PAK PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 P2PAK Rthj-amb vs PCB copper area in open box free air conditions . . . . . . . . . . . . . . . 22 P2PAK thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . 23 Thermal fitting model of a single channel HSD in P2PAK. . . . . . . . . . . . . . . . . . . . . . . . . . 23 PPAK PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 PPAK Rthj-amb vs PCB copper area in open box free air conditions . . . . . . . . . . . . . . . . 25 PPAK thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . 26 Thermal fitting model of a single channel HSD in PPAK . . . . . . . . . . . . . . . . . . . . . . . . . . 26 PowerSO-10 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 PowerSO-10 Rthj-amb vs PCB copper area in open box free air conditions . . . . . . . . . . . 28 PowerSO-10 thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . 29 Thermal fitting model of a single channel HSD in PowerSO-10 . . . . . . . . . . . . . . . . . . . . . 29 PENTAWATT package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 P2PAK package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 PPAK package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 PowerSO-10 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 PENTAWATT tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 P2PAK tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 P2PAK tape and reel (suffix “TR”). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 PPAK suggested pad layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 PPAK tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Doc ID 10890 Rev 8 5/44 List of figures Figure 48. Figure 49. Figure 50. Figure 51. 6/44 VN820-E PPAK tape and reel (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 PowerSO-10 suggested pad layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 PowerSO-10 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 PowerSO-10 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Doc ID 10890 Rev 8 VN820-E 1 Block diagram and pin description Block diagram and pin description Figure 1. Block diagram 6 ## /6%26/,4!'% $%4%#4)/. 6 ## #,!-0 5.$%26/,4!'% $%4%#4)/. '.$ 0OWER #,!-0 $2)6%2 ).054 /54054 ,/')# #522%.4 ,)-)4%2 /. 34!4% /0%. ,/!$ $%4%#4)/. 34!453 /6%24%-0%2!452% $%4%#4)/. /&& 34!4% /0%. ,/!$ !.$ /54054 3(/24%$ 4/ 6 ## $%4%#4)/. '!0'-3 Figure 2. Configuration diagram (top view) *5281' ,1387   287387   67$786 1& 1&   287387 287387   287387   287387       287387 67$786 9 && ,1387 *1' 00!+00!+0%.4!7!44 9 && '!0'2) 0OWER3/  '!0'2) Table 2. Suggested connections for unused and not connected pins Connection / pin Status N.C. Output Input Floating X X X X To ground X Doc ID 10890 Rev 8 Through 10 KΩ resistor 7/44 Electrical specifications 2 VN820-E Electrical specifications Figure 3. Current and voltage conventions ,6 9) ,,1 ,1387 9&& ,67$7 ,287 67$786 9&& 287387 *1' 9,1 967$7 9287 ,*1' '!0'2) 2.1 Absolute maximum ratings Stressing the device above the rating listed in theTable 3 may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to Absolute maximum rating conditions for extended periods may affect device reliability. Table 3. Absolute maximum ratings Value Symbol VCC DC supply voltage -VCC PowerSO-10 PENTAWATT P2PAK PPAK Unit 41 V Reverse DC supply voltage - 0.3 V -Ignd DC reverse ground pin current - 200 mA IOUT DC output current Internally limited A -IOUT Reverse DC output current -9 A DC input current +/- 10 mA ISTAT DC Status current +/- 10 mA VESD Electrostatic discharge (human body model: R = 1.5 KΩ; C = 100 pF) – INPUT – STATUS – OUTPUT – VCC 4000 4000 5000 5000 V V V V IIN 8/44 Parameter Doc ID 10890 Rev 8 VN820-E Electrical specifications Table 3. Absolute maximum ratings (continued) Value Symbol PowerSO-10 PENTAWATT P2PAK PPAK Unit EMAX Maximum switching energy (L = 1.4 mH; RL= 0 Ω; Vbat = 13.5 V; Tjstart = 150 ºC; IL = 13 A) 156 mJ Ptot Power dissipation TC = 25 °C 65.8 W Internally limited °C Tj Junction operating temperature Tc Case operating temperature - 40 to 150 °C Storage temperature - 55 to 150 °C Tstg 2.2 Parameter Thermal data Table 4. Thermal data Max. value Symbol Parameter Unit PowerSO-10 PENTAWATT P2PAK PPAK Rthj-case Thermalresistance junction-case 1.9 1.9 1.9 1.9 °C/W Rthj-lead Thermalresistance junction-lead - - - - °C/W Thermalresistance junction-ambient 51.9(1) 61.9(2) 51.9(2) 76.9(2) °C/W Rthj-amb 37(2) - 37(4) 45(4) °C/W 2 1. When mounted on a standard single-sided FR-4 board with 0.5cm of Cu (at least 35µm thick). 2. When mounted on a standard single-sided FR-4 board with 6cm2 of Cu (at least 35µm thick). Doc ID 10890 Rev 8 9/44 Electrical specifications 2.3 VN820-E Electrical characteristics Values specified in this section are for 8 V < VCC < 36 V; -40 °C < Tj < 150 °C, unless otherwise stated. Table 5. Symbol Parameter Min. Typ. VCC Operating supply voltage 5.5 13 36 V VUSD Undervoltage shutdown 3 4 5.5 V VUSDhyst Undervoltage shutdown hysteresis VOV Overvoltage shutdown RON On-state resistance IS Test conditions 0.5 V 36 V IOUT = 3 A; Tj = 25 °C; VCC > 8 V IOUT = 3 A; VCC > 8 V Supply current Max. Unit 40 80 mΩ mΩ Off-state; VCC = 13 V; VIN = VOUT = 0 V 10 25 µA Off-state; VCC = 13 V; VIN = VOUT = 0 V; Tj = 25 °C 10 20 µA On-state; VCC = 13 V; VIN = 5 V; IOUT = 0 A 2 3.5 mA 0 50 µA -75 0 µA IL(off1) Off-state output current VIN = VOUT = 0 V IL(off2) Off-state output current VIN = 0 V; VOUT = 3.5 V IL(off3) Off-state output current VIN = VOUT = 0 V; VCC = 13 V; Tj = 125°C 5 µA IL(off4) Off-state output current VIN = VOUT = 0 V; VCC = 13 V; Tj = 25 °C 3 µA Table 6. Symbol 10/44 Power Switching (VCC = 13 V) Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time RL = 4.3 Ω from VIN rising edge to VOUT = 1.3 V 30 µs td(off) Turn-off delay time RL = 4.3 Ω from VIN falling edge to VOUT = 11.7 V 30 µs dVOUT/dt(on) Turn-on voltage slope RL = 4.3 Ω from VOUT = 1.3 V to VOUT=10.4 V See Figure 21 V/µs dVOUT/dt(off) Turn-off voltage slope RL = 4.3 Ω from VOUT = 11.7 V to VOUT = 1.3 V See Figure 22 V/µs Doc ID 10890 Rev 8 VN820-E Electrical specifications Table 7. Symbol Input pin Parameter Test conditions VIL Input low-level IIL Low-level input current VIH Input high-level IIH High-level input current Vhyst Input hysteresis voltage VICL Input clamp voltage Table 8. Symbol VF Table 9. Symbol Min. VIN = 1.25 V Typ. Max. Unit 1.25 V 1 µA 3.25 V VIN = 3.25 V 10 0.5 IIN = 1m A IIN = -1m A µA V 6 6.8 - 0.7 8 V V VCC output diode Parameter Test conditions Forward on voltage - IOUT = 2 A; Tj = 150 °C Min. Typ. Max. Unit - - 0.6 V Min. Typ. Max. Unit Status pin Parameter Test conditions VSTAT Status low output voltage ISTAT = 1.6 mA 0.5 V ILSTAT Status leakage current Normal operation; VSTAT = 5 V 10 µA CSTAT Status pin input capacitance Normal operation; VSTAT = 5 V 100 pF VSCL Status clamp voltage 8 V V Table 10. Protections(1) Symbol Parameter ISTAT = 1m A ISTAT = - 1m A 6.8 - 0.7 Min. Typ. Max. Unit Shutdown temperature 150 175 200 °C TR Reset temperature 135 Thyst Thermal hysteresis 7 tSDL Status delay in overload Tj > Tjsh condition Ilim Current limitation 9 V < VCC < 36 V 5.5 V < VCC < 36 V Turn-off output clamp voltage IOUT = 3 A; VIN = 0V; L = 6 mH TTSD Vdemag Test conditions 6 9 °C 15 13 °C 20 ms 20 20 A A VCC - 41 VCC - 48 VCC - 55 V 1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device operates under abnormal conditions this software must limit the duration and number of activation cycles. Doc ID 10890 Rev 8 11/44 Electrical specifications Table 11. VN820-E Open-load detection Symbol Parameter Test conditions IOL Open-load on-state detection threshold VIN = 5 V tDOL(on) Open-load on-state detection delay IOUT = 0 A VOL Open-load off-state voltage detection threshold VIN = 0 V tDOL(off) Open-load detection delay at turn-off Figure 4. Min. Typ. Max. Unit 70 150 300 mA 200 µs 3.5 V 1000 µs 1.5 2.5 Status timings 23(1/2$'67$7867,0 ,1*  Z LWKH[WHUQDOSX OOXS , 287  , 2/ 9 287 ! 9 2/ 29(57(0 367$7867,0 ,1* 7 M ! 7 MVK 9 ,1 9 ,1 9 67$7 9 67$7 W '2/ RII W '2/ RQ W 6'/ W 6'/ '!0'-3 Figure 5. Switching time waveforms 9 287   G 9 287  GW RII G 9 287  GW R Q  W 9 ,1 W G RQ W G RII W '!0'-3 12/44 Doc ID 10890 Rev 8 VN820-E Electrical specifications Table 12. Truth table Conditions Input Output Status Normal operation L H L H H H Current limitation L H H L X X H (Tj < TTSD) H (Tj > TTSD) L Overtemperature L H L L H L Undervoltage L H L L X X Overvoltage L H L L H H Output voltage > VOL L H H H L H Output current < IOL L H L H H L Table 13. Electrical transient requirements ISO T/R Test level 7637/1 Test pulse I II III IV Delays and impedance 1 - 25V(1) - 50V(1) - 75V(1) - 100V(1) 2ms, 10Ω 2 (1) + 50V(1) 75V(1) + 100V(1) 0.2ms, 10Ω - 50V(1) - 150V(1) 0.1µs, 50Ω + 50V(1) + 100V(1) 0.1µs, 50Ω 3a 3b + 25V - 25V(1) + 25V(1) + - 100V(1) + 75V(1) 4 - 4V(1) - 5V(1) - 6V(1) - 7V(1) 5 26.5V(1) 46.5V(2) 66.5V(2) 86.5V(2) + + + + 100ms, 0.01Ω 400ms, 2Ω 1. All functions of the device are performed as designed after exposure to disturbance. 2. One or more functions of the device is not performed as designed after exposure and cannot be returned to proper operation without replacing the device. Doc ID 10890 Rev 8 13/44 Electrical specifications Figure 6. VN820-E Waveforms NORMAL OPERATION INPUT LOAD VOLTAGE STATUS UNDERVOLTAGE VUSDhyst VCC VUSD INPUT LOAD VOLTAGE STATUS undefined OVERVOLTAGE VCC VOV VCC INPUT LOAD VOLTAGE STATUS OPEN-LOAD with external pull-up INPUT VOUT > VOL LOAD VOLTAGE VOL STATUS OPEN-LOAD without external pull-up INPUT LOAD VOLTAGE STATUS Tj TTSD TR OVERTEMPERATURE INPUT LOAD CURRENT STATUS 14/44 Doc ID 10890 Rev 8 VN820-E 2.4 Electrical specifications Electrical characteristics curves Figure 7. Off-state output current Figure 8. IL(off1) (µA) Iih (uA) 5 5 4.5 4.5 Off state Vcc=36V Vin=Vout=0V 4 3.5 High-level input current Vin=3.25V 4 3.5 3 3 2.5 2.5 2 2 1.5 1.5 1 1 0.5 0.5 0 0 -50 -25 0 25 50 75 100 125 150 -50 175 -25 0 25 Figure 9. 50 75 100 125 150 175 Tc (°C) Tc (ºC) Input clamp voltage Figure 10. Status leakage current Ilstat (uA) Vicl (V) 8 0.05 7.8 Iin=1mA 0.04 7.6 Vstat=5V 7.4 0.03 7.2 7 0.02 6.8 6.6 0.01 6.4 6.2 0 6 -50 -25 0 25 50 75 100 125 150 -50 175 -25 0 25 Figure 11. 50 75 100 125 150 175 Tc (°C) Tc (°C) Status low output voltage Figure 12. Status clamp voltage Vscl (V) Vstat (V) 8 0.8 7.8 0.7 Istat=1mA Istat=1.6mA 7.6 0.6 7.4 0.5 7.2 0.4 7 0.3 6.8 6.6 0.2 6.4 0.1 6.2 0 6 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) -50 -25 0 25 50 75 100 125 150 175 Tc (°C) Doc ID 10890 Rev 8 15/44 Electrical specifications VN820-E Figure 13. On-state resistance vs Tcase Figure 14. On-state resistance vs VCC Ron (mOhm) Ron (mOhm) 100 100 90 90 Iout=3A Vcc=8V; 13V; 36V 80 80 Tc= 150ºC 70 70 60 60 50 50 40 40 30 30 20 20 10 10 0 Tc= 25ºC Tc= - 40ºC 0 -50 -25 0 25 50 75 100 125 150 175 5 10 15 20 Tc (ºC) 25 30 35 40 Vcc (V) Figure 15. Open-load on-state detection Figure 16. Input high-level threshold Iol (mA) Vih (V) 150 3.6 140 3.4 Vcc=13V Vin=5V 130 3.2 120 110 3 100 2.8 90 2.6 80 2.4 70 2.2 60 50 2 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 Tc (°C) 50 75 100 125 150 175 Tc (°C) Figure 17. Input low-level Figure 18. Input hysteresis voltage Vil (V) Vhyst (V) 2.6 1.5 1.4 2.4 1.3 2.2 1.2 2 1.1 1.8 1 0.9 1.6 0.8 1.4 0.7 1.2 0.6 1 0.5 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) 16/44 -50 -25 0 25 50 75 Tc (°C) Doc ID 10890 Rev 8 100 125 150 175 VN820-E Electrical specifications Figure 19. Overvoltage shutdown Figure 20. Open-load off-state voltage detection threshold Vov (V) Vol (V) 50 5 48 4.5 46 4 44 3.5 Vin=0V 42 3 40 2.5 38 2 36 1.5 34 1 32 0.5 0 30 -50 -25 0 25 50 75 100 125 150 -50 175 -25 0 25 50 75 100 125 150 175 Tc (°C) Tc (°C) Figure 21. Turn-on voltage slope Figure 22. Turn-off voltage slope dVout/dt/(on) (V/ms) dVout/dt(off) (V/ms) 1000 1000 900 900 Vcc=13V Rl=6.5Ohm 800 Vcc=13V Rl=4.3Ohm 800 700 700 600 600 500 500 400 400 300 300 200 200 100 100 0 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175 Tc (ºC) Tc (ºC) Figure 23. Ilim vs Tcase Ilim (A) 20 18 Vcc=13V 16 14 12 10 8 6 4 2 0 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) Doc ID 10890 Rev 8 17/44 Application information 3 VN820-E Application information Figure 24. Application schematic  9  9 9 && 5 SURW 67$786 ' OG P& 5 SURW ,1387 287387 *1' 9 *1' 5 *1' ' *1' ("1(.4 3.1 GND protection network against reverse battery 3.1.1 Solution 1: resistor in the ground line (RGND only) This can be used with any type of load. The following is an indication on how to set a dimension the RGND resistor. 1. RGND ≤ 600 mV / (IS(on)max). 2. RGND ≥ (- VCC) / (- IGND) where - IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. Power Dissipation in RGND (when VCC < 0: during reverse battery situations) is: PD= (- VCC)2/ RGND This resistor can be shared amongst several different HSDs. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that if the microprocessor ground is not shared by the device ground then the RGND produces a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift does not vary depending on how many devices are ON in case of several high-side drivers sharing the same RGND. If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then ST suggests to utilize Solution 2 (see below). 18/44 Doc ID 10890 Rev 8 VN820-E 3.1.2 Application information Solution 2: diode (DGND) in the ground line A resistor (RGND = 1kΩ) should be inserted in parallel to DGND if the device drives an inductive load. This small signal diode can be safely shared amongst several different HSDs. Also in this case, the presence of the ground network produces a shift (≈600 mV) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. This shift not varies if more than one HSD shares the same diode/resistor network. Series resistor in INPUT and STATUS lines are also required to prevent that, during battery voltage transient, the current exceeds the absolute maximum rating. The safest configuration for unused INPUT and STATUS pin is to leave them unconnected. 3.2 Load dump protection Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the VCC max DC rating. The same applies if the device is subject to transients on the VCC line that are greater than the ones shown in the ISO 7637-2: 2004(E) table. 3.3 MCU I/Os protection If a ground protection network is used and negative transients are present on the VCC line, the control pins are pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the microcontroller I/Os pins from latching-up. The value of these resistors is a compromise between the leakage current of microcontroller and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of μC I/Os. -VCCpeak/Ilatchup ≤ Rprot ≤ (VOHµC-VIH-VGND) / IIHmax Calculation example: For VCCpeak= - 100 V and Ilatchup ≥ 20 mA; VOHµC ≥ 4.5 V 5 kΩ ≤ Rprot ≤ 65 kΩ. Recommended values: Rprot =10 kΩ . 3.4 Open-load detection in off-state Off-state open-load detection requires an external pull-up resistor (RPU) connected between OUTPUT pin and a positive supply voltage (VPU) like the +5 V line used to supply the microprocessor. The external resistor has to be selected according to the following requirements: 1. no false open-load indication when load is connected: in this case we have to avoid VOUT to be higher than VOlmin; this results in the following condition VOUT = (VPU / (RL+RPU)) RL < VOlmin. 2. no misdetection when load is disconnected: in this case the VOUT has to be higher than VOLmax; this results in the following condition RPU < (VPU – VOLmax) / IL(off2). Doc ID 10890 Rev 8 19/44 Application information VN820-E Because Is(OFF) may significantly increase if Vout is pulled high (up to several mA), the pullup resistor RPU should be connected to a supply that is switched off when the module is in standby. The values of VOLmin, VOLmax and IL(off2) are available in the electrical characteristics section. Figure 25. Open-load detection in off-state 9 E D WW 9 38  9 &&  5 38 ,1387 '5,9(5  /2*,& , / RII  287   5 67$786  9 2/ 5/ *5281'  ("1(.4 20/44 Doc ID 10890 Rev 8 VN820-E 3.5 Application information PowerSO-10, P2PAK, PPAK, PENTAWATT maximum demagnetization energy (VCC = 13.5V) Figure 26. PowerSO-10, P2PAK, PPAK, PENTAWATT maximum turn-off current versus inductance ,PD[ $  $  % &    / P+   !4JSTART   #SINGLEPULSE "4JSTART   #REPETITIVEPULSE #4JSTART   #REPETITIVEPULSE 6). ), $EMAGNETIZATION $EMAGNETIZATION $EMAGNETIZATION T ("1(.4 Note: Values are generated with RL = 0 Ω. In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves A and B. Doc ID 10890 Rev 8 21/44 Package and PCB thermal data VN820-E 4 Package and PCB thermal data 4.1 P2PAK thermal data Figure 27. P2PAK PC board Note: ("1(.4 Layout condition of Rth and Zth measurements (PCB FR4 area = 60 mm x 60 mm, PCB thickness = 2 mm, Cu thickness = 35 μm , Copper areas: 0.97 cm2, 8 cm2). Figure 28. P2PAK Rthj-amb vs PCB copper area in open box free air conditions 57+MBDPE ƒ&:  7M7DP E ƒ&            3&%&XKHDWVLQNDUHD FPA  ("1(.4 22/44 Doc ID 10890 Rev 8 VN820-E Package and PCB thermal data Figure 29. P2PAK thermal impedance junction ambient single pulse =7+ ƒ&:    FP  FP           7LPH V    ("1(.4 Equation 1: pulse calculation formula Z THδ = R TH ⋅δ+Z THtp (1 – δ) where δ = tP/T Figure 30. Thermal fitting model of a single channel HSD in P2PAK ("1(.4 Doc ID 10890 Rev 8 23/44 Package and PCB thermal data Table 14. 24/44 VN820-E P2PAK thermal parameters Area/island (cm2) 0.97 R1 (°C/W) 0.04 R2 (°C/W) 0.25 R3 (°C/W) 0.3 R4 (°C/W) 4 R5 (°C/W) 9 R6 (°C/W) 37 C1 (W·s/°C) 0.0008 C2 (W·s/°C) 0.007 C3 (W·s/°C) 0.015 C4 (W·s/°C) 0.4 C5 (W·s/°C) 2 C6 (W·s/°C) 3 Doc ID 10890 Rev 8 6 22 5 VN820-E 4.2 Package and PCB thermal data PPAK thermal data Figure 31. PPAK PC board GAPGRI00172 Note: Layout condition of Rth and Zth measurements (PCB FR4 area = 60 mm x 60 mm, PCB thickness = 2 mm, Cu thickness=35 μm , Copper areas: 0.44 cm2, 8 cm2). Figure 32. PPAK Rthj-amb vs PCB copper area in open box free air conditions 57+MBDPE ž&:                 3&%&XKHDWVLQNDUHD FPA '!0'2) Doc ID 10890 Rev 8 25/44 Package and PCB thermal data VN820-E Figure 33. PPAK thermal impedance junction ambient single pulse =7+ ƒ&:   FP FP         7LPH V    '!0'2) Equation 2: pulse calculation formula Z THδ = R TH ⋅δ+Z THtp (1 – δ) where δ = tP/T Figure 34. Thermal fitting model of a single channel HSD in PPAK ("1(.4 26/44 Doc ID 10890 Rev 8 VN820-E Package and PCB thermal data Table 15. PPAK thermal parameters Area/island (cm2) 0.44 R1 (°C/W) 0.04 R2 (°C/W) 0.25 R3 (°C/W) 0.3 R4 (°C/W) 2 R5 (°C/W) 15 R6 (°C/W) 61 C1 (W·s/°C) 0.0008 C2 (W·s/°C) 0.007 C3 (W·s/°C) 0.02 C4 (W·s/°C) 0.3 C5 (W·s/°C) 0.45 C6 (W·s/°C) 0.8 Doc ID 10890 Rev 8 6 24 5 27/44 Package and PCB thermal data 4.3 VN820-E PowerSO-10 thermal data Figure 35. PowerSO-10 PC board GAPGRI00280 Note: Layout condition of Rth and Zth measurements (PCB FR4 area = 58 mm x 58 mm, PCB thickness = 2 mm, Cu thickness = 35 µm, Copper areas: from minimum pad lay-out to 8 cm2). Figure 36. PowerSO-10 Rthj-amb vs PCB copper area in open box free air conditions 24(J?AMB #7  4J 4AMB #            0#"#UHEATSINKAREACM> '!0'2) 28/44 Doc ID 10890 Rev 8 VN820-E Package and PCB thermal data Figure 37. PowerSO-10 thermal impedance junction ambient single pulse :4( #7  CM CM            4IMES  ("1($'5 Equation 3: pulse calculation formula Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ ) where δ = tp ⁄ T Figure 38. Thermal fitting model of a single channel HSD in PowerSO-10 7M & & & & & & 5 5 5 5 5 5 3G 7BDPE '!0'2) Doc ID 10890 Rev 8 29/44 Package and PCB thermal data Table 16. 30/44 VN820-E PowerSO-10 thermal parameters Area / island (cm2) Footprint R1 (°C/W) 0.04 R2 (°C/W) 0.25 R3 (°C/W) 0.25 R4 (°C/W) 0.8 R5 (°C/W) 12 R6 (°C/W) 37 C1 (W.s/°C) 0.0008 C2 (W.s/°C) 7E-03 C3 (W.s/°C) 0.015 C4 (W.s/°C) 0.3 C5 (W.s/°C) 0.75 C6 (W.s/°C) 3 Doc ID 10890 Rev 8 6 22 5 VN820-E Package and packing information 5 Package and packing information 5.1 ECOPACK® packages In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 5.2 PENTAWATT mechanical data Figure 39. PENTAWATT package dimensions GAPGRI00283 Doc ID 10890 Rev 8 31/44 Package and packing information Table 17. VN820-E PENTAWATT mechanical data mm Dim. Min. Typ. A 4.8 C 1.37 D 2.4 2.8 D1 1.2 1.35 E 0.35 0.55 F 0.8 1.05 F1 1 1.4 G 3.2 3.4 3.6 G1 6.6 6.8 7 H2 H3 10.4 10.05 10.4 L 17.85 L1 15.75 L2 21.4 L3 22.5 L5 2.6 3 L6 15.1 15.8 L7 6 6.6 M 4.5 M1 4 Diam. 32/44 Max. 3.65 Doc ID 10890 Rev 8 3.85 VN820-E 5.3 Package and packing information P2PAK mechanical data Figure 40. P2PAK package dimensions ("1($'5 Doc ID 10890 Rev 8 33/44 Package and packing information VN820-E P2PAK mechanical data Table 18. mm Dim. Min. Max. A 4.30 4.80 A1 2.40 2.80 A2 0.03 0.23 b 0.80 1.05 c 0.45 0.60 c2 1.17 1.37 D 8.95 9.35 D2 E 8.00 10.00 E1 10.40 8.50 e 3.20 3.60 e1 6.60 7.00 L 13.70 14.50 L2 1.25 1.40 L3 0.90 1.70 L5 1.55 2.40 0.40 R V2 0º Package weight 34/44 Typ. 8º 1.40 Gr (typ) Doc ID 10890 Rev 8 VN820-E 5.4 Package and packing information PPAK mechanical data Figure 41. PPAK package dimensions '!0'2) Doc ID 10890 Rev 8 35/44 Package and packing information Table 19. VN820-E PPAK mechanical data mm Dim. Min. Max. A 2.20 2.40 A1 0.90 1.10 A2 0.03 0.23 B 0.40 0.60 B2 5.20 5.40 C 0.45 0.60 C2 0.48 0.60 D1 5.1 D 6.00 6.20 E 6.40 6.60 E1 4.7 e 1.27 G 4.90 5.25 G1 2.38 2.70 H 9.35 10.10 L2 0.8 L4 0.60 L5 1 2.80 R 0.2 0º Package weight 8º Gr. 0.3 Doc ID 10890 Rev 8 1.00 1.00 L6 V2 36/44 Typ. VN820-E 5.5 Package and packing information PowerSO-10 mechanical data Figure 42. PowerSO-10 package dimensions %  $ %  + ( ( (  6($7,1* 3/$1( H % '(7$,/$ $ &  K ( '  '  6($7,1* 3/$1( $ ) $ $ / '(7$,/$ D '!0'2) Doc ID 10890 Rev 8 37/44 Package and packing information Table 20. VN820-E PowerSO-10 mechanical data mm Dim. Min. Max. A 3.35 3.65 A(1) 3.4 3.6 A1 0 0.10 B 0.40 0.60 B(1) 0.37 0.53 C 0.35 0.55 C(1) 0.23 0.32 D 9.40 9.60 D1 7.40 7.60 E 9.30 9.50 E2 7.20 7.60 E2(1) 7.30 7.50 E4 5.90 6.10 E4(1) 5.90 6.30 e 1.27 F 1.25 1.35 F(1) 1.20 1.40 H 13.80 14.40 H(1) 13.85 14.35 h 0.50 L 1.20 1.80 L(1) 0.80 1.10 α 0° 8° α(1) 2° 8° 1. Muar only POA P013P. 38/44 Typ. Doc ID 10890 Rev 8 VN820-E 5.6 Package and packing information PENTAWATT packing information Figure 43. PENTAWATT tube shipment (no suffix) Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1) " # 50 1000 532 18 33.1 1 All dimensions are in mm. ! ("1($'5 5.7 P2PAK packing information Figure 44. P2PAK tube shipment (no suffix) " # Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1) 50 1000 532 18 33.1 1 All dimensions are in mm. ! ("1($'5 Doc ID 10890 Rev 8 39/44 Package and packing information VN820-E Figure 45. P2PAK tape and reel (suffix “TR”) REEL DIMENSIONS All dimensions are in mm . Base Q.ty Bulk Q.ty A (max) B (min) C (± 0.2) F G (+ 2 / -0) N (min) T (max) 1000 1000 330 1.5 13 20.2 24.4 60 30.4 TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 (± 0.1) P D (± 0.1/-0) D1 (min) F (± 0.05) K (max) P1 (± 0.1) 24 4 12 1.5 1.5 11.5 6.5 2 All dimensions are in mm. End Start Top cover tape No components Components 500mm min Empty components pockets saled with cover tape. User direction of feed 5.8 PPAK packing information Figure 46. PPAK suggested pad layout 3 40/44 No components 1.8 Doc ID 10890 Rev 8 6.7 500mm min VN820-E Package and packing information Figure 47. PPAK tube shipment (no suffix) A Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1) C 75 3000 532 6 21.3 0.6 All dimensions are in mm. B Figure 48. PPAK tape and reel (suffix “TR”) REEL DIMENSIONS All dimensions are in mm Base Q.ty Bulk Q.ty A (max) B (min) C (± 0.2) F G (+ 2 / -0) N (min) T (max) 2500 2500 330 1.5 13 20.2 16.4 60 22.4 TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 (± 0.1) P D (± 0.1/-0) D1 (min) F (± 0.05) K (max) P1 (± 0.1) All dimensions are in mm. 16 4 8 1.5 1.5 7.5 2.75 2 End Start Top cover tape No components Components No components 500mm min Empty components pockets saled with cover tape. 500mm min User direction of feed Doc ID 10890 Rev 8 41/44 Package and packing information 5.9 VN820-E PowerSO-10 packing information Figure 49. PowerSO-10 suggested Figure 50. PowerSO-10 tube shipment (no pad layout suffix)   CASABLANCA B  MUAR C C A A            B   All dimensions are in mm.  Casablanca Muar Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1) 50 1000 532 10.4 16.4 0.8 50 1000 532 4.9 17.2 0.8 ("1($'5 Figure 51. PowerSO-10 tape and reel shipment (suffix “TR”) Reel dimensions Base Q.ty Bulk Q.ty A (max) B (min) C (± 0.2) F G (+ 2 / -0) N (min) T (max) 600 600 330 1.5 13 20.2 24.4 60 30.4 Tape dimensions According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 (± 0.1) P D (± 0.1/-0) D1 (min) F (± 0.05) K (max) P1 (± 0.1) 24 4 24 1.5 1.5 11.5 6.5 2 End All dimensions are in mm. Start Top No components Components No components cover tape 500mm min Empty components pockets saled with cover tape. User direction of feed 42/44 Doc ID 10890 Rev 8 500mm min VN820-E 6 Revision history Revision history Table 21. Document revision history Date Revision 07-Dec-2004 1 Initial release. 09-Feb-2005 2 Text changed. 23-Mar-2005 3 Configuration diagram (PowerSO-10) modification. 03-May-2006 4 SO-16L mechanical and shipment data insertion. 5 Document reformatted and restructured. Added content, list of figures and tables. Added ECOPACK® packages information. Updated Figure 45: P2PAK tape and reel (suffix “TR”): – changed component spacing (P) in tape dimensions table from 16 mm to 12 mm. 29-Mar-2010 6 Updated features list. Updated Table 1: Device summary. Updated Table 3: Absolute maximum ratings. Updated Section 3.5: PowerSO-10, P2PAK, PPAK, PENTAWATT maximum demagnetization energy (VCC = 13.5V). Removed SO-16L package into the document. 07-June-2012 7 Updated Section 5.8: PPAK packing information. 24-Sep-2013 8 Updated Disclaimer. 17-Dec-2008 Changes Doc ID 10890 Rev 8 43/44 VN820-E Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. © 2013 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 44/44 Doc ID 10890 Rev 8
VN820-12-E 价格&库存

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