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VNB14N04-E

VNB14N04-E

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    TO263

  • 描述:

    IC PWR DRIVER N-CHAN 1:1 D2PAK

  • 数据手册
  • 价格&库存
VNB14N04-E 数据手册
VNB14N04 - VNK14N04FM VNV14N04 "OMNIFET" fully autoprotected Power MOSFET Features Type Vclamp RDS(on) Ilim VNB14N04 VNK14N04FM VNV14N04 42 V 42 V 42 V 0.07 Ω 0.07 Ω 0.07 Ω 14 A 14 A 14 A Linear current limitation ■ Thermal shutdown ■ Short circuit protection ■ Integrated clamp ■ Low current drawn from input pin ■ Diagnostic feedback through input pin ■ ESD protection ■ Direct access to the gate of the power MOSFET (analog driving) t e l o ) (s t c u Compatible with standard power MOSFET d o r P e t e l o s b O u d o r P e ■ ■ ) s ( ct s b O Description The VNB14N04, VNK14N04FM and VNV14N04 are monolithic devices made using STMicroeletronics VIPower M0 Technology, intended for replacement of standard power MOSFETS in DC to 50 kHz applications. Built-in thermal shutdown, linear current limitation and overvoltage clamp protect the chip in harsh environment. Fault feedback can be detected by monitoring the voltage at the input pin. Table 1. Device summary Part number VNB14N04 Order code VNB14N04, VNB14N04-E, VNB14N0413TR, VNB14N04TR-E VNK14N04FM VNK14N04FM VNV14N04 September 2013 Rev 7 VNV14N04, VNV14N04-E 1/17 www.st.com 17 Contents VNB14N04 - VNK14N04FM - VNV14N04 Contents 1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Absolute maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 ) s ( ct 3 Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 u d o r P e t e l o ) (s t c u d o r P e t e l o s b O 2/17 s b O VNB14N04 - VNK14N04FM - VNV14N04 1 Block diagram Block diagram Figure 1. Block diagram ) s ( ct u d o r P e t e l o ) (s s b O 1. PowerSO-10 pin configuration : INPUT = 6,7,8,9,10; SOURCE = 1,2,4,5; DRAIN = TAB t c u d o r P e t e l o s b O 3/17 Electrical specification VNB14N04 - VNK14N04FM - VNV14N04 2 Electrical specification 2.1 Absolute maximum rating Table 2. Absolute maximum rating Value Symbol Parameter Unit PowerSO-10 SOT-82FM D2PAK VDS Drain-source voltage (Vin = 0) Vin Input voltage 18 ID Drain current Internally limited IR Reverse DC output current Electrostatic discharge (C = 100 pF, R=1.5 KΩ) Ptot Total dissipation at Tc = 25 °C Tj Operating junction temperature Tc Case operating temperature Thermal data Table 3. Symbol let Rthj-amb o s b O ) (s s b O t c u Thermal data od Parameter A o r P A V 9.5 W Internally limited °C Internally limited °C -55 to 150 °C PowerSO-10 SOT82-FM D2PAK Unit Thermal resistance junction-case max 2.5 13 2.5 °C/W Thermal resistance junction-ambient max 50 100 62.5 °C/W r P e Rthj-case 2.3 Storage temperature e t e ol ) s ( ct du 2000 50 V V -14 Vesd Tstg 2.2 Internally clamped Electrical characteristics Tcase =25 °C unless otherwise specified. Table 4. Symbol Electrical characteristics Parameter Test conditions Min. Typ. Max. Unit Off VCLAMP Drain-source clamp voltage ID = 200 mA Vin = 0 36 VCLTH Drain-source clamp threshold voltage ID = 2 mA Vin = 0 35 VINCL Input-source reverse clamp voltage Iin = -1 mA -1 4/17 42 48 V V -0.3 V VNB14N04 - VNK14N04FM - VNV14N04 Table 4. Electrical specification Electrical characteristics (continued) Symbol Parameter Test conditions IDSS Zero input voltage drain current (Vin = 0) VDS = 13 V Vin = 0 VDS = 25 V Vin = 0 IISS Supply current from input pin VDS = 0 V Vin = 10 V VIN(th) Input threshold voltage VDS = Vin ID + Iin = 1 mA RDS(on) Static drain-source on resistance Vin = 10 V ID = 7 A Vin = 5 V ID = 7 A gfs (1) Forward transconductance VDS = 13 V ID = 7 A Coss Output capacitance VDS = 13 V f = 1 MHz Vin = 0 Min. Typ. Max. Unit 250 50 200 µA µA 500 µA 3 V 0.7 0.1 Ω Ω On(1) 0.8 ) s ( ct Dynamic Switching(2) td(on) tr td(off) tf Turn-on delay time Rise time Turn-off delay time Fall time VDD = 15 V Id = 7 A Vgen = 10 V Rgen = 10 Ω (see Figure 26) td(on) tr td(off) tf Turn-on delay time Rise time Turn-off delay time Fall time VDD = 15 V Id = 7 A Vgen = 10 V Rgen = 1000 Ω (see Figure 26) (di/dt)on Turn-on current slope Qi Total input charge VSD (1) trr Qrr (2) s b O IRRM (2) 10 du o r P s b O S 400 500 pF 60 160 250 100 120 300 400 200 ns ns ns ns 300 1.5 5.5 1.8 500 2.2 7.5 2.5 ns µs µs µs VDD = 15 V ID = 7 A Vin = 10 V Rgen = 10 Ω 120 A/µs VDD = 12 V ID = 7 A Vin = 10 V 30 nC Forward on voltage ISD = 7 A Vin = 0 Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 7 A di/dt = 100 A/µs VDD = 30 V Tj = 25 °C (see test circuit, Figure 28) t e l o (2) ) (s ct u d o r P e Source drain diode e t e ol 8 1.6 110 0.34 6.1 V ns µC A Protection Drain current limit Vin = 10 V VDS = 13 V Vin = 5 V VDS = 13 V tdlim (2) Step response Current limit Vin = 10 V Vin = 5 V Tjsh (2) Overtemperature shutdown 150 °C Tjrs (2) Overtemperature reset 135 °C Ilim 10 10 14 14 20 20 A A 30 80 60 150 µs µs 5/17 Electrical specification Table 4. Electrical characteristics (continued) Symbol Igf (2) Eas (2) VNB14N04 - VNK14N04FM - VNV14N04 Parameter Test conditions Min. Typ. Max. Unit Fault sink current Vin = 10 V VDS = 13 V Vin = 5 V VDS = 13 V 50 20 Single pulse avalanche energy starting Tj = 25°C V DD = 20 V 0.65 Vin = 10 V Rgen = 1 KΩ L = 10 mH mA mA J 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % 2. Parameters guaranteed by design/characterization ) s ( ct u d o r P e t e l o ) (s t c u d o r P e t e l o s b O 6/17 s b O VNB14N04 - VNK14N04FM - VNV14N04 3 Protection features Protection features During normal operation, the Input pin is electrically connected to the gate of the internal power MOSFET. The device then behaves like a standard power MOSFET and can be used as a switch from DC to 50 kHz. The only difference from the user’s standpoint is that a small DC current (Iiss) flows into the Input pin in order to supply the internal circuitry. The device integrates: ● Overvoltage clamp protection: internally set at 42 V, along with the rugged avalanche characteristics of the Power MOSFET stage give this device unrivalled ruggedness and energy handling capability. This feature is mainly important when driving inductive loads. ● Linear current limiter circuit: limits the drain current Id to Ilim whatever the Input pin voltage. When the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. Both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the overtemperature threshold Tjsh. ) s ( ct u d o r P e Overtemperature and short circuit protection: these are based on sensing the chip temperature and are not dependent on the input voltage. The location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. Overtemperature cutout occurs at minimum 150 °C. The device is automatically restarted when the chip temperature falls below 135 °C. ● t e l o s b O Status feedback: in the case of an overtemperature fault condition, a Status Feedback is provided through the Input pin. The internal protection circuit disconnects the input from the gate and connects it instead to ground via an equivalent resistance of 100 Ω. The failure can be detected by monitoring the voltage at the Input pin, which will be close to ground potential. ● ) (s t c u Additional features of this device are ESD protection according to the Human Body model and the ability to be driven from a TTL Logic circuit (with a small increase in RDS(on)). d o r P e t e l o s b O 7/17 Protection features Figure 2. VNB14N04 - VNK14N04FM - VNV14N04 Thermal impedance for D2PAK/PowerSO-10 Figure 3. Derating curve ) s ( ct Figure 4. Output characteristics Figure 5. u d o Transconductance r P e t e l o ) (s s b O t c u Figure 6. P e t e l o s b O 8/17 d o r Static drain-source on resistance vs input voltage Figure 7. Static drain-source on resistance (part 1/2) VNB14N04 - VNK14N04FM - VNV14N04 Figure 8. Static drain-source on resistance (part 2/2) Protection features Figure 9. Input charge vs input voltage ) s ( ct u d o Figure 10. Capacitance variations Figure 11. Normalized input threshold voltage vs temperature r P e t e l o ) (s s b O t c u d o r P e Figure 12. Normalized on resistance vs temperature (part 1/2) t e l o Figure 13. Normalized on resistance vs temperature (part 2/2) s b O 9/17 Protection features VNB14N04 - VNK14N04FM - VNV14N04 Figure 14. Turn-on current slope(part 1/2) Figure 15. Turn-on current slope (part 2/2) ) s ( ct u d o Figure 16. Turn-off drain-source voltage slope Figure 17. Turn-off drain-source voltage slope (part 2/2) (part 1/2) r P e t e l o ) (s s b O t c u d o r Figure 18. Switching time resistive load (part 1/3) P e t e l o s b O 10/17 Figure 19. Switching time resistive load (part 2/3) VNB14N04 - VNK14N04FM - VNV14N04 Figure 20. Switching time resistive load (part 3/3) Protection features Figure 21. Current limit vs junction temperature ) s ( ct Figure 22. Step response current limit u d o Figure 23. Source drain diode forward characteristics r P e t e l o ) (s s b O t c u d o r P e t e l o s b O 11/17 Protection features VNB14N04 - VNK14N04FM - VNV14N04 Figure 24. Unclamped inductive load test circuits Figure 25. Unclamped inductive waveforms ) s ( ct Figure 26. Switching times test circuits for resistive load u d o Figure 27. Input charge test circuit r P e t e l o ) (s s b O t c u d o r P e Figure 28. Test circuit for inductive load Figure 29. Waveforms switching and diode recovery times t e l o s b O 12/17 VNB14N04 - VNK14N04FM - VNV14N04 4 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. TO-263 (D2PAK) mechanical data Figure 30. ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O 13/17 Package information VNB14N04 - VNK14N04FM - VNV14N04 Figure 31. SOT82-FM mechanical data ) s ( ct u d o r P e t e l o ) (s t c u d o r P e t e l o s b O 14/17 s b O VNB14N04 - VNK14N04FM - VNV14N04 Package information Figure 32. PowerSO-10 mechanical data ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O 15/17 Revision history 5 VNB14N04 - VNK14N04FM - VNV14N04 Revision history Table 5. Document revision history Date Revision Changes 20-Jan-1998 1 Initial release. 21-Jun-2004 5 Update. 08-Apr-2009 6 Document reformatted. Added Table 1: Device summary on page 1. Updated Section 4: Package information on page 13 25-Sep-2013 7 Updated Disclaimer. u d o ) s ( ct r P e t e l o ) (s t c u d o r P e t e l o s b O 16/17 s b O VNB14N04 - VNK14N04FM - VNV14N04 ) s ( ct Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. u d o r P e All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. t e l o No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. ) (s s b O UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. t c u ST PRODUCTS ARE NOT DESIGNED OR AUTHORIZED FOR USE IN: (A) SAFETY CRITICAL APPLICATIONS SUCH AS LIFE SUPPORTING, ACTIVE IMPLANTED DEVICES OR SYSTEMS WITH PRODUCT FUNCTIONAL SAFETY REQUIREMENTS; (B) AERONAUTIC APPLICATIONS; (C) AUTOMOTIVE APPLICATIONS OR ENVIRONMENTS, AND/OR (D) AEROSPACE APPLICATIONS OR ENVIRONMENTS. WHERE ST PRODUCTS ARE NOT DESIGNED FOR SUCH USE, THE PURCHASER SHALL USE PRODUCTS AT PURCHASER’S SOLE RISK, EVEN IF ST HAS BEEN INFORMED IN WRITING OF SUCH USAGE, UNLESS A PRODUCT IS EXPRESSLY DESIGNATED BY ST AS BEING INTENDED FOR “AUTOMOTIVE, AUTOMOTIVE SAFETY OR MEDICAL” INDUSTRY DOMAINS ACCORDING TO ST PRODUCT DESIGN SPECIFICATIONS. PRODUCTS FORMALLY ESCC, QML OR JAN QUALIFIED ARE DEEMED SUITABLE FOR USE IN AEROSPACE BY THE CORRESPONDING GOVERNMENTAL AGENCY. d o r P e t e l o s b O Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. © 2013 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com DocID1643 Rev 7 17/17 17
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