VND10N0613TR

VND10N06 VND10N06-1 "OMNIFET" fully autoprotected Power MOSFET Features Max on-state resistance (per ch.) Current limitation (typ) Drain-Source clamp voltage RDS(on) 0.3Ω Ilim 10A VCLAMP 60V ■ Linear current limitation ■ Thermal shutdown ■ Short circuit protection ■ Integrated clamp ■ Low current drawn from input pin ■ Logic level input threshold ■ ESD protection ■ Schmitt trigger on input ■ High noise immunity Table 1. 3 3 2 1 DPAK TO-252 1 IPAK TO-251 Description The VND10N06 and VND10N06-1 are monolithic devices designed in STMicroelectronics VIPower M0-2 technology, intended for replacement of standard Power MOSFETs in DC to 50KHz applications. Built in thermal shutdown, linear current limitation and overvoltage clamp protect the chip in harsh environments. Device summary Order codes Package Tube Tape and reel DPAK VND10N06 VND10N06TR IPAK VND10N06-1 September 2013 Rev 4 1/25 www.st.com 25 Contents VND10N06 / VND10N06-1 Contents 1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3 Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 6 2/25 5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.2 DPAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.3 IPAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 5.4 DPAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 5.5 IPAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 VND10N06 / VND10N06-1 List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 On . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Dynamic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Source Drain diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Protections (-40°C < Tj < 150°C, unless otherwise specified) . . . . . . . . . . . . . . . . . . . . . . . 8 DPAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 IPAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3/25 List of figures VND10N06 / VND10N06-1 List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. 4/25 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Switching waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Switching time test circuit for resistive load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Test circuit for inductive load switching and diode recovery time . . . . . . . . . . . . . . . . . . . . . 9 Unclamped inductive load test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Input charge test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Unclamped inductive waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Static Drain-Source on resistance (VIN = 3.5V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Static Drain-Source on resistance (VIN = 5V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Derating curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Static Drain-Source on resistance vs. input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Current limit Vs. junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Source-Drain diode voltage Vs. junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Step response current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Switching time resistive load. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Turn-on current slope (VIN = 3.5V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Turn-on current slope (VIN = 7V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Input voltage Vs. input charge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Turn-off Drain-Source voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Turn-off Drain-Source voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Switching time resistive load. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Normalized on resistance Vs. temperature (VIN = 7V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Normalized on resistance Vs. temperature (VIN = 3.5V). . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Normalized input threshold voltage Vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Thermal impedance for DPAK / IPAK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 DPAK package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 IPAK mechanical data and package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 DPAK footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 DPAK tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 DPAK tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 IPAK tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 VND10N06 / VND10N06-1 1 Block diagram and pin description Block diagram and pin description Figure 1. Block diagram 5/25 Electrical specifications VND10N06 / VND10N06-1 2 Electrical specifications 2.1 Absolute maximum ratings Stressing the device above the rating listed in the “Absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to Absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE program and other relevant quality document. Table 2. Absolute maximum ratings Symbol Unit Drain-Source voltage (Vin = 0V) Internally clamped V VINn Input voltage Internally clamped V Iin Input current ± 20 mA IDn Drain current Internally limited A IRn Reverse DC output current - 15 A Electrostatic discharge (R = 1.5KΩ, C = 100pF) 4000 V 35 W Ptot Total dissipation at Tc = 25°C Tj Operating junction temperature Internally limited °C Tc Case operating temperature Internally limited °C - 55 to 150 °C Tstg Storage temperature Thermal data Table 3. 6/25 Value VDSn VESD 2.2 Parameter Thermal data Symbol Parameter Max. value Unit Rthj-case Thermal resistance junction-case 3.5 °C/W Rthj-amb Thermal resistance junction-ambient 100 °C/W VND10N06 / VND10N06-1 2.3 Electrical specifications Electrical characteristics Tcase = 25 °C unless otherwise stated. Table 4. Symbol VCLAMP Off Parameter Drain-Source clamp voltage Test conditions VIN = 0V; ID = 200mA VIL Input low level voltage ID = 100 µA; VDS = 16 V VIH Input high Level voltage RL = 27Ω; VDD = 16 V VDS = 0.5 V IISS Supply current from input pin VDS = 0V; VIN = 5V VINCL Input-Source reverse clamp voltage IIN = -1mA IIN = 1mA IDSS Zero input voltage drain current (VIN = 0V) VDS = 50V; VIN = VIL; VDS < 35V; VIN = VIL Table 5. Switching(1) Symbol Parameter td(on) tr td(off) tf td(on) tr td(off) tf (di/dt)on Qi Test conditions Min. Typ. Max. Unit 50 60 70 V 1.5 V 3.2 150 Turn-off delay time Min. VDD = 16V; ID = 1A Vgen = 7V; Rgen = 10Ω (see Figure 2) Fall time Turn-on delay time Rise time Turn-off delay time 300 µA -0.3 11 V V 250 100 µA µA Typ. Max. Unit 1100 1600 ns 550 900 ns 200 400 ns 100 200 ns 1.2 1.8 µs 1 1.5 µs 1.6 2.3 µs 1.2 1.8 µs -1 8 Turn-on delay time Rise time V VDD = 16V; ID = 1A Vgen = 7V; Rgen = 1000Ω (see Figure 2) Fall time Turn-on current slope VDD = 16V; ID = 1A Vin = 7V; Rgen = 10Ω 1.5 A/µs Total input charge VDD = 12V; ID = 1A; VIN = 7V 13 nC 1. Parameters guaranteed by design / characterization. Table 6. Symbol RDS(on) On(1) Parameter Static Drain-Source on resistance Test conditions VIN = 7V; ID = 1 A; Tj < 125 °C Min. Typ. Max. Unit 0.15 0.3 Ω 1. Pulsed: pulse duration = 300µs, duty cycle 1.5%. 7/25 Electrical specifications Table 7. Symbol COSS Table 8. Symbol VSD(1) trr (2) VND10N06 / VND10N06-1 Dynamic Parameter Output capacitance Test conditions Min. VDS = 13V; f = 1MHz; VIN = 0V Typ. Max. Unit 350 500 pF Typ. Max. Unit 0.8 1.6 V Source Drain diode Parameter Forward on voltage Test conditions Min. ISD = 1 A; VIN = VIL Reverse recovery time Qrr(2) Reverse recovery charge IRRM(2) Reverse recovery current ISD = 1A; di/dt = 100 A/µs VDD = 30V; Tj = 25°C (see Figure 4) 125 ns 0.22 µC 3.5 A 1. Pulsed: pulse duration = 300µs, duty cycle 1.5%. 2. Parameters guaranteed by design / characterization. Table 9. Symbol Protections (-40°C < Tj < 150°C, unless otherwise specified) Parameter Test conditions Typ. Max. Unit 6 10 15 A 12 20 µs Drain current limit VIN = 7V; VDS=13V tdlim(1) Step response current limit VIN = 7 V; VDS step from 0 to 13V Tjsh(1) Overtemperature shutdown 150 °C Tjrs(1) Overtemperature reset 135 °C Eas (1) Single pulse avalanche energy 250 mJ Ilim Starting Tj = 25°C; VDD = 24V VIN = 7V Rgen = 1kΩ; L = 10mH 1. Parameters guaranteed by design / characterization. Figure 2. 8/25 Min. Switching waveforms VND10N06 / VND10N06-1 Electrical specifications Figure 3. Switching time test circuit for resistive load Figure 4. Test circuit for inductive load switching and diode recovery time 9/25 Electrical specifications Figure 5. VND10N06 / VND10N06-1 Unclamped inductive load test circuits RGEN VIN PW Figure 6. Input charge test circuit V IN GEN ND8003 10/25 VND10N06 / VND10N06-1 Figure 7. Electrical specifications Unclamped inductive waveforms 11/25 Electrical specifications 2.4 Electrical characteristics curves Figure 8. 12/25 VND10N06 / VND10N06-1 Static Drain-Source on resistance (VIN = 3.5V) Figure 9. Static Drain-Source on resistance (VIN = 5V) Figure 10. Derating curve Figure 11. Static Drain-Source on resistance vs. input voltage Figure 12. Current limit Vs. junction temperature Figure 13. Source-Drain diode voltage Vs. junction temperature VND10N06 / VND10N06-1 Electrical specifications Figure 14. Step response current limit Figure 15. Switching time resistive load Figure 16. Turn-on current slope (VIN = 3.5V) Figure 17. Turn-on current slope (VIN = 7V) Figure 18. Input voltage Vs. input charge Figure 19. Turn-off Drain-Source voltage slope 13/25 Electrical specifications VND10N06 / VND10N06-1 Figure 20. Turn-off Drain-Source voltage Figure 21. Capacitance variations slope Figure 22. Switching time resistive load Figure 23. Normalized on resistance Vs. temperature (VIN = 7V) Figure 24. Output characteristics 14/25 Figure 25. Normalized on resistance Vs. temperature (VIN = 3.5V) VND10N06 / VND10N06-1 Electrical specifications Figure 26. Normalized input threshold voltage Vs. temperature 15/25 Protection features 3 VND10N06 / VND10N06-1 Protection features During normal operation, the INPUT pin is electrically connected to the gate of the internal power MOSFET through a low impedance path as soon as VIN > VIH. The device then behaves like a standard power MOSFET and can be used as a switch from DC to 50KHz. The only difference from the user’s standpoint is that a small DC current IISS flows into the INPUT pin in order to supply the internal circuitry. During turn-off of an unclamped inductive load the output voltage is clamped to a safe level by an integrated Zener clamp between DRAIN pin and the gate of the internal Power MOSFET. In this condition, the Power MOSFET gate is set to a voltage high enough to sustain the inductive load current even if the INPUT pin is driven to 0V. The device integrates an active current limiter circuit which limits the drain current ID to Ilim whatever the INPUT pin Voltage. When the current limiter is active, the device operates in the linear region, so power dissipation may exceed the heatsinking capability. Both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the overtemperature threshold Tjsh. If Tj reaches Tjsh, the device shuts down whatever the INPUT pin voltage. The device will restart automatically when Tj has cooled down to Tjrs. 16/25 VND10N06 / VND10N06-1 4 Thermal data Thermal data Figure 27. Thermal impedance for DPAK / IPAK 17/25 Package and packing information 5 Package and packing information 5.1 ECOPACK® packages VND10N06 / VND10N06-1 In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 5.2 DPAK mechanical data Figure 28. DPAK package dimensions P 032P 18/25 VND10N06 / VND10N06-1 Table 10. Package and packing information DPAK mechanical data Millimeters Dim. Min. Typ. Max. A 2.20 2.40 A1 0.90 1.10 A2 0.03 0.23 B 0.64 0.90 B2 5.20 5.40 C 0.45 0.60 C2 0.48 0.60 D 6.00 6.20 D1 E 5.1 6.40 6.60 E1 4.7 e 2.28 G 4.40 4.60 H 9.35 10.10 L2 L4 0.8 0.60 R V2 Package weight 1.00 0.2 0° 8° Gr. 0.29 19/25 Package and packing information 5.3 VND10N06 / VND10N06-1 IPAK mechanical data Figure 29. IPAK mechanical data and package outline Table 11. IPAK mechanical data Millimeters Symbol Min. Typ. A 2.2 2.4 A1 0.9 1.1 A3 0.7 1.3 B 0.64 0.9 B2 5.2 5.4 B3 0.85 B5 0.3 B6 0.95 C 0.45 0.6 C2 0.48 0.6 D 6 6.2 E 6.4 6.6 G 4.4 4.6 H 15.9 16.3 L 9 9.4 L1 0.8 1.2 L2 20/25 Max. 0.8 1 VND10N06 / VND10N06-1 5.4 Package and packing information DPAK packing information The devices can be packed in tube or tape and reel shipments (see the Device summary on page 1 ). Figure 30. DPAK footprint Figure 31. DPAK tube shipment (no suffix) A C Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1) 75 3000 532 6 21.3 0.6 B All dimensions are in mm. 21/25 Package and packing information VND10N06 / VND10N06-1 Figure 32. DPAK tape and reel shipment (suffix “TR”) Reel dimensions Base Q.ty Bulk Q.ty A (max) B (min) C (± 0.2) F G (+ 2 / -0) N (min) T (max) 2500 2500 330 1.5 13 20.2 16.4 60 22.4 Tape dimensions According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 (± 0.1) P D (± 0.1/-0) D1 (min) F (± 0.05) K (max) P1 (± 0.1) 16 4 8 1.5 1.5 7.5 6.5 2 All dimensions are in mm. End Start Top cover tape No components Components 500mm min Empty components pockets saled with cover tape. User direction of feed 22/25 No components 500mm min VND10N06 / VND10N06-1 5.5 Package and packing information IPAK packing information Figure 33. IPAK tube shipment (no suffix) Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1) 75 3000 532 6 21.3 0.6 All dimensions are in mm. 23/25 Revision history 6 VND10N06 / VND10N06-1 Revision history Table 12. 24/25 Document revision history Date Revision Changes Oct-1997 1 Initial release. 22-Aug-2006 2 Document restructured. 12-Dec-2008 3 Document restructured and reformatted. Added ECOPACK® packages information. 25-Sep-2013 4 Updated disclaimer. VND10N06 / VND10N06-1 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. 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The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. © 2013 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com DocID4831 Rev 4 25/25 25