VND5004DSP30-E

VND5004DSP30 Double 4 mȍ high-side driver with analog CurrentSense for automotive applications Datasheet - production data 0XOWL3RZHU6 *$3*&)7 – Reverse battery protection with self switchon of the Power MOSFET – Electrostatic discharge protection application x All types of resistive, inductive and capacitive loads Features x Suitable for power management applications Max transient supply voltage VCC 41 V Operating voltage range VCC 4.5 to 28 V Max on-state resistance RON 4 m: Current limitation (typ) ILIMH 100 A Off-state supply current IS 2 μA(1) 1. Typical value with all loads connected. x AEC-Q100 qualified x General – Inrush current active management by power limitation – Very low standby current – 3.0 V CMOS compatible input – Optimized electromagnetic emission – Very low electromagnetic susceptibility – In compliance with the 2002/95/EC European directive x Diagnostic functions – Proportional load current sense – Current sense disable – Thermal shutdown indication Description The device is a double channel high-side driver manufactured using STMicroelectronics proprietary VIPower® M0-5 technology. It is intended for driving resistive or inductive loads with one side connected to ground. Active VCC pin voltage clamp and load dump protection circuit protect the device against transients on the VCC pin. The device integrates an analog current sense which delivers a current proportional to the load current (according to a known ratio) when CS_DIS is driven low or left open. When CS_DIS is driven high, the CURRENT SENSE pin is high impedance. Output current limitation protects the device in overload condition. In case of long duration overload, the device limits the dissipated power to a safe level up to thermal shutdown intervention. Thermal shutdown with automatic restart allows the device to recover normal operation as soon as a fault condition disappears. x Protection – Undervoltage shutdown – Overvoltage clamp – Load current limitation – Thermal shutdown – Self limiting of fast thermal transients – Protection against loss of ground and loss of VCC January 2017 This is information on a product in full production. DocID027939 Rev 3 1/28 www.st.com Contents VND5004DSP30 Contents 1 Block diagram and pin configurations . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 4 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.1 Microcontroller I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.3 Maximum demagnetization energy (VCC = 13.5 V) . . . . . . . . . . . . . . . . . 19 Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.1 5 MultiPowerSO-30 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.1 MultiPowerSO-30 package information . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.2 MultiPowerSO-30 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 6 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 2/28 DocID027939 Rev 3 VND5004DSP30 List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Suggested connections for unused and non connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Switching (VCC = 13 V; Tj = 25 °C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 CurrentSense (8 V < VCC < 16 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Electrical transient requirements (part 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Electrical transient requirements (part 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Electrical transient requirements (part 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Thermal parameters for MultiPowerSO-30 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 MultiPowerSO-30 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 DocID027939 Rev 3 3/28 3 List of figures VND5004DSP30 List of figures Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Configuration diagram (not to scale) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 4. CurrentSense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 5. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 6. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 7. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 8. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 10. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 11. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 12. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 13. On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 14. On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 15. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 16. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 17. ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 18. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 19. CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 20. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 21. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 22. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 23. Maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 24. MultiPowerSO-30 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 25. Rthj-amb vs PCB copper area in open box free air condition (one channel on) . . . . . . . . . 20 Figure 26. MultiPowerSO-30 thermal impedance junction ambient single pulse  (one channel on) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 27. Thermal fitting model of a double channel HSD in MultiPowerSO-30 . . . . . . . . . . . . . . . . 21 Figure 28. MultiPowerSO-30 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 29. MultiPowerSO-30 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4/28 DocID027939 Rev 3 VND5004DSP30 1 Block diagram and pin configurations Block diagram and pin configurations Figure 1. Block diagram 9&& 9&& FODPS 8QGHU YROWDJH 3Z&/$03 '5,9(5 065187 *1' ,/,0 2YHUWHPS 5HYHUVHEDWWHU\ SURWHFWLRQ ,287 3ZU/,0 &6B',6 */187 /2*,& . $633&/5
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 *$3*06 Table 1. Pin functions Name VCC OUTPUT1,2 GND INPUT1,2 Function Battery connection Power output Ground connection Voltage controlled input pin with hysteresis, CMOS compatible. Controls output switch state CURRENT SENSE1,2 Analog current sense pin, delivers a current proportional to the load current CS_DIS Active high CMOS compatible pin, to disable the current sense pins DocID027939 Rev 3 5/28 27 Block diagram and pin configurations VND5004DSP30 Figure 2. Configuration diagram (not to scale)   7$$ '03
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   7$$ 065165 065165 065165 065165 065165 065165 /$ 065165 065165 065165 065165 065165 065165 7$$ *$3*&)7 Table 2. Suggested connections for unused and non connected pins Connection/pin CurrentSense 6/28 N.C. Output Input CS_DIS For test only X X X Floating Not allowed X X To ground Through 1 kȍ resistor X Not allowed DocID027939 Rev 3 Through Through 10 kȍ resistor 10 kȍ resistor Not allowed VND5004DSP30 2 Electrical specifications Electrical specifications Figure 3. Current and voltage conventions ,6 9&& ,&6' 9&6' 9&& ,287 &6B',6 287387 9287 ,,1 ,1387 &855(17 6(16( ,6(16( 96(16( *1' 9,1 ,*1' *$3*06 2.1 Absolute maximum ratings Stress values that exceed those listed in Table 3 can cause permanent damage to the device. These are stress ratings only, and operation of the device at these, or any conditions greater than those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 3. Absolute maximum ratings Symbol Value Unit DC supply voltage 28 V Transient supply voltage (T0.5 ȍ) 41 V -VCC Reverse DC supply voltage 16 V IOUT DC output current Internally limited A -IOUT Reverse DC output current 70 A DC input current -1 to 10 mA DC current sense disable input current -1 to 10 mA Current sense maximum voltage (VCC > 0 V) Vcc-41 +VCC V V VCC VCCPK IIN ICSD VCSENSE Parameter EMAX Maximum switching energy (single pulse) (L = 0.3 mH; RL = 0 ȍ; Vbat = 13.5 V; Tjstart = 150 ºC; IOUT = IlimL(typ.)) 342 mJ VESD Electrostatic discharge (Human Body Model: R = 1.5 kȍ; C = 100 pF) 2000 V VESD Charge device model (CDM-AEC-Q100-011) 750 V DocID027939 Rev 3 7/28 27 Electrical specifications VND5004DSP30 Table 3. Absolute maximum ratings (continued) Symbol Tj TSTG 2.2 Parameter Value Unit Junction operating temperature -40 to 150 °C Storage temperature -55 to 150 °C Thermal data Table 4. Thermal data Symbol Parameter Max value Unit Rthj-case Thermal resistance junction-case (with one channel ON) 0.35 °C/W Thermal resistance junction-ambient 58(1) °C/W Rthj-amb 1. PCB FR4 area 58 mmx58 mm, PCB thickness 2 mm, Cu thickness 35 μm, minimum pad layout. 2.3 Electrical characteristics Values specified in this section are for 8 V < VCC < 24 V, -40 °C < Tj < 150 °C, unless otherwise stated. Table 5. Power section Symbol Parameter VCC Operating supply voltage VUSD VUSDhyst RON RON REV Vclamp IS IL(off) Test conditions 4.5 13 28 V Undervoltage shutdown 3.5 4.5 V Undervoltage shutdown hysteresis 0.5 V IOUT = 15 A; Tj = 25 °C 4 mȍ IOUT = 15 A; Tj = 150 °C 8 mȍ IOUT = 15 A; VCC = 5 V; Tj = 25 °C 6 mȍ Rdson in reverse battery condition VCC = -13 V; IOUT = -15 A; Tj = 25 °C 4 mȍ VCC clamp voltage ICC = 20 mA; IOUT1,2 = 0 A 46 52 V Off-state; VCC = 13 V; Tj = 25 °C; VIN = VOUT = VSENSE = VCSD = 0 V 2(2) 5(2) μA On-state; VCC = 13 V; VIN = 5 V; IOUT = 0 A 3.5 6 mA 0.01 3 μA 5 μA On-state resistance(1) Supply current Off-state output current(1) 41 VIN = VOUT = 0 V; VCC = 13 V; Tj = 25 °C 0 VIN = VOUT = 0 V; VCC = 13 V; Tj = 125 °C 0 1. For each channel. 2. PowerMOS leakage included. 8/28 Min. Typ. Max. Unit DocID027939 Rev 3 VND5004DSP30 Electrical specifications Table 6. Switching (VCC = 13 V; Tj = 25 °C) Symbol Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time RL = 0.87 ȍ (see Figure 5) — 25 — μs td(off) Turn-on delay time RL = 0.87 ȍ (see Figure 5) — 35 — μs (dVOUT/dt)on Turn-on voltage slope RL = 0.87 ȍ — See Figure 16 — Vμs (dVOUT/dt)off Turn-off voltage slope RL = 0.87 ȍ — See Figure 18 — Vμs WON Switching energy losses during twon RL = 0.87 ȍ (see Figure 5) — 5.4 — mJ WOFF Switching energy losses during twoff RL = 0.87 ȍ (see Figure 5) — 2.3 — mJ Min. Typ. Table 7. Logic inputs Symbol Parameter Test conditions VIL1,2 Input low level voltage IIL1,2 Low level input current VIH1,2 Input high level voltage IIH1,2 High level input current VI(hyst)1,2 Input hysteresis voltage 0.9 VIN = 0.9 V 2.1 V 10 IIN = 1 mA VCSDL CS_DIS low level voltage ICSDL Low level CS_DIS current VCSDH CS_DIS high level voltage ICSDH High level CS_DIS current VCSD = 2.1 V VCSCL μA 0.25 Input clamp voltage IIN = -1 mA CS_DIS clamp voltage 7 -0.7 V 1 μA 2.1 V 10 0.25 ICSD = 1 mA V V 0.9 VCSD = 0.9 V μA V 5.5 CS_DIS hysteresis voltage V 1 VIN = 2.1 V VICL1,2 VCSD(hyst) Max. Unit V 5.5 ICSD = -1 mA μA 7 -0.7 V V Table 8. Protections and diagnostics Symbol Parameter Test conditions VCC = 13 V IlimH Short circuit current IlimL Short circuit current during thermal cycling TTSD Shutdown temperature TR Min. Typ. Max. Unit 70 100 140 A 140 A 5 V < VCC < 24 V VCC = 13 V; TR < Tj < TTSD Reset temperature DocID027939 Rev 3 40 150 175 TRS+1 TRS+5 A 200 °C °C 9/28 27 Electrical specifications VND5004DSP30 Table 8. Protections and diagnostics (continued) Symbol TRS THYST VDEMAG Note: Parameter Test conditions Min. Thermal reset of STATUS Typ. Max. 135 Thermal hysteresis (TTSD-TR) °C 7 Turn-off output voltage clamp IOUT = 2 A; VIN = 0; L = 6 mH VCC-28 Unit °C VCC-32 VCC-35 V To ensure long term reliability under heavy overload or short-circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles. Table 9. CurrentSense (8 V < VCC < 16 V) Symbol Parameter Test conditions Min. Typ. Max. K0 IOUT/ISENSE IOUT = 10 A; VSENSE = 4 V; VCSD = 0 V; Tj = -40 °C to 150 °C Tj = 25 °C to 150 °C 7500 11000 16000 16000 23000 20900 K1 IOUT/ISENSE IOUT = 15 A; VSENSE = 4 V; VCSD = 0 V; Tj = -40 °C to 150 °C Tj = 25 °C to 150 °C 10300 12500 16000 16000 19500 19500 K2 IOUT/ISENSE IOUT = 30A; VSENSE = 4V; VCSD = 0V; Tj = -40 °C to 150 °C Tj = 25 °C to 150 °C 12400 14000 16500 16500 19000 19000 ISENSE0 Analog sense current Unit IOUT = 0 A; VSENSE = 0 V; VCSD = 5 V; VIN = 0 V; Tj = -40 °C to 150 °C 0 5 μA VCS D = 0 V; VIN = 5 V;  Tj = -40 °C to 150°C 0 400 μA IOUT = 45 A; VCSD = 0 V; RSENSE = 3.9 kȍ 5 VSENSE Max analog sense output voltage VSENSEH Analog sense output voltage in over temperature VCC = 13 V; RSENSE = 3.9 kȍ condition 9 V ISENSEH Analog sense output current in over temperature VCC = 13 V; VSENSE = 5 V condition 8 mA V tDSENSE1H Delay response time from falling edge of CS_DIS pin VSENSE < 4 V; 5 A < IOUT < 30 A; ISENSE = 90% of ISENSE max (see Figure 4) 50 100 μs tDSENSE1L Delay response time from rising edge of CS_DIS pin VSENSE < 4 V; 5 A < IOUT < 30 A; ISENSE = 10% of ISENSE max (see Figure 4) 5 20 μs 10/28 DocID027939 Rev 3 VND5004DSP30 Electrical specifications Table 9. CurrentSense (8 V < VCC < 16 V) (continued) Symbol Parameter Test conditions Min. Typ. Max. Unit tDSENSE2H Delay response time from rising edge of INPUT pin VSENSE < 4 V; 5 A < IOUT < 30 A; ISENSE = 90% of ISENSE max (see Figure 4) 270 600 μs tDSENSE2L Delay response time from falling edge of INPUT pin VSENSE < 4 V; 5 A < IOUT < 30 A; ISENSE = 10% of ISENSE max (see Figure 4) 100 250 μs Figure 4. CurrentSense delay characteristics ,1387 &6B',6 /2$'&855(17 6(16(&855(17 W'6(16(+ W'6(16(/ W'6(16(+ W'6(16(/ *$3*5, Figure 5. Switching characteristics 9287 W:RQ W:RII   G9287GWRII G9287GWRQ WU  WI W ,1387 WGRQ WGRII W *$3*5, DocID027939 Rev 3 11/28 27 Electrical specifications VND5004DSP30 Table 10. Truth table Inputn Outputn SENSEn (VCSD = 0 V)(1) (see Figure 4) Normal operation L H L H 0 Nominal Over temperature L H L L 0 VSENSEH Undervoltage L H L L 0 0 Short circuit to GND (RSC d 10 mȍ) L H H L L L 0 0 if Tj < TTSD VSENSEH if Tj > TTSD Short circuit to VCC L H H H 0 < Nominal Negative output voltage clamp L L 0 Conditions 1. If VCSD is high, the SENSE output is at a high impedance. Its potential depends on leakage currents and the external circuit. 12/28 DocID027939 Rev 3 VND5004DSP30 Electrical specifications Table 11. Electrical transient requirements (part 1/3) Test levels(1) ISO 7637-2: 2004(E) Test pulse III IV Number of pulses or test times 1 -75 V -100 V 5000 pulses 0.5 s 5s 2 ms, 10 ȍ 2a +37 V +50 V 5000 pulses 0.2 s 5s 50 μs, 2 ȍ 3a -100 V -150 V 1h 90 ms 100 ms 0.1 μs, 50 ȍ 3b +75 V +100 V 1h 90 ms 100 ms 0.1 μs, 50 ȍ 4 -6 V -7 V 1 pulse 100 ms, 0.01 ȍ 5b(2) +65 V +87 V 1 pulse 400 ms, 2 ȍ Burst cycle/pulse repetition time Delays and impedance 1. The above test levels must be considered referred to VCC = 13.5 V except for pulse 5b. 2. Valid in case of external load dump clamp: 40V maximum referred to ground. The protection strategy allows PowerMOS to be cyclically switched on during load dump, so distributing the load dump energy along the time and to transfer a part of it to the load. Table 12. Electrical transient requirements (part 2/3) Test level results(1) ISO 7637-2: 2004(E) test pulse III IV 1 C C 2a C C 3a C C 3b C C 4 C C C C (2) (3) 5b 1. The above test levels must be considered referred to VCC = 13.5 V except for pulse 5b. 2. Valid in case of external load dump clamp: 40V maximum referred to ground. The protection strategy allows PowerMOS to be cyclically switched on during load dump, so distributing the load dump energy along the time and to transfer a part of it to the load. 3. Suppressed load dump (pulse 5b) is withstood with a minimum load connected as specified in Table 3.: Absolute maximum ratings. Table 13. Electrical transient requirements (part 3/3) Class Contents C All functions of the device are performed as designed after exposure to disturbance. E One or more functions of the device are not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device. DocID027939 Rev 3 13/28 27 Electrical specifications VND5004DSP30 Figure 6. Waveforms 1250$/23(5$7,21 ,1387Q &6B',6 /2$'&855(17Q 6(16(&855(17Q 81'(592/7$*( 986'K\VW 9&& 986' ,1387Q &6B',6 /2$'&855(17Q 6(16(&855(17Q 2873876+257729FF ,1387Q &6B',6 /2$'92/7$*(Q /2$'&855(17Q 6(16(&855(17Q 1RPLQDO 1RPLQDO 29(5/2$'23(5$7,21 7M 75 776' 756 ,1387Q &6B',6 ,/,0+ ,/,0/ /2$'&855(17Q 96(16(+ 6(16(&855(17Q WKHUPDOF\FOLQJ FXUUHQW SRZHU OLPLWDWLRQ OLPLWDWLRQ 6+257('/2$'  1250$//2$' *$3*06 14/28 DocID027939 Rev 3 VND5004DSP30 2.4 Electrical specifications Electrical characteristics curves Figure 7. Off-state output current Iloff (uA) Figure 8. High level input current Iih (uA) 6 5 5.4 4.5 Off State Vcc=13V Vin=Vout=0V 4.8 4.2 Vin=2.1V 4 3.5 3.6 3 3 2.5 2.4 2 1.8 1.5 1.2 1 0.6 0.5 0 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 Tc (°C) 50 75 100 125 150 175 Tc (°C) Figure 9. Input clamp voltage Figure 10. Input low level Vicl (V) Vil (V) 7 2 1.8 6.75 Iin=1mA 1.6 6.5 1.4 6.25 1.2 1 6 0.8 5.75 0.6 5.5 0.4 5.25 0.2 5 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 Tc (°C) 50 75 100 125 150 175 Tc (°C) Figure 11. Input high level Figure 12. Input hysteresis voltage Vih (V) Vihyst (V) 4 1 0.9 3.5 0.8 3 0.7 2.5 0.6 2 0.5 0.4 1.5 0.3 1 0.2 0.5 0.1 0 0 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) -50 -25 0 25 50 75 100 125 150 175 Tc (°C) DocID027939 Rev 3 15/28 27 Electrical specifications VND5004DSP30 Figure 13. On-state resistance vs Tcase Ron (mOhm) Figure 14. On-state resistance vs VCC Ron (mOhm) 6 6 5.4 5.4 Iout=15A Vcc=13V 4.8 Tc=150°C 4.8 Tc=125°C 4.2 4.2 3.6 3.6 3 3 2.4 2.4 1.8 Tc=25°C Tc=-40°C 1.8 -50 -25 0 25 50 75 100 125 150 175 0 4 8 12 16 Tc (°C) 20 24 28 Vcc Figure 15. Undervoltage shutdown Figure 16. Turn-on voltage slope Vusd (V) (dVout/dt)on (V/ms) 16 500 450 14 Vcc=13V RI=0.87Ohm 400 12 350 10 300 250 8 200 6 150 4 100 2 50 0 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 Figure 17. ILIMH vs Tcase 75 100 125 150 175 Figure 18. Turn-off voltage slope Ilimh (A) (dVout/dt)off (V/ms) 150 500 140 450 Vcc=13V 130 Vcc=13V RI=0.87Ohm 400 120 350 110 300 100 250 90 200 80 150 70 100 60 50 50 0 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) 16/28 50 Tc (°C) Tc (°C) -50 -25 0 25 50 75 Tc (°C) DocID027939 Rev 3 100 125 150 175 VND5004DSP30 Electrical specifications Figure 19. CS_DIS high level voltage Vcsdh (V) Figure 20. CS_DIS clamp voltage Vcsdcl (V) 4 8 3.5 7.5 3 7 2.5 6.5 2 6 1.5 5.5 1 5 0.5 4.5 0 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) 4 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) Figure 21. CS_DIS low level voltage Vcsdl (V) 4 3.5 3 2.5 2 1.5 1 0.5 0 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) DocID027939 Rev 3 17/28 27 Application information 3 VND5004DSP30 Application information Figure 22. Application schematic 9 9&& 5SURW &6B',6 'OG M& 5SURW ,,1387 287387 5SURW &855(176(16( *1' 56(16( &H[W *$3*&)7 3.1 Microcontroller I/Os protection When negative transients are present on the VCC line, the control pins will be pulled negative to approximately -1.5 V. ST suggests the insertion of resistors (Rprot) in the lines to prevent the μC I/Os pins from latching up. The values of these resistors provide a compromise between the leakage current of the μC, the current required by the HSD I/Os (input levels compatibility) and the latch-up limit of the μC I/Os. -VCCpeak/Ilatchup d Rprot d (VOHμC-VIH) / IIHmax Calculation example: For VCCpeak = - 1.5 V and Ilatchup t 20 mA; VOHμC t 4.5 V 75 ȍ d Rprot d 240 kȍ. Recommended values: Rprot = 10 kȍCEXT = 10 nF 3.2 Load dump protection Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the VCCPK max rating. The same applies if the device will be subject to transients on the VCC line that are greater than the ones shown in Table 11. 18/28 DocID027939 Rev 3 VND5004DSP30 3.3 Application information Maximum demagnetization energy (VCC = 13.5 V) Figure 23. Maximum turn-off current versus inductance 100 A B C I (A) 10 1 1 L (mH) 10 100 A: Tjstart = 150°C single pulse B: Tjstart = 100°C repetitive pulse C: Tjstart = 125°C repetitive pulse VIN, IL Demagnetization Demagnetization Demagnetization t Note: Values are generated with RL = 0 ȍ In case of repetitive pulses, Tjstart (at the beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves A and B. DocID027939 Rev 3 19/28 27 Package and PC board thermal data VND5004DSP30 4 Package and PC board thermal data 4.1 MultiPowerSO-30 thermal data Figure 24. MultiPowerSO-30 PC board *$3*06 Note: Layout condition of Rth and Zth measurements (PCB: Double layer, Thermal Vias, FR4 area = 58 mm x 58 mm, PCB thickness = 2 mm, Cu thickness = 70 μm (front and back side), Copper areas: from minimum pad layout to 4 cm2). Figure 25. Rthj-amb vs PCB copper area in open box free air condition (one channel on) 57+MBDPEƒ&:             3&%&XKHDWVLQNDUHDFPA *$3*06 20/28 DocID027939 Rev 3 VND5004DSP30 Package and PC board thermal data Figure 26. MultiPowerSO-30 thermal impedance junction ambient single pulse (one channel on) =7+ƒ&:   )RRWSULQW FP           7LPHV    *$3*06 Figure 27. Thermal fitting model of a double channel HSD in MultiPowerSO-30 $*9 Note: The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered. Equation 1: pulse calculation formula Z THG = R TH ˜G+Z THtp 1 – G where G = tP/T DocID027939 Rev 3 21/28 27 Package and PC board thermal data VND5004DSP30 Table 14. Thermal parameters for MultiPowerSO-30 22/28 Area/island (cm2) Footprint R1 (°C/W) 0.05 R2 (°C/W) 0.3 R3 (°C/W) 0.5 R4 (°C/W) 1.3 R5 (°C/W) 14 R6 (°C/W) 44.7 R7 (°C/W) 0.05 R8 (°C/W) 0.3 C1 (W.s/°C) 0.005 C2 (W.s/°C) 0.008 C3 (W.s/°C) 0.01 C4 (W.s/°C) 0.3 C5 (W.s/°C) 0.6 C6 (W.s/°C) 5 C7 (W.s/°C) 0.005 C8 (W.s/°C) 0.008 DocID027939 Rev 3 4 23.7 11 VND5004DSP30 5 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 5.1 MultiPowerSO-30 package information Figure 28. MultiPowerSO-30 package outline *$3*06 Table 15. MultiPowerSO-30 mechanical data Millimeters Symbol Min. Typ. A Max. 2.35 A2 1.85 2.25 A3 0 0.1 B 0.42 0.58 C 0.23 0.32 D 17.1 E 18.85 E1 15.9 DocID027939 Rev 3 17.2 17.3 19.15 16 16.1 23/28 27 Package information VND5004DSP30 Table 15. MultiPowerSO-30 mechanical data (continued) Millimeters Symbol Min. “e” Typ. 1 F6 14.3 F7 5.45 F8 0.73 L 0.8 N S 5.2 Max. 1.15 10 Deg 0 Deg 7 Deg MultiPowerSO-30 packing information The devices are packed in tape and reel shipments (see the Table 16: Device summary on page 26). 24/28 DocID027939 Rev 3 VND5004DSP30 Package information Figure 29. MultiPowerSO-30 tape and reel shipment (suffix “TR”) Reel dimension Dimension Base Q.ty Bulk Q.ty A (max) B (min) C (± 0.2) D (min) G (+ 2 / -0) N (min) T (max) mm 1000 1000 330 1.5 13 20.2 32 100 38.4 Tape dimensions According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Description Dimension mm Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 (± 0.1) P D (± 0.1/-0) D1 (min) F (± 0.1) K (max) P1 (± 0.1) 32 4 24 1.5 2 14.2 2.2 2 End Start Top cover tape No components Components No components 500 mm min 500 mm min Empty components pockets User direction of feed DocID027939 Rev 3 25/28 27 Order codes 6 VND5004DSP30 Order codes Table 16. Device summary Order codes Package Tape and reel MultiPowerSO-30 26/28 VND5004DSP30TR-E DocID027939 Rev 3 VND5004DSP30 7 Revision history Revision history Table 17. Document revision history Date Revision 09-Jun-2015 1 Initial release. 02-Nov-2015 2 Updated Table 16: Device summary 3 – – – – 11-Jan-2017 Changes Removed all information relative to tube packing of the product Modified Section 5: Package information. Added AEC-Q100 qualified in the Features section Minor text edits throughout the document DocID027939 Rev 3 27/28 27 VND5004DSP30 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2017 STMicroelectronics – All rights reserved 28/28 DocID027939 Rev 3