VND5025LAKTR-E

VND5025LAK-E Double channel high side driver with analog current sense for automotive applications Features Max supply voltage VCC Operating voltage range VCC 4.5 to 36V Max On-State resistance (per ch.) RON 25mΩ Current limitation (typ) ILIMH 60A IS 2µA(1) Off-state supply current 41 V PowerSSO-24™ – Reverse battery protection (see Application schematic(1) on page 21) – Electrostatic discharge protection 1. Typical value with all loads connected Description ■ ■ ■ Features – In-rush current active management by power limitation – Very low standby current – 3.0V CMOS compatible input – Optimized electromagnetic emission – Very low electromagnetic susceptibility – In compliance with the 2002/95/EC European directive – Package: ECOPACK® Diagnostic functions – Proportional load current sense – High current sense precision for wide range currents – Current sense disable – Thermal shutdown indication – Very low current sense leakage Protections – Undervoltage shutdown – Overvoltage clamp – Load current limitation – Self-limiting of fast thermal transients – Protection against loss of ground and loss of VCC – Thermal shutdown Table 1. The VND5025LAK-E is a monolithic device made using STMicroelectronics VIPower M0-5 technology. It is intended for driving resistive or inductive loads with one side connected to ground, and suitable for driving LEDs. Active VCC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table). This device integrates an analog current sense which delivers a current proportional to the load current (according to a known ratio) when CS_DIS is driven low or left open. When CS_DIS is driven high, the CURRENT SENSE pin is in a high impedance condition. Output current limitation protects the device in overload condition. In case of long overload duration, the device limits the dissipated power to safe level up to thermal shutdown intervention. Thermal shutdown with automatic restart allows the device to recover normal operation as soon as fault condition disappears. Device summary Order codes Package PowerSSO-24™ September 2013 Tube Tape and reel VND5025LAK-E VND5025LAKTR-E Doc ID 12794 Rev 6 1/31 www.st.com 1 Contents VND5025LAK-E Contents 1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.1 4 6 2/31 3.1.1 Solution 1: Resistor in the ground line (RGND only) . . . . . . . . . . . . . . . 21 3.1.2 Solution 2: Diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 22 3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.3 Microcontroller I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.4 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 23 Package and thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 4.1 5 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 21 PowerSSO-24™ thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.2 PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.3 Package mechanical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 5.4 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Doc ID 12794 Rev 6 VND5025LAK-E List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Switching (VCC = 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Current sense (8V < VCC < 16V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Electrical transient requirements (part 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Electrical transient requirements (part 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Electrical transient requirements (part 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 PowerSSO-24™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Doc ID 12794 Rev 6 3/31 List of figures VND5025LAK-E List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. 4/31 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Delay response time between rising edge of output current and rising edge of current sense (CS enabled). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 IOUT/ISENSE vs IOUT(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 On-state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Application schematic(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Maximum turn-off current versus inductance(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 PowerSSO-24™ PC board(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Rthj-amb vs PCB copper area in open box free air condition (with one channel ON) . . . . 24 PowerSSO-24™ thermal impedance junction to ambient single pulse (with one channel ON) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Thermal fitting model of a double channel HSD in PowerSSO-24™(1) . . . . . . . . . . . . . . . 26 PowerSSO-24™ package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 PowerSSO-24™ tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 PowerSSO-24™ tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Doc ID 12794 Rev 6 VND5025LAK-E 1 Block diagram and pin description Block diagram and pin description Figure 1. Block diagram UNDERVOLTAGE VCC CLAMP OUTPUT1 PwCLAMP 1 GND CURRENT SENSE1 DRIVER 1 ILIM 1 INPUT1 LOGIC VDSLIM 1 PwrLIM 1 PwCLAMP 2 DRIVER 2 INPUT2 IOUT1 OUTPUT2 ILIM 2 OVERTEMP. 1 VDSLIM 2 CURRENT SENSE2 K1 OVERTEMP. 2 IOUT2 K2 PwrLIM 2 CS_DIS Table 2. Pin functions Name Function Battery connection VCC OUTPUT1,2 Power output Ground connection; must be reverse battery protected by an external diode/resistor network GND Voltage controlled input pin with hysteresis, CMOS compatible; controls output switch state INPUT1,2 CURRENT SENSE1,2 CS_DIS Figure 2. Analog current sense pin; delivers a current proportional to the load current Active high CMOS compatible pin to disable the current sense pin Configuration diagram (top view) VCC GND N.C. INPUT2 N.C. INPUT1 N.C. CURRENT SENSE1 N.C. CURRENT SENSE2 CS_DIS. VCC 1 2 3 4 5 6 7 8 9 10 11 12 Doc ID 12794 Rev 6 24 23 22 21 20 19 18 17 16 15 14 13 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1 5/31 Block diagram and pin description Table 3. VND5025LAK-E Suggested connections for unused and not connected pins Connection / Pin Current Sense N.C. Output Input CS_DIS Floating N.R.(1) X X X X To ground Through 1kΩ resistor X N.R. Through 10kΩ resistor Through 10kΩ resistor 1. Not recommended 6/31 Doc ID 12794 Rev 6 VND5025LAK-E 2 Electrical characteristics Electrical characteristics Figure 3. Current and voltage conventions IS VCC VF (*) ICSD OUTPUT1 CS_DIS VCSD VOUT1 ISENSE1 IIN1 CURRENT SENSE1 INPUT1 VIN1 VCC IOUT1 IIN2 IOUT2 VSENSE1 OUTPUT2 INPUT2 ISENSE2 VIN2 VOUT2 CURRENT SENSE2 GND VSENSE2 IGND Note: VFn = VOUTn - VCC during reverse battery condition 2.1 Absolute maximum ratings Table 4. Absolute maximum ratings Symbol Parameter Value VCC DC supply voltage 41 -VCC Reverse DC supply voltage 0.3 -IGND DC reverse ground pin current 200 IOUT DC output current - IOUT Reverse DC output current IIN ICSD V mA Internally limited A 24 DC input current -1 to 10 DC current sense disable input current -ICSENSE DC reverse CS pin current VCSENSE Current sense maximum voltage EMAX(1) Maximum switching energy (single pulse) (L = 0.3mH; RL = 0Ω; Vbat = 13.5V; Tjstart = 150°C; IOUT = IlimL(Typ.)) VESD Unit Electrostatic Discharge (Human Body Model: R = 1.5kΩ; C = 100pF) - Input - Current sense - CS_DIS - Output - VCC Doc ID 12794 Rev 6 mA 200 VCC - 41 to +VCC V 109 mJ 4000 2000 4000 5000 5000 V V V V V 7/31 Electrical characteristics Table 4. VND5025LAK-E Absolute maximum ratings (continued) Symbol VESD Tj Tstg Parameter Value Unit 750 V Charge device model (CDM-AEC-Q100-011) Junction operating temperature -40 to 150 Storage temperature -55 to 150 °C 1. See Section 3.4 for details. 2.2 Thermal data Table 5. Thermal data Symbol Parameter Max Value Rthj-case Thermal resistance junction-case (MAX) (with one channel ON) Rthj-amb Thermal resistance junction-ambient (MAX) 2.3 Unit 1.35 °C/W See Figure 29 Electrical characteristics 8V