VND5050J-E_07

VND5050J-E_07

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

  • 描述:

    VND5050J-E_07 - Double channel high side driver for automotive applications - STMicroelectronics

  • 详情介绍
  • 数据手册
  • 价格&库存
VND5050J-E_07 数据手册
VND5050J-E VND5050K-E Double channel high side driver for automotive applications Features Max supply voltage Operating voltage range Max On-State resistance (per ch.) Current limitation (typ) Off state supply current (1) Typical value with all loads connected. ■ VCC VCC RON ILIMH IS 41V 4.5 to 36V 50 mΩ 18 A 2 µA(1) PowerSSO-12 PowerSSO-24 – Electrostatic discharge protection Main – Inrush current active management by power limitation – Very low stand-by current – 3.0V CMOS compatible input – Optimized electromagnetic emission – Very low electromagnetic susceptibility – In compliance with the 2002/95/EC European directive Diagnostic functions – Open drain status output – On state open load detection – Off state open load detection – Thermal shutdown indication Protections – Undervoltage shut-down – Overvoltage clamp – Output stuck to VCC detection – Load current limitation – Self limiting of fast thermal transients – Protection against loss of ground and loss of VCC – Thermal shut down – Reverse battery protection (see Figure 27) Application ■ All types of resistive, inductive and capacitive loads Description The VND5050K-E and VND5050J-E are monolithic devices made using STMicroelectronics VIPower M0-5 technology. they are intended for driving resistive or inductive loads with one side connected to ground. Active VCC pin voltage clamp protects the devices against low energy spikes (see ISO7637 transient compatibility table). The devices detect open load condition both in on and off state, when STAT_DIS is left open or driven low. Output shorted to VCC is detected in the off state. When STAT_DIS is driven high, STATUS pin is in high impedance state. Output current limitation protects the devices in overload condition. In case of long overload duration, the devices limit the dissipated power to a safe level up to thermal shut-down intervention. Thermal shut-down with automatic restart allows the devices to recover normal operation as soon as fault conditions disappear.. ■ ■ Table 1. Device summary Package Part number (Tube) PowerSSO-12 PowerSSO-24 VND5050J-E VND5050K-E Order codes Part number (Tape & Reel) VND5050JTR-E VND5050KTR-E December 2007 Rev 4 1/37 www.st.com 37 Contents VND5050J-E / VND5050K-E Contents 1 2 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 2.2 2.3 2.4 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 20 3.1.1 3.1.2 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 20 Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . 21 3.2 3.3 3.4 3.5 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Open load detection in Off state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 23 4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 4.1 4.2 PowerSSO-12™ thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 PowerSSO-24™ thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 5.1 5.2 5.3 5.4 5.5 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 PowerSSO-12™ package information . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 PowerSSO-24™ package information . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 PowerSSO-12™ packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 PowerSSO-24™ packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 2/37 VND5050J-E / VND5050K-E List of tables List of tables Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Suggested connections for unused and n.c. pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Switching (VCC = 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Status pin (VSD=0V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Openload detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 PowerSSO-12™ thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 PowerSSO-24™ thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 PowerSSO-12™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 PowerSSO-24™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 3/37 List of figures VND5050J-E / VND5050K-E List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40. Figure 41. Figure 42. Figure 43. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Off state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 On state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Openload On state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Openload Off state voltage detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Turn- On voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Turn- Off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 STAT_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 High level STAT_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Low level STAT_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Open load detection in Off state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Maximum turn Off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 23 PowerSSO-12™ PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Rthj-amb Vs. PCB copper area in open box free air condition (one channel ON) . . . . . . . 24 PowerSSO-12™ thermal impedance junction ambient single pulse (one channel ON) . . . 25 Thermal fitting model of a double channel HSD in PowerSSO-12™ . . . . . . . . . . . . . . . . . 25 PowerSSO-24™ PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Rthj-amb Vs. PCB copper area in open box free air condition (one channel ON) . . . . . . . 27 PowerSSO-24™ Thermal impedance junction ambient single pulse (one channel ON) . . 28 Thermal fitting model of a double channel HSD in PowerSSO-24™ . . . . . . . . . . . . . . . . . 28 PowerSSO-12™ package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 PowerSSO-24™ package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 PowerSSO-12™ tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 PowerSSO-12™ tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 PowerSS0-24TM tube shipment (no suffix). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 PowerSSO-24TM tape and reel shipment (suffix “TR”). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 4/37 VND5050J-E / VND5050K-E Block diagram and pin description 1 Block diagram and pin description Figure 1. Block diagram VCC GND INPUT1 VCC CLAMP UNDERVOLTAGE CLAMP 1 STATUS1 STAT_DIS LOGIC INPUT2 STATUS2 OPENLOAD ON 1 OVERTEMP. 1 CURRENT LIMITER 1 DRIVER 1 OUTPUT1 OPENLOAD OFF 1 PWRLIM 1 CONTROL & PROTECTION STATUS2 EQUIVALENT TO CHANNEL1 INPUT2 VCC OUTPUT2 Table 2. Name VCC OUTPUTn GND INPUTn STATUSn STAT_DIS Pin function Function Battery connection. Power output. Ground connection. Must be reverse battery protected by an external diode/resistor network. Voltage controlled input pin with hysteresis, CMOS compatible. Controls output switch state. Open drain digital diagnostic pin. Active high CMOS compatible pin, to disable the STATUS pin. 5/37 Block diagram and pin description Figure 2. Configuration diagram (top view) TAB = Vcc GND STAT_DIS INPUT 1 STATUS 1 STATUS 2 INPUT 2 1 2 3 4 5 6 12 11 10 9 8 7 Vcc OUTPUT 1 OUTPUT 1 OUTPUT 2 OUTPUT 2 Vcc VCC GND. N.C. STAT_DIS INPUT1 STATUS1 N.C. STATUS2 N.C. INPUT2 N.C. VCC VND5050J-E / VND5050K-E OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT2 TAB = VCC PowerSSO-12 PowerSSO-24 Table 3. Suggested connections for unused and n.c. pins STATUS X N.R.(1) N.C. X X OUTPUT X N.R. INPUT X Through 10KΩ resistor STAT_DIS X Through 10KΩ resistor Connection / Pin Floating To ground (1) Not recommended. 6/37 VND5050J-E / VND5050K-E Electrical specifications 2 Electrical specifications Figure 3. Current and voltage conventions IS VCC VCC VFn ISD STAT_DIS VSD IINn INPUTn VINn GND IGND STATUSn VSTATn ISTATn OUTPUTn VOUTn IOUTn Note: VFn = VOUTn - VCCn during reverse battery condition. 2.1 Absolute maximum ratings Stressing the device above the rating listed in the “Absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to the conditions in table below for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality document. Table 4. Symbol VCC - VCC - IGND IOUT - IOUT IIN ISTAT DC supply voltage Reverse DC supply voltage DC reverse ground pin current DC output current Reverse dc output current DC input current DC status current Absolute maximum ratings Parameter Value 41 0.3 200 Internally limited 15 +10 / -1 +10 / -1 +10 / -1 104 Unit V V mA A A mA mA mA mJ ISTAT_DIS DC status disable current EMAX Maximum switching energy (L=3mH; RL=0Ω; Vbat=13.5V; Tjstart=150ºC; IOUT = IlimL(Typ.)) 7/37 Electrical specifications Table 4. Symbol VESD VESD Tj Tstg VND5050J-E / VND5050K-E Absolute maximum ratings (continued) Parameter Electrostatic discharge (Human Body Model: R=1.5KΩ; C=100pF) Charge device model (CDM-AEC-Q100-011) Junction operating temperature Storage temperature Value 4000 750 -40 to 150 - 55 to 150 Unit V V °C °C 2.2 Thermal data Table 5. Symbol Thermal data Value Parameter PowerSSO-12 PowerSSO-24 2.8 See Figure 35 °C/W °C/W Thermal resistance junction-case (Max.) (with one channel ON) Thermal resistance junction-ambient (Max.) Unit Rthj-case Rthj-amb 2.8 See Figure 31 8/37 VND5050J-E / VND5050K-E Electrical specifications 2.3 Electrical characteristics 8V
VND5050J-E_07
### 物料型号 - VND5050J-E(PowerSSO-12封装) - VND5050K-E(PowerSSO-24封装)

### 器件简介 VND5050J-E和VND5050K-E是采用STMicroelectronics VIPower M0-5技术制造的单片设备,用于驱动电阻性或感性负载,适用于汽车应用。

### 引脚分配 - Vcc:电源连接 - OUTPUTn:电源输出 - GND:地连接,必须通过外部二极管/电阻网络进行反电池保护 - INPUTn:具有迟滞的电压控制输入引脚,CMOS兼容,控制输出开关状态 - STATUSn:开漏数字诊断引脚 - STAT_DIS:高电平有效的CMOS兼容引脚,用于禁用STATUS引脚

### 参数特性 - 最大供电电压:41V - 工作电压范围:4.5V至36V - 最大导通电阻(每通道):50毫欧 - 电流限制(典型值):18A - 关态供电电流:2mA

### 功能详解 - 过载保护:在过载情况下限制功耗,直至热保护介入 - 诊断功能:开漏状态输出、开路检测、热关断指示 - 保护功能:欠压关断、过压钳位、输出固定在Vcc检测、负载电流限制、快速热瞬态自限制、反电池保护(见图27)

### 应用信息 - 主要应用:限制涌流电流管理、极低待机电流、3.0V CMOS兼容输入、优化的电磁发射 - 适用于所有类型的电阻性、感性和容性负载

### 封装信息 - PowerSSO-12和PowerSSO-24封装的热阻和热容参数,以及PCB布局条件。
VND5050J-E_07 价格&库存

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