VND5E004C30-E

VND5E004C30-E

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    SOP30

  • 描述:

    IC PWR DRVR N-CH 1:1 MULTIPWRSO

  • 数据手册
  • 价格&库存
VND5E004C30-E 数据手册
VND5E004C30 Double 4 mhigh-side driver with analog CurrentSense for automotive applications Datasheet - production data 0XOWL3RZHU6 *$3*&)7 Features Max transient supply voltage VCC 41 V Operating voltage range VCC 4.5 to 28 V Max on-state resistance (per ch.) RON 4 m Current limitation (typ) ILIMH 90 A Off-state supply current IS 2 µA(1) – Protection against loss of ground and loss of VCC – Overtemperature shutdown with auto restart (thermal shutdown) – Inrush current active management by power limitation – Reverse battery protection with self switchon of the Power MOSFET – Electrostatic discharge protection Applications  All types of resistive, inductive and capacitive loads 1. Typical value with all loads connected  Suitable for power management applications  AEC-Q100 qualified Description  General – Very low standby current – 3.0 V CMOS compatible inputs – Optimized electromagnetic emissions – Very low electromagnetic susceptibility – Compliant with European directive 2002/95/EC – Very low current sense leakage The device is a double channel high-side driver manufactured using ST proprietary VIPower®  M0-5 technology and housed in a  MultiPowerSO-30 package. The device is designed to drive 12 V automotive grounded loads, and to provide protection and diagnostics. It also implements a 3 V and 5 V CMOScompatible interface for use with any microcontroller.  Diagnostic functions – Proportional load current sense – High current sense precision for wide currents range – Diagnostic enable pin – Off-state open-load detection – Output short to VCC detection – Overload and short to ground (power limitation) indication – Thermal shutdown indication  Protection – Undervoltage shutdown – Overvoltage clamp – Load current limitation – Self limiting of fast thermal transients January 2017 This is information on a product in full production. The device integrates advanced protective functions such as load current limitation, inrush and overload active management by power limitation, overtemperature shut-off with autorestart and overvoltage active clamp. A dedicated analog current sense pin is associated with every output channel providing enhanced diagnostic functions including fast detection of overload and short-circuit to ground through power limitation indication, overtemperature indication, shortcircuit to VCC diagnosis and on-state and off-state open-load detection. The current sensing and diagnostic feedback of the whole device can be disabled by pulling the DE pin low to share the external sense resistor with similar devices. DocID027937 Rev 3 1/35 www.st.com Contents VND5E004C30 Contents 1 Block diagram and pin configurations . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2.5 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.1 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.3 Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.3.1 3.4 4 Maximum demagnetization energy (VCC = 13.5 V) . . . . . . . . . . . . . . . . . 26 Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 4.1 5 Short to VCC and off-state open-load detection . . . . . . . . . . . . . . . . . . 25 MultiPowerSO-30 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 5.1 MultiPowerSO-30 package information . . . . . . . . . . . . . . . . . . . . . . . . . . 30 5.2 MultiPowerSO-30 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 6 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 2/35 DocID027937 Rev 3 VND5E004C30 List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Suggested connections for unused and non connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Switching (VCC = 13 V; Tj = 25 °C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Current sense (8 V < VCC < 18 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Open-load detection (8 V < VCC < 18 V; VDE = 5 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Electrical transient requirements (part 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Electrical transient requirements (part 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Electrical transient requirements (part 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Thermal parameters for MultiPowerSO-30 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 MultiPowerSO-30 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 DocID027937 Rev 3 3/35 3 List of figures VND5E004C30 List of figures Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Configuration diagram (not to scale). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 4. CurrentSense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 5. Open-load off-state delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 7. Delay response time between rising edge of output current and rising edge of  current sense (CS enabled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 8. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 9. IOUT/ISENSE vs IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 10. Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 11. Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 12. Overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 13. Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 14. Off-state open-load with external circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 15. Short to VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 16. TJ evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 17. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 18. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 19. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 20. Input low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 21. Input high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 22. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 23. On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 24. On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 25. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 26. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 27. ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 28. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 29. DE high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 30. DE clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 31. DE low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 32. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 33. Current sense and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 34. Maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Figure 35. MultiPowerSO-30 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Figure 36. Rthj-amb vs PCB copper area in open box free air condition (one channel ON) . . . . . . . . 27 Figure 37. MultiPowerSO-30 thermal impedance junction ambient single pulse (one channel ON) . . 28 Figure 38. Thermal fitting model of a double channel HSD in MultiPowerSO-30 . . . . . . . . . . . . . . . . 28 Figure 39. MultiPowerSO-30 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 40. MultiPowerSO-30 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 4/35 DocID027937 Rev 3 VND5E004C30 1 Block diagram and pin configurations Block diagram and pin configurations Figure 1. Block diagram 9&& 5HYHUVH %DWWHU\ 3URWHFWLRQ 6LJQDO&ODPS 8QGHUYROWDJH ,1 &RQWURO 'LDJQRVWLF &RQWURO 'LDJQRVWLF 3RZHU &ODPS '5,9(5 ,1 &+  921 /LPLWDWLRQ 2YHU WHPS &XUUHQW /LPLWDWLRQ 2))6WDWH 2SHQORDG '( 96(16(+ &6 &XUUHQW 6HQVH &+  &6 287 287 /2*,& 29(5/2$'3527(&7,21 $&7,9(32:(5/,0,7$7,21 *1' ("1($'5 Table 1. Pin functions Name VCC OUT1,2 Function Battery connection Power output GND Ground connection IN1,2 Voltage controlled input pin with hysteresis, CMOS compatible, controls output switch state CS1,2 Analog current sense pin; delivers a current proportional to the load current DE Active high diagnostic enable pin DocID027937 Rev 3 5/35 34 Block diagram and pin configurations VND5E004C30 Figure 2. Configuration diagram (not to scale)   7$$ '035&450/-: '035&450/-: /$ /$ (/% %& $4 $4 */ */ /$ '035&450/-: '035&450/-: 7$$ 7$$ )FBU4MVH   7$$ 065 065 065 065 065 065 /$ 065 065 065 065 065 065 7$$ ("1($'5 Table 2. Suggested connections for unused and non connected pins Connection / pin CurrentSense NC(1) Output Input DE For test only Floating Not allowed X X X X X To ground Through 1 kΩ resistor X Not allowed 1. Not connected 6/35 DocID027937 Rev 3 Through Through 10 kΩresistor 10 kΩresistor Not allowed VND5E004C30 2 Electrical specifications Electrical specifications Figure 3. Current and voltage conventions IS VCC IDE VCC IOUT1,2 DE OUTPUT1,2 IIN1,2 VDE INPUT1,2 VIN1,2 GND CURRENT SENSE1,2 ISENSE1,2 VOUT1,2 VSENSE1,2 IGND 2.1 Absolute maximum ratings Applying stress which exceeds above the ratings listed in Table 3: Absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to the conditions in this section for extended periods may affect device reliability. Table 3. Absolute maximum ratings Symbol Value Unit DC supply voltage 28 V Transient supply voltage (T < 400 msRload > 0.5 Ω 41 V -VCC Reverse DC supply voltage 16 V IOUT DC output current Internally limited A -IOUT Reverse DC output current 70 A VCC VCCPK Parameter IIN DC input current -1 to 10 mA IDE DC diagnostic enable input current -1 to 10 mA VCSENSE Current sense maximum voltage (VCC > 0 V) VCC - 41 +VCC V V EMAX Maximum switching energy (single pulse) (L = 0.3 mH; RL = 0 Ω; Vbat = 13.5 V; Tjstart = 150 °C; IOUT = IlimL(Typ.)) 600 mJ VESD Electrostatic discharge (Human Body Model: R = 1.5 kΩ C = 100 pF) 2000 V VESD Charge device model (CDM-AEC-Q100-011) 750 V DocID027937 Rev 3 7/35 34 Electrical specifications VND5E004C30 Table 3. Absolute maximum ratings (continued) Symbol Tj TSTG 2.2 Parameter Value Unit Junction operating temperature -40 to 150 °C Storage temperature -55 to 150 °C Thermal data Table 4. Thermal data Symbol Parameter Max value Unit Rthj-case Thermal resistance junction-case (with one channel ON) 0.35 °C/W Rthj-amb Thermal resistance junction-ambient 58(1) °C/W 1. PCB FR4 area 58 mm x 58 mm, PCB thickness 2 mm, Cu thickness 35 µm, minimum pad layout 2.3 Electrical characteristics Values specified in this section are for 8 V < VCC < 24 V, -40 °C < Tj < 150 °C, unless otherwise stated. Table 5. Power section Symbol Parameter Test conditions VCC Operating supply voltage VUSD VUSDhyst Min. Typ. Max. Unit 4.5 13 28 V Undervoltage shutdown 3.5 4.5 V Undervoltage shutdown hysteresis 0.5 V 3 mΩ IOUT = 15 A; Tj = 25 °C RON RON REV Vclamp IS 8/35 On-state resistance(1) IOUT = 15 A; Tj = 150 °C 6 mΩ IOUT = 15 A; VCC = 5 V; Tj = 25 °C 6 mΩ RDSon in reverse battery condition VCC = -13 V; IOUT = -15 A; Tj = 25 °C VCC clamp voltage ICC = 20 mA; IOUT1,2 = 0 A Supply current 3 46 52 V Standby VDE = 0 V; VCC = 13 V; Tj = 25 °C; VIN = 0; VOUT = VSENSE = 0 V 2 5 µA Off-state; VCC = 13 V; VDE = 5 V; Tj = 25 °C; VIN = VOUT = VSENSE = 0 V 10 15 µA On-state; VCC = 13 V; VDE = 5 V; VIN = 5 V; IOUT = 0 A 3.5 6 mA DocID027937 Rev 3 41 mΩ VND5E004C30 Electrical specifications Table 5. Power section (continued) Symbol IL(off) Parameter Test conditions Off-state output current (1) Min. Typ. Max. Unit VIN = 0 V or VDE = 0 V; VOUT = 0 V; VCC = 13 V; Tj = 25 °C 0 VIN = 0 V or VDE = 0 V; VOUT = 0 V; VCC = 13 V; Tj = 125 °C 0 0.01 3 µA 5 µA 1. For each channel Table 6. Switching (VCC = 13 V; Tj = 25 °C) Symbol Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time RL = 0.87 Ω (see Figure 6) — 25 — µs td(off) Turn-off delay time RL = 0.87 Ω (see Figure 6) — 35 — µs (dVOUT/dt)on Turn-on voltage slope RL = 0.87 Ω — See Figure 26 — Vµs (dVOUT/dt)off Turn-off voltage slope RL = 0.87 Ω — See Figure 28 — Vµs WON Switching energy losses during twon RL = 0.87 Ω(see Figure 6) — 5.4 — mJ WOFF Switching energy losses during twoff RL = 0.87 Ω(see Figure 6) — 2.3 — mJ Typ. Max. Unit 0.9 V Table 7. Logic inputs Symbol Parameter VIL1,2 Input low level voltage IIL1,2 Low level input current VIH1,2 Input high level voltage IIH1,2 High level input current VI(hyst)1,2 Input hysteresis voltage Input clamp voltage VDEL DE low level voltage IDEL DE low level current VDEH DE high level voltage IDEH DE high level current VDE(hyst) DE hysteresis voltage DE clamp voltage VIN = 0.9 V Min. 1 µA 2.1 V VIN = 2.1 V 10 0.25 IIN = 1 mA VICL1,2 VDECL Test conditions V 5.5 IIN = -1 mA 7 -0.7 µA 2.1 V 10 0.25 IDE = -1 mA DocID027937 Rev 3 V 1 VIN = 2.1 V IDE = 1 mA V V 0.9 VIN = 0.9 V µA µA V 5.5 7 -0.7 V V 9/35 34 Electrical specifications VND5E004C30 Table 8. Protections and diagnostics Symbol Test conditions VCC = 13 V IlimH Short circuit current IlimL Short circuit current during thermal cycling TTSD Shutdown temperature TR Reset temperature TRS Thermal reset of STATUS THYST VDEMAG VON Note: Parameter Min. Typ. Max. Unit 65 90 130 A 130 A 5 V < VCC < 24 V VCC = 13 V; TR < Tj < TTSD 40 150 175 TRS+1 TRS+5 A 200 °C °C 135 °C Thermal hysteresis (TTSD-TR) Turn-off output voltage clamp IOUT = 2 A; VIN = 0; L = 6 mH Output voltage drop limitation IOUT = 1 A; Tj = -40 °C to 150 °C (see Figure 8) 7 °C VCC-28 VCC-32 VCC-35 V 25 mV To ensure long term reliability under heavy overload or short-circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles. Table 9. Current sense (8 V < VCC < 18 V) Symbol Test conditions Min. Typ. Max. Unit K0 IOUT/ISENSE IOUT = 5 A; VSENSE = 4 V; VDE = 5 V; Tj = -40 °C to 150 °C Tj = 25 °C to 150 °C K1 IOUT/ISENSE IOUT = 10 A; VSENSE = 4 V; VDE = 5 V; Tj = -40 °C to 150 °C 11830 16910 21990 Tj = 25 °C to 150 °C 12680 16910 21140 dK1/K1(1) K2 dK2/K2(1) K3 dK3/K3(1) 10/35 Parameter Current sense ratio IOUT =10 A; VSENSE = 4 V; VDE = 5 V; drift Tj = -40 °C to 150 °C IOUT/ISENSE -14 14 IOUT = 15 A; VSENSE = 4 V; VDE= 5 V; Tj = -40 °C to 150 °C 11760 16110 20460 Tj = 25 °C to 150 °C 13040 16110 19180 Current sense ratio IOUT = 15 A; VSENSE = 4 V; drift VDE = 5 V; Tj = -40 °C to 150 °C kIOUT/ISENSE 11420 17580 23740 12130 17580 23030 -10 10 IOUT = 30 A; VSENSE = 4 V; VDE = 5 V; Tj = -40 °C to 150 °C 13040 15520 18000 Tj = 25 °C to 150 °C 13810 15520 17230 Current sense ratio IOUT = 30 A; VSENSE = 4 V; drift VDE = 5 V; Tj = -40 °C to 150 °C DocID027937 Rev 3 -5 5 — — % — % — % VND5E004C30 Electrical specifications Table 9. Current sense (8 V < VCC < 18 V) (continued) Symbol Test conditions Min. IOUT = 0 A; VSENSE = 0 V; VDE = 0 V; VIN = 0 V; Tj = -40 °C to 150 °C 0 1 µA IOUT = 0 A; VSENSE = 0 V; VDE = 5 V; VIN = 5 V; Tj = -40 °C to 150 °C 0 2 µA IOUT = 15 A; VSENSE = 0 V; VDE = 0 V; VIN = 5 V; 0 1 µA Open-load onVIN = 5 V; 8 V < VCC < 18 V state current = 5 µA I detection threshold SENSE 10 150 mA VSENSE Max analog sense output voltage IOUT = 45 A; VCSD = 0 V; RSENSE = 3.9 kΩ 5 VSENSEH Analog sense output voltage in fault condition(2) VCC =13 V; RSENSE = 3.9 kΩ 8 V ISENSEH Analog sense output current in fault condition(2) VCC =13 V; VSENSE = 5 V 9 mA Delay response tDSENSE1H time from rising edge of DE pin VSENSE < 4 V; 5 A < IOUT < 30 A; ISENSE = 90 % of ISENSE max (see Figure 4) 50 100 µs Delay response tDSENSE1L time from falling edge of DE pin VSENSE < 4 V; 5 A < IOUT < 30 A; ISENSE = 10 % of ISENSE max (see Figure 4) 5 20 µs VSENSE < 4 V; 5 A < IOUT < 30 A; Delay response ISENSE = 90 % of ISENSE max tDSENSE2H time from rising edge of INPUT pin VDE = 5 V (see Figure 4) 200 600 µs VSENSE < 4 V; 5 A < Iout < 30 A; Delay response ISENSE = 10 % of ISENSE max tDSENSE2L time from falling edge of INPUT pin VDE = 5 V (see Figure 4) 100 250 µs ISENSE0 IOL Parameter Analog sense leakage current Typ. Max. Unit V 1. Parameter guaranteed by design; not tested. 2. Fault condition includes: power limitation, overtemperature and open-load off-state detection. Table 10. Open-load detection (8 V < VCC < 18 V; VDE = 5 V) Symbol Parameter Test conditions Min. Typ. Max. Unit 2 — 4 V VOL Open-load off-state voltage detection threshold VIN = 0 V, VDE = 5 V; See Figure 5 tDSTKON Output short circuit to VCC detection delay at turn off VDE = 5 V; See Figure 5 180 — 1200 µs IL(off2)r Off-state output current at VOUT = 4 V VIN = 0 V; VSENSE = 0 V;  VDE = 5 V;  VOUT rising from 0 V to 4 V -120 — 90 µA DocID027937 Rev 3 11/35 34 Electrical specifications VND5E004C30 Table 10. Open-load detection (8 V < VCC < 18 V; VDE = 5 V) (continued) Symbol Parameter Test conditions Min. Typ. Max. Unit -50 — 90 µA IL(off2)f Off-state output current at VOUT = 2 V VIN = 0 V; VSENSE = VSENSEH; VDE = 5 V;  VOUT falling from VCC to 2 V td_vol Delay response from output rising edge to VSENSE rising edge in open-load VOUT = 4 V; VIN = 0 V; VDE = 5 V; VSENSE = 90 % of VSENSEH — 20 µs td_voh Delay response from output VOUT = 2 V; VIN = 0V; falling edge to VSENSE falling VDE = 5 V; edge in open-load VSENSE = 10 % of VSENSEH — 20 µs Figure 4. CurrentSense delay characteristics ,1387 '( /2$'&855(17 6(16(&855(17 W'6(16(+ W'6(16(/ W'6(16(+ W'6(16(/ ("1($'5 Figure 5. Open-load off-state delay timing 287387678&.$79&& 9,1 9287!92/ 96(16(+ 9&6 W'67.21 12/35 DocID027937 Rev 3 VND5E004C30 Electrical specifications Figure 6. Switching characteristics 9287 W:RQ W:RII   G9287GW RII G9287GW RQ WU  WI W ,1387 WG RQ WG RII W *$3*&)7 Figure 7. Delay response time between rising edge of output current and rising edge of current sense (CS enabled) 9,1 ǻW'6(16(+ W ,287 ,2870$; ,2870$; W ,6(16( ,6(16(0$; ,6(16(0$; W *$3*&)7 DocID027937 Rev 3 13/35 34 Electrical specifications VND5E004C30 Figure 8. Output voltage drop limitation 9&&9287 7M ƒ& 7M ƒ& 7M ƒ& 921 ,287 921521 7 $*9 Figure 9. IOUT/ISENSE vs IOUT ,287,6(16(  $  %   &   '  (          ,287 $ *$3*&)7 Legend: A: Max, Tj = -40 °C to 150 °C B: Max, Tj = 25 °C to 150 °C C: Typical, Tj = -40 °C to 150 °C 14/35 DocID027937 Rev 3 D: Min, Tj = 25 °C to 150 °C E: Min, Tj = -40 °C to 150 °C VND5E004C30 Electrical specifications Figure 10. Maximum current sense ratio drift vs load current G..                 ,287 $  *$3*&)7 1. Parameter guaranteed by design; not tested. Table 11. Truth table Enable Input Output Sense (VDE=5V)(1) Normal operation H H L H L H 0 Nominal Overtemperature H H L H L L 0 VSENSEH Undervoltage H H L H L L 0 0 Overload H H H H X (no power limitation) Cycling (power limitation) Nominal VSENSEH Short circuit to GND (power limitation) H H L H L L 0 VSENSEH Open-load off-state (with external pull up) H L H VSENSEH Short circuit to VCC (external pull up disconnected) H H L H H H VSENSEH < Nominal Negative output voltage clamp H L L 0 Conditions 1. If the VDE is low, the SENSE output is at a high impedance; its potential depends on leakage currents and external circuit. DocID027937 Rev 3 15/35 34 Electrical specifications VND5E004C30 Table 12. Electrical transient requirements (part 1/3) ISO 7637-2: 2004(E) Test levels(1) Number of pulses or test times Burst cycle/pulse repetition time Delays and impedance Test pulse III IV 1 -75 V -100 V 5000 pulses 0.5 s 5s 2 ms, 10 Ω 2a +37 V +50 V 5000 pulses 0.2 s 5s 50 µs, 2 Ω 3a -100 V -150 V 1h 90 ms 100 ms 0.1 µs, 50 Ω 3b +75 V +100 V 1h 90 ms 100 ms 0.1 µs, 50 Ω 4 -6 V -7 V 1 pulse 100 ms, 0.01 Ω 5b(2) +65 V +87 V 1 pulse 400 ms, 2 Ω 1. The above test levels must be considered referred to VCC = 13.5V except for pulse 5b. 2. Valid in case of external load dump clamp: 40V maximum referred to ground. The protection strategy allows PowerMOS to be cyclically switched on during load dump, so distributing the load dump energy along the time and to transfer a part of it to the load. Table 13. Electrical transient requirements (part 2/3) Test level results(1) ISO 7637-2: 2004(E) Test pulse III IV 1 C C 2a C C 3a C C 3b C C 4 C C 5b(2) (3) C C 1. The above test levels must be considered referred to VCC = 13.5V except for pulse 5b 2. Valid in case of external load dump clamp: 40V maximum referred to ground. The protection strategy allows PowerMOS to be cyclically switched on during load dump, so distributing the load dump energy along the time and to transfer a part of it to the load. 3. Suppressed load dump (pulse 5b) is withstood with a minimum load connected as specified in Table 3. Table 14. Electrical transient requirements (part 3/3) 16/35 Class Contents C All functions of the device are performed as designed after exposure to disturbance. E One or more functions of the device are not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device. DocID027937 Rev 3 VND5E004C30 2.4 Electrical specifications Waveforms Figure 11. Normal operation ,1387 1RPLQDOORDG 1RPLQDOORDG ,287 96(16( 9&6B',6 $*9 Figure 12. Overload or short to GND ,1387 3RZHU/LPLWDWLRQ , /LP+! 7KHUPDOF\FOLQJ , /LP/! ,287 96(16( 9&6B',6 $*9 DocID027937 Rev 3 17/35 34 Electrical specifications VND5E004C30 Figure 13. Intermittent overload ,1387 2YHUORDG ,/LP+ ! ,/LP/ ! 1RPLQDOORDG ,287 96(16(+ ! 96(16( 9&6B',6 $*9 Figure 14. Off-state open-load with external circuitry ,1387 9287!92/ 9287 92/ ,287 96(16(+ ! W'67. RQ 96(16( 9&6B',6 $*9 18/35 DocID027937 Rev 3 VND5E004C30 Electrical specifications Figure 15. Short to VCC 9287 5HVLVWLYH 6KRUWWR9&& +DUG 6KRUWWR9&& 92/ 9287!92/ ,287 W'67. RQ W'67. RQ 9&6B',6 $*9 Figure 16. TJ evolution in overload or short to GND ,1387 6HOIOLPLWDWLRQRIIDVWWKHUPDOWUDQVLHQWV 776' 7+Q $ @ ,LK>X$@      7JO7                                   7F> ƒ&@ 7F >ƒ &@ *$3*&)7 *$3*&)7 Figure 19. Input clamp voltage Figure 20. Input low level voltage 9LO>9@ 9LFO>9@       *JON"                               7F> ƒ&@       7F>ƒ&@ *$3*&)7 *$3*&)7 Figure 21. Input high level voltage Figure 22. Input hysteresis voltage 9LK\VW>9@ 9LK>9@                           7F> ƒ&@ 20/35               7F> ƒ&@ *$3*&)7 DocID027937 Rev 3 *$3*&)7 VND5E004C30 Electrical specifications Figure 23. On-state resistance vs Tcase Figure 24. On-state resistance vs VCC 5RQ>P2KP@ 5RQ>P2KP@       5D¡$ 5D¡$ ,RXW $ 9FF 9    5D¡$ 5D¡$                           9FF>9@ 7F> ƒ&@ *$3*&)7 *$3*&)7 Figure 25. Undervoltage shutdown Figure 26. Turn-on voltage slope 9XVG>9@ G9RXWGW 2Q>9PV@     9FF 9 5O ȍ                                     7F> ƒ&@ 7F> ƒ&@ *$3*&)7 *$3*&)7 Figure 27. ILIMH vs Tcase Figure 28. Turn-off voltage slope ,OLPK>$@ G9RXWGW 2II>9PV@     7DD7 9FF 9 5O ȍ                                   7F> ƒ&@ 7F>ƒ&@ *$3*&)7 DocID027937 Rev 3 *$3*&)7 21/35 34 Electrical specifications VND5E004C30 Figure 29. DE high level voltage Figure 30. DE clamp voltage 9GHK>9@ 9GHFO>9@       *JON"                         *$3*&)7 Figure 31. DE low level voltage 9GHO>9@                    7F> ƒ&@ *$3*&)7 22/35           7F> ƒ&@ 7F> ƒ&@ DocID027937 Rev 3 *$3*&)7 VND5E004C30 3 Application information Application information Figure 32. Application schematic 9 9&& 5SURW '( 'OG -&8 5SURW ,1387 287387 5SURW &855(176(16( *1' 56(16( &H[W ("1($'5 3.1 MCU I/Os protection When negative transients are present on the VCC line, the control pins are pulled negative to approximately -1.5 V. ST suggests the insertion of resistors (Rprot) in the lines to prevent the microcontroller I/O pins from latching up. The values of these resistors provide a compromise between the leakage current of the microcontroller, the current required by the HSD I/Os (input levels compatibility) and the latch-up limit of the microcontroller I/Os. -VCCpeak/Ilatchup  Rprot  (VOHµC-VIH) / IIHmax Calculation example: For VCCpeak= - 1.5V and Ilatchup  20mA; VOHµC  4.5V 75  Rprot  240k. Recommended values: Rprot =10kCEXT=10nF 3.2 Load dump protection Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the VCCPK maximum rating. The same applies if the device is subject to transients on the VCC line that are greater than the ones shown in Table 12. DocID027937 Rev 3 23/35 34 Application information 3.3 VND5E004C30 Current sense and diagnostic The current sense pin performs a double function (see Figure 33: Current sense and diagnostics):  Current mirror of the load current in normal operation, delivering a current proportional to the load current according to a known ratio KX. The current ISENSE can be easily converted to a voltage VSENSE by means of an external resistor RSENSE. Linearity between IOUT and VSENSE is ensured up to 5V minimum (see parameter VSENSE in Table 9: Current sense (8 V < VCC < 18 V)). The current sense accuracy depends on the output current (refer to current sense electrical characteristics in Table 9).  Diagnostic flag in fault conditions, delivering a fixed voltage VSENSEH up to a maximum current ISENSEH in case of the following fault conditions (refer to  Table 11: Truth table): – Power limitation activation – Overtemperature – Short to VCC in off-state – Open-load in off-state with additional external components. A logic level low on the DE pin simultaneously sets all the current sense pins of the device in a high impedance state, thus disabling the current monitoring and diagnostic detection. This feature allows multiplexing of the microcontroller analog inputs by sharing the sense resistance and ADC line among different devices. Figure 33. Current sense and diagnostics 938 9%$7 9&& 0DLQ026Q 9 38B&0' 2YHUWHPSHUDWXUH ,287.; 538  2/2))  ,6(16(+ 92/ 3ZUB/LP 287Q ,/RIIU ,/RIII ,1387Q 96(16(+ '( &855(17 6(16(Q 53527 7RX&$'& 56(16( *1' /RDG 53' 96(16( ("1($'5 24/35 DocID027937 Rev 3 VND5E004C30 3.3.1 Application information Short to VCC and off-state open-load detection Short to VCC A short circuit between VCC and output is indicated by the relevant current sense pin set to VSENSEH during the device off-state. Little or no current is delivered by the current sense during the on-state depending on the nature of the short circuit. Off-state open-load with external circuitry Detection of an open-load in off mode requires an external pull-up resistor (RPU) connecting the output to a positive supply voltage (VPU). It is preferable that VPU be switched off during the module standby mode to avoid an increase in the overall standby current consumption in normal conditions, that is, when the load is connected. An external pull down resistor (RPD) connected between output and GND is mandatory to avoid misdetection in case of floating outputs in off-state (see Figure 33: Current sense and diagnostics). RPD must be selected in order to ensure VOUT < VOLmin unless pulled up by the external circuitry: V OUT Pull-up_OFF = R PD  I L(off2)f  V OLmin = 2V RPD 22Kis recommended. For proper open-load detection in off-state, the external pull-up resistor must be selected according to the following formula: V OUT R PD  V PU – R PU  R PD  I L(off2)r = ------------------------------------------------------------------------------------- = V OLmax = 4V R PU + R PD Pull-up_ON For the values of VOLmin,VOLmax, IL(off2)r and IL(off2)f see Table 10: Open-load detection (8 V < VCC < 18 V; VDE = 5 V). DocID027937 Rev 3 25/35 34 Application information 3.4 VND5E004C30 Maximum demagnetization energy (VCC = 13.5 V) Figure 34. Maximum turn-off current versus inductance  " # $ , $      / P+ ("1($'5 A: Tjstart = 150 °C single pulse B: Tjstart = 100 °C repetitive pulse C: Tjstart = 125 °C repetitive pulse 9,1,/ 'HPDJQHWL]DWLRQ 'HPDJQHWL]DWLRQ 'HPDJQHWL]DWLRQ W *$3*&)7 1. Values are generated with RL = 0  In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves A and B. 26/35 DocID027937 Rev 3 VND5E004C30 Package and PC board thermal data 4 Package and PC board thermal data 4.1 MultiPowerSO-30 thermal data Figure 35. MultiPowerSO-30 PC board 1. Layout condition of Rth and Zth measurements (PCB: double layer, thermal vias, FR4 area = 58 mm x 58 mm, PCB thickness = 2 mm, Cu thickness = 70 µm (front and back side), copper areas: from minimum pad layout to 16 cm2). Figure 36. Rthj-amb vs PCB copper area in open box free air condition (one channel ON) RTHj_amb(°C/W) 60 55 50 45 40 35 0 1 2 3 4 5 PCB Cu heatsink area (cm^2) DocID027937 Rev 3 27/35 34 Package and PC board thermal data VND5E004C30 Figure 37. MultiPowerSO-30 thermal impedance junction ambient single pulse (one channel ON) =7+ ƒ&:     )RRWSULQW FP            7LPH V      *$3*&)7 Figure 38. Thermal fitting model of a double channel HSD in MultiPowerSO-30 1. The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded protection functions (power limitation or thermal cycling during thermal shutdown) are not triggered. Equation 1: Pulse calculation formula Z TH = R TH   + Z THtp  1 –   where  = t p  T 28/35 DocID027937 Rev 3 VND5E004C30 Package and PC board thermal data Table 15. Thermal parameters for MultiPowerSO-30 Area/island (cm2) Footprint R1 (°C/W) 0.05 R2 (°C/W) 0.3 R3 (°C/W) 0.5 R4 (°C/W) 1.3 R5 (°C/W) 14 R6 (°C/W) 44.7 R7 (°C/W) 0.05 R8 (°C/W) 0.3 C1 (W.s/°C) 0.005 C2 (W.s/°C) 0.008 C3 (W.s/°C) 0.01 C4 (W.s/°C) 0.3 C5 (W.s/°C) 0.6 C6 (W.s/°C) 5 C7 (W.s/°C) 0.005 C8 (W.s/°C) 0.008 DocID027937 Rev 3 4 23.7 11 29/35 34 Package information 5 VND5E004C30 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 5.1 MultiPowerSO-30 package information Figure 39. MultiPowerSO-30 package outline *$3*06 Table 16. MultiPowerSO-30 mechanical data Millimeters Symbol Min. Typ. A 30/35 Max. 2.35 A2 1.85 2.25 A3 0 0.1 B 0.42 0.58 C 0.23 0.32 D 17.1 E 18.85 E1 15.9 DocID027937 Rev 3 17.2 17.3 19.15 16 16.1 VND5E004C30 Package information Table 16. MultiPowerSO-30 mechanical data (continued) Millimeters Symbol Min. “e” Typ. 1 F6 14.3 F7 5.45 F8 0.73 L 0.8 N S Max. 1.15 10 Deg 0 Deg DocID027937 Rev 3 7 Deg 31/35 34 Package information 5.2 VND5E004C30 MultiPowerSO-30 packing information The devices are packed in tape and reel shipments (see Table 17: Device summary on page 33). Figure 40. MultiPowerSO-30 tape and reel shipment (suffix “TR”) Reel dimension Dimension Base Q.ty Bulk Q.ty A (max) B (min) C (± 0.2) D (min) G (+ 2 / -0) N (min) T (max) mm 1000 1000 330 1.5 13 20.2 32 100 38.4 Tape dimensions According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Description Dimension mm Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 (± 0.1) P D (± 0.1/-0) D1 (min) F (± 0.1) K (max) P1 (± 0.1) 32 4 24 1.5 2 14.2 2.2 2 End Start Top cover tape No components Components No components 500 mm min 500 mm min Empty components pockets User direction of feed 32/35 DocID027937 Rev 3 VND5E004C30 6 Order codes Order codes Table 17. Device summary Order codes Package Tape and reel MultiPowerSO-30 VND5E004C30TR-E DocID027937 Rev 3 33/35 34 Revision history 7 VND5E004C30 Revision history Table 18. Document revision history Date Revision 09-Jun-2015 1 Initial release. 02-Nov-2015 2 Updated Table 17: Device summary 3 – – – – 11-Jan-2017 34/35 Changes Removed all information relative to tube packing of the product Modified Section 5: Package information. Added AEC-Q100 qualified in the Features section Minor text edits throughout the document DocID027937 Rev 3 VND5E004C30 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2017 STMicroelectronics – All rights reserved DocID027937 Rev 3 35/35 35
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