VND810
Double channel high-side driver
Features
Type
RDS(on)
IOUT
VCC
VND810
160mΩ(1)
3.5A(1)
36V
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1. Per each channel.
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SO-16
■
CMOS compatible inputs
■
Open Drain status outputs
■
On-state open load detection
Description
■
Off-state open load detection
■
Shorted load protection
■
Undervoltage and overvoltage shutdown
■
Loss of ground protection
The VND810 is a double channel high-side driver
designed in| STMicroelectronics VIPower M0-3
Technology. The VND810 is intended for driving
any type of multiple load with one side connected
to ground.
■
Very low standby current
■
Reverse battery protection(a)
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a. See Application schematic on page 16
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The Active VCC pin voltage clamp protects the
device against low energy spikes (see ISO7637
transient compatibility table). Active current
limitation combined with thermal shutdown and
automatic restart protects the device against
overload. The device detects the open load
condition in both the on and off-state.
In the off-state the device detects if the output is
shorted to VCC. The device automatically turns off
in the case where the ground pin becomes
disconnected.
O
Table 1.
Device summary
Order codes
Package
SO-16
December 2008
Tube
Tape and reel
VND810
VND81013TR
Rev 3
1/27
www.st.com
27
Contents
VND810
Contents
1
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
2.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1
4
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3.1.1
Solution 1: a resistor in the ground line (RGND only) . . . . . . . . . . . . . . 16
3.1.2
Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . 17
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Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.3
MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.4
Open load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.5
Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . . 19
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Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5
SO-16 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
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Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
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2/27
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GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 16
3.2
4.1
6
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5.1
ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.2
SO-16 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
VND810
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Thermal data (per island) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Power output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
VCC - output diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Switching (VCC = 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Open load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
SO-16 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
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3/27
List of figures
VND810
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
ILIM vs TCASE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
On-state resistance vs TCASE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Open load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Open load off-state voltage detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Open load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
SO-16 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Rthj-amb Vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 20
Thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Thermal fitting model of a quad channel HSD in SO-28 . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
SO-16 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
SO-16 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
SO-16 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
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4/27
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VND810
1
Block diagram and pin description
Block diagram and pin description
Figure 1.
Block diagram
Vcc
Vcc
CLAMP
OVERVOLTAGE
UNDERVOLTAGE
CLAMP 1
GND
OUTPUT1
INPUT1
DRIVER 1
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CLAMP 2
STATUS1
CURRENT LIMITER 1
DRIVER 2
LOGIC
OUTPUT2
OVERTEMP. 1
OPEN LOAD ON 1
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CURRENT LIMITER 2
INPUT2
OPEN LOAD OFF 1
OPEN LOAD ON 2
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STATUS2
OPEN LOAD OFF 2
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OVERTEMP. 2
Figure 2.
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Configuration diagram (top view)
16
VCC
GND
OUTPUT 1
INPUT 1
OUTPUT 1
STATUS 1
STATUS 2
OUTPUT 2
OUTPUT 2
VCC
INPUT 2
8
VCC
Table 2.
VCC
9
VCC
Suggested connections for unused and not connected pins
Connection / pin
Status
N.C.
Output
Input
Floating
X
X
X
X
To ground
X
Through 10KΩ
resistor
5/27
Electrical specifications
VND810
2
Electrical specifications
2.1
Absolute maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality document.
Table 3.
Symbol
VCC
Parameter
Reverse DC supply voltage
- IGND
DC reverse ground pin current
- IOUT
IIN
du
41
- 200
mA
Internally limited
A
-6
A
+/- 10
mA
+/- 10
mA
4000
4000
5000
5000
V
V
V
V
Maximum switching energy
(L = 1.5mH; RL = 0Ω; Vbat = 13.5V; Tjstart = 150ºC; IL = 5A)
26
mJ
Power dissipation (per island) at Tlead = 25°C
8.3
W
Internally limited
°C
ol
Reverse DC output current
DC input current
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DC output current
Electrostatic discharge (human body model: R=1.5KΩ;
C = 100pF)
- INPUT
- STATUS
- OUTPUT
- VCC
Ptot
Tj
Junction operating temperature
Tc
Case operating temperature
- 40 to 150
Storage temperature
- 55 to 150
Tstg
V
V
DC Status current
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Unit
- 0.3
ISTAT
EMAX
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Value
DC supply voltage
- VCC
IOUT
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Absolute maximum ratings
°C
VND810
2.2
Electrical specifications
Thermal data
Table 4.
Thermal data (per island)
Symbol
Parameter
Rthj-lead
Thermal resistance junction-lead
Rthj-amb
Thermal resistance junction-ambient
(one chip ON)
Value
Unit
15
°C/W
77(1)
57(2)
°C/W
1. When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35 µm thick) connected
to all VCC pins. Horizontal mounting and no artificial air flow.
2. When mounted on a standard single-sided FR-4 board with 4cm2 of Cu (at least 35 µm thick) connected to
all VCC pins. Horizontal mounting and no artificial air flow.
2.3
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Electrical characteristics
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Values specified in this section are for 8V < VCC < 36V; -40°C < Tj < 150°C, unless
otherwise stated.
Figure 3.
Current and voltage conventions
IIN1
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ISTAT1
VSTAT1
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Note:
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IIN2
IOUT1
VOUT1
INPUT 2
IOUT2
VIN2 ISTAT2
VSTAT2
VCC
OUTPUT 1
STATUS 1
OUTPUT 2
STATUS 2
VF1 (*)
VCC
INPUT 1
VIN1
IS
VOUT2
GND
IGND
VFn = VCCn - VOUTn during reverse battery condition.
7/27
Electrical specifications
Table 5.
VND810
Power output
Symbol
Parameter
VCC
Operating supply
voltage
VUSD
Test conditions
Min.
5.5
13
36
V
Undervoltage shutdown
3
4
5.5
V
VOV
Overvoltage shutdown
36
RON
On-state resistance
IS
160
320
mΩ
mΩ
40
µA
12
25
µA
5
7
mA
0
50
µA
-75
0
µA
VIN = VOUT = 0V; VCC = 13V;
Tj = 125°C
5
µA
VIN = VOUT = 0V; VCC = 13V;
Tj =25°C
3
µA
12
)
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Off-state; VCC = 13V;
VIN = VOUT = 0V;
Tj = 25°C
Supply current
Off-state output current VIN = VOUT = 0V
IL(off2)
Off-state output current VIN = 0V; VOUT = 3.5V
IL(off3)
Off-state output current
IL(off4)
Off-state output current
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Min.
Typ.
Max.
Unit
Shutdown temperature
150
175
200
°C
TR
Reset temperature
135
Thyst
Thermal hysteresis
7
tSDL
Status delay in overload
conditions
Ilim
Current limitation
let
Vdemag
8/27
Parameter
Test conditions
P
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TTSD
Note:
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Protections
Symbol
O
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IL(off1)
)
(s
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On-state; VCC = 13V; VIN = 5V;
IOUT = 0A
Table 6.
V
IOUT = 1A; Tj = 25°C
IOUT = 1A; VCC > 8V
Off-state; VCC = 13V;
VIN = VOUT = 0V
o
s
b
Typ. Max. Unit
Turn-off output clamp
voltage
°C
15
Tj > TTSD
VCC = 13V
5.5V < VCC < 36V
IOUT = 1A; L = 6mH
3.5
5
°C
20
µs
7.5
7.5
A
A
VCC - VCC - VCC 41
48
55
V
To ensure long term reliability under heavy overload or short circuit conditions, protection
and related diagnostic signals must be used together with a proper software strategy. If the
device is subjected to abnormal conditions, this software must limit the duration and number
of activation cycles.
VND810
Electrical specifications
Table 7.
VCC - output diode
Symbol
Parameter
Test conditions
VF
Forward on voltage
- IOUT = 0.5A; Tj = 150°C
Table 8.
Min.
Parameter
Test conditions
Min.
Typ.
td(on)
Turn-on delay time
RL = 13Ω from VIN rising edge
to VOUT = 1.3V (see Figure 5)
30
td(off)
Turn-off delay time
RL = 13Ω from VIN falling edge
to VOUT = 11.7V
(see Figure 5)
30
RL = 13Ω from VOUT = 1.3V to
dVOUT/dt(on) Turn-on voltage slope
VOUT = 10.4V (see Figure 5)
dVOUT/dt(off) Turn-off voltage slope
Table 9.
Input low level
IIL
Low level input current
VIH
Input high level
IIH
High level input current
VI(hyst)
Input hysteresis voltage
Symbol
)
(s
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od
Input clamp voltage
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Parameter
VIL
Table 10.
RL = 13Ω from VOUT = 11.7V
to VOUT = 1.3V (see Figure 5)
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Logic inputs
Symbol
VICL
Max.
Unit
0.6
V
Switching (VCC = 13V; Tj = 25°C)
Symbol
o
s
b
Typ.
Test conditions
s
b
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Max. Unit
µs
)
s
(
ct
µs
See
Figure 10
V/µs
See
Figure 12
V/µs
u
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Pr
Min.
VIN = 1.25V
Typ.
Max.
Unit
1.25
V
1
µA
3.25
V
VIN = 3.25V
10
0.5
IIN = 1mA
IIN = -1mA
µA
V
6
6.8
- 0.7
8
V
V
Status pin
Parameter
Test conditions
Min.
Typ.
Max.
Unit
VSTAT
Status low output voltage
ISTAT = 1.6mA
0.5
V
ILSTAT
Status leakage current
Normal operation; VSTAT = 5V
10
µA
CSTAT
Status pin Input capacitance Normal operation; VSTAT = 5V
100
pF
VSCL
Status clamp voltage
8
V
V
ISTAT = 1mA
ISTAT = - 1mA
6
6.8
- 0.7
9/27
Electrical specifications
Table 11.
VND810
Open load detection
Symbol
Parameter
Test conditions
Min.
IOL
Open load on-state detection threshold
VIN = 5V
20
Open load on-state detection delay
IOUT = 0A
tDOL(on)
VOL
Open load off-state voltage detection
threshold
tDOL(off)
Open load detection delay at turn-off
Figure 4.
VIN = 0V
2.5
Tj > TTSD
mA
200
µs
3.5
V
1000
µs
)
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VINn
VSTATn
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e
VSTATn
tDOL(off)
Figure 5.
let
o
s
b
tDOL(on)
tSDL
tSDL
O
)
Switching characteristics
s
(
t
c
VOUT
du
90%
80%
o
r
P
dVOUT/dt(off)
dVOUT/dt(on)
tr
10%
tf
t
ISENSE
90%
O
INPUT
t
tDSENSE
td(on)
td(off)
t
10/27
80
OVER TEMP STATUS TIMING
VINn
o
s
b
40
Unit
Status timings
OPEN LOAD STATUS TIMING (with external pull-up)
IOUT < IOL
VOUT > VOL
e
t
e
l
1.5
Typ. Max.
VND810
Electrical specifications
Table 12.
Truth table
Conditions
Input
Output
Status
Normal operation
L
H
L
H
H
H
Current limitation
L
H
H
L
X
X
H
(Tj < TTSD) H
(Tj > TTSD) L
Overtemperature
L
H
L
L
H
L
Undervoltage
L
H
L
L
X
X
Overvoltage
L
H
L
L
Output voltage > VOL
L
H
H
H
Output current < IOL
L
H
L
H
Table 13.
)-
7637/1
Test pulse
I
1
2
e
t
e
ol
3b
s
b
O
t
e
l
o
L
H
H
L
s
b
O
Test level
II
III
IV
Delays and impedance
- 25V(1)
- 50V(1)
- 75V(1)
- 100V(1)
2ms, 10Ω
(1)
+
50V(1)
75V(1)
+
100V(1)
0.2ms, 10Ω
-
50V(1)
-
150V(1)
0.1µs, 50Ω
(1)
0.1µs, 50Ω
du
o
r
P
3a
s
(
t
c
u
d
o
r
P
e
Electrical transient requirements
ISO T/R
)
s
(
ct
H
H
+ 25V
-
25V(1)
+ 25V
(1)
(1)
+ 50V
+
-
100V(1)
(1)
+ 75V
+ 100V
4
- 4V(1)
- 5V(1)
- 6V(1)
- 7V(1)
5
26.5V(1)
46.5V(2)
66.5V(2)
86.5V(2)
+
+
+
+
100ms, 0.01Ω
400ms, 2Ω
1. All functions of the device are performed as designed after exposure to disturbance.
2. One or more functions of the device is not performed as designed after exposure and cannot be returned to
proper operation without replacing the device.
11/27
Electrical specifications
Figure 6.
VND810
Waveforms
NORMAL OPERATION
INPUTn
LOAD VOLTAGEn
STATUSn
UNDERVOLTAGE
VUSDhyst
VCC
VUSD
)
s
(
ct
INPUTn
LOAD VOLTAGEn
STATUS
r
P
e
OVERVOLTAGE
VCC VOV
t
e
l
o
VCC
INPUTn
LOAD VOLTAGEn
STATUSn
)
(s
t
c
u
INPUTn
od
LOAD VOLTAGEn
r
P
e
STATUSn
t
e
l
o
bs
O
OPEN LOAD with external pull-up
VOUT > VOL
VOL
OPEN LOAD without external pull-up
LOAD VOLTAGEn
STATUSn
Tj
INPUTn
LOAD CURRENTn
12/27
s
b
O
INPUTn
STATUSn
u
d
o
undefined
TTSD
TR
OVERTEMPERATURE
VND810
Electrical specifications
2.4
Electrical characteristics curves
Figure 7.
Off-state output current
Figure 8.
IL(off1) (uA)
High level input current
Iih (uA)
2.5
5
2.25
4.5
Off state
Vcc=36V
Vin=Vout=0V
2
1.75
Vin=3.25V
4
3.5
1.5
3
1.25
2.5
1
2
0.75
1.5
0.5
1
0.25
0.5
0
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C )
Figure 9.
e
t
e
ol
1000
7.8
900
bs
Iin=1mA
7.4
7.2
7
(s)
6.8
t
c
u
6.4
6
-50
-25
0
od
Pr
25
50
75
100
175
125
150
-O
150
175
150
175
700
600
500
400
300
200
100
0
-50
175
-25
0
25
50
75
100
125
Tc (ºC )
Figure 11. Overvoltage shutdown
Figure 12. Turn-off voltage slope
o
s
b
O
150
Vcc=13V
Rl=13Ohm
800
Tc (°C )
e
t
e
l
125
o
r
P
dVout/dt(on) (V/ms)
8
6.6
du
100
Figure 10. Turn-on voltage slope
Vicl (V)
6.2
75
Tc (°C )
Input clamp voltage
7.6
50
)
s
(
ct
Vov (V)
dVout/dt(off) (V/ms)
50
500
48
450
46
400
44
350
42
300
40
250
38
200
36
150
34
100
32
50
30
Vcc=13V
Rl=13Ohm
0
-50
-25
0
25
50
75
Tc (°C )
100
125
150
175
-50
-25
0
25
50
75
100
125
Tc (ºC )
13/27
Electrical specifications
VND810
Figure 13. ILIM vs Tcase
Figure 14. On-state resistance vs VCC
Ilim (A)
R on (mOhm)
10
300
275
9
Vcc=13V
8
Iout=0.5A
250
7
225
6
200
5
175
4
150
3
125
2
100
1
75
0
Tc=150°C
Tc=25°C
Tc=- 40°C
-25
0
25
50
75
100
125
150
175
5
10
15
20
Tc (°C )
30
35
40
u
d
o
Figure 16. Input hysteresis voltage
Vih (V)
Vhyst (V)
3.6
1.5
r
P
e
1.4
3.4
t
e
l
o
1.3
3.2
1.2
3
1.1
bs
2.8
2.6
2.4
)
s
(
t
2.2
2
-50
-25
0
25
50
c
u
d
75
Tc (°C )
100
125
150
175
o
r
P
Figure 17. On-state resistance vs Tcase
Ron (mOhm)
e
t
e
ol
400
0.8
0.7
0.6
0.5
-50
-25
0
25
50
75
100
125
150
175
Tc (°C )
Figure 18. Input low level
Vil (V)
2.4
Iout=0.5A
Vcc=8V; 13V & 36V
300
-O
1
0.9
2.6
350
2.2
250
2
200
1.8
150
1.6
100
1.4
50
1.2
1
0
-50
-25
0
25
50
75
Tc (°C )
14/27
25
Vcc (V)
Figure 15. Input high level
s
b
O
)
s
(
ct
50
-50
100
125
150
175
-50
-25
0
25
50
75
Tc (°C )
100
125
150
175
VND810
Electrical specifications
Figure 19. Status leakage current
Figure 20. Status low output voltage
Ilstat (uA)
Vstat (V)
0.05
0.8
0.7
Istat=1.6mA
0.04
0.6
Vstat=5V
0.5
0.03
0.4
0.02
0.3
0.2
0.01
0.1
0
)
s
(
ct
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C )
75
100
125
Tc (°C )
Figure 21. Status clamp voltage
150
175
u
d
o
Figure 22. Open load on-state detection
threshold
Vscl (V)
r
P
e
Iol (mA)
8
150
t
e
l
o
7.8
140
Istat=1mA
7.6
50
Vcc=13V
Vin=5V
130
7.4
120
bs
7.2
110
7
6.8
)
s
(
t
6.6
6.4
6.2
uc
6
-50
-25
0
25
50
75
100
d
o
r
Tc (°C )
125
150
175
-O
100
90
80
70
60
50
-50
-25
0
25
50
75
100
125
150
175
Tc (°C )
P
e
Figure 23. Open load off-state voltage
detection threshold
t
e
l
o
Vol (V)
O
bs
5
4.5
4
Vin=0V
3.5
3
2.5
2
1.5
1
0.5
0
-50
-25
0
25
50
75
100
125
150
175
Tc (°C )
15/27
Application information
3
VND810
Application information
Figure 24. Application schematic
+5V +5V
+5V
VCC
Rprot
STATUS1
Dld
µC
Rprot
)
s
(
ct
INPUT1
OUTPUT1
Rprot
STATUS2
Rprot
INPUT2
u
d
o
r
P
e
t
e
l
o
GND
)
(s
s
b
O
RGND
VGND
OUTPUT2
DGND
t
c
u
d
o
r
3.1
GND protection network against reverse battery
P
e
This section provides two solutions for implementing a ground protection network against
reverse battery.
bs
t
e
l
o
3.1.1
O
Solution 1: a resistor in the ground line (RGND only)
This can be used with any type of load.
The following show how to dimension the RGND resistor:
1.
RGND ≤600mV / 2 (IS(on)max)
2.
RGND ≥ ( - VCC) / ( - IGND)
where - IGND is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device datasheet.
Power dissipation in RGND (when VCC < 0 during reverse battery situations) is:
PD = ( - VCC)2/ RGND
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the
maximum on-state currents of the different devices.
16/27
VND810
Application information
Please note that, if the microprocessor ground is not shared by the device ground, then the
RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output
values. This shift will vary depending on how many devices are ON in the case of several
high-side drivers sharing the same RGND .
If the calculated power dissipation requires the use of a large resistor, or several devices
have to share the same resistor, then ST suggests using solution 2 below.
3.1.2
Solution 2: a diode (DGND) in the ground line
A resistor (RGND = 1kΩ) should be inserted in parallel to DGND if the device will be driving
an inductive load. This small signal diode can be safely shared amongst several different
HSD. Also in this case, the presence of the ground network will produce a shift (j600mV) in
the input threshold and the status output values if the microprocessor ground is not common
with the device ground. This shift will not vary if more than one HSD shares the same
diode/resistor network. Series resistor in INPUT and STATUS lines are also required to
prevent that, during battery voltage transient, the current exceeds the Absolute Maximum
Rating. Safest configuration for unused INPUT and STATUS pin is to leave them
unconnected.
)
s
(
ct
u
d
o
3.2
r
P
e
t
e
l
o
Load dump protection
Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
VCC maximum DC rating. The same applies if the device is subject to transients on the VCC
line that are greater than those shown in the ISO T/R 7637/1 table.
)
(s
3.3
s
b
O
MCU I/O protection
t
c
u
If a ground protection network is used and negative transients are present on the VCC line,
the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to
prevent the µC I/O pins from latching up.
d
o
r
P
e
The value of these resistors is a compromise between the leakage current of µC and the
current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC
I/Os:
s
b
O
t
e
l
o
- VCCpeak / Ilatchup ≤Rprot ≤(VOHµC - VIH - VGND) / IIHmax
Example
For the following conditions:
VCCpeak = - 100V
Ilatchup ≥ 20mA
VOHµC ≥ 4.5V
5kΩ ≤Rprot ≤65kΩ.
Recommended values are:
Rprot = 10kΩ
17/27
Application information
3.4
VND810
Open load detection in off-state
Off-state open load detection requires an external pull-up resistor (RPU) connected between
OUTPUT pin and a positive supply voltage (VPU) like the +5V line used to supply the
microprocessor.
The external resistor has to be selected according to the following requirements:
1) no false open load indication when load is connected: in this case we have to avoid VOUT
to be higher than VOlmin; this results in the following condition
VOUT = (VPU / (RL + RPU))RL < VOlmin.
2) no misdetection when load is disconnected: in this case the VOUT has to be higher than
VOLmax; this results in the following condition RPU < (VPU - VOLmax) / IL(off2).
)
s
(
ct
Because Is(OFF) may significantly increase if Vout is pulled high (up to several mA), the pullup resistor RPU should be connected to a supply that is switched OFF when the module is in
standby.
u
d
o
Figure 25. Open load detection in off-state
r
P
e
V batt.
t
e
l
o
V CC
INP UT
od
r
P
e
t
e
l
o
s
b
O
18/27
(s)
t
c
u
S TATUS
bs
DRIVER
+
LOGIC
VPU
-O
R PU
IL(off2)
OUT
+
R
V OL
G ROUND
RL
VND810
3.5
Application information
Maximum demagnetization energy (VCC = 13.5V)
Figure 26. Maximum turn-off current versus load inductance
ILM A X (A )
10
u
d
o
A
B
r
P
e
C
t
e
l
o
1
0,1
1
s
b
O
10
)
s
(
ct
100
L(mH)
)
(s
t
c
u
A = single pulse at TJstart = 150ºC
B= repetitive pulse at TJstart = 100ºC
d
o
r
C= repetitive pulse at TJstart = 125ºC
P
e
t
e
l
o
bs
VIN, IL
Demagnetization
Demagnetization
Demagnetization
O
t
Note:
Values are generated with RL = 0Ω.
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse
must not exceed the temperature specified above for curves B and C.
19/27
Package and PCB thermal data
VND810
4
Package and PCB thermal data
4.1
SO-16 thermal data
Figure 27. SO-16 PC board
)
s
(
ct
u
d
o
r
P
e
Note:
Layout condition of Rth and Zth measurements (PCB FR4 area = 58mm x 58mm, PCB
thickness = 1.6mm, Cu thickness = 35µm, Copper areas: 0.26 cm2, 4cm2).
t
e
l
o
Figure 28. Rthj-amb Vs PCB copper area in open box free air condition
RTH j-amb
(°C/W)
)
(s
85
80
s
b
O
t
c
u
75
d
o
r
70
P
e
t
e
l
o
bs
O
65
60
55
50
45
40
0
1
2
3
PCB Cu heats ink area (cm^2)
20/27
4
5
VND810
Package and PCB thermal data
Figure 29. Thermal impedance junction ambient single pulse
ZTH (°C/W)
1000
100
2
0.26 cm
4 cm
2
10
)
s
(
ct
1
u
d
o
0.1
t
e
l
o
0.01
0.0001
0.001
r
P
e
0.01
0.1
1
Time (s)
)
(s
10
s
b
O
100
1000
Equation 1: pulse calculation formula
t
c
u
Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ)
where
δ = tp ⁄ T
d
o
r
P
e
Figure 30. Thermal fitting model of a quad channel HSD in SO-16
s
b
O
t
e
l
o
Tj_1
Pd1
Tj_2
C1
C2
C3
C4
C5
C6
R1
R2
R3
R4
R5
R6
C1
C2
R1
R2
Pd2
T_amb
21/27
Package and PCB thermal data
Table 14.
VND810
Thermal parameters
Area / island (cm2)
Footprint
R1 (°C/W)
0.35
R2 (°C/W)
1.8
R3 (°C/W)
4.5
R4 (°C/W)
10
R5 (°C/W)
16
R6 (°C/W)
48
C1 (W.s/°C)
0.0001
C2 (W.s/°C)
7E-04
C3 (W.s/°C)
6E-03
C4 (W.s/°C)
0.2
C5 (W.s/°C)
0.7
2
t
e
l
o
t
c
u
d
o
r
P
e
t
e
l
o
s
b
O
22/27
25
s
b
O
)
s
(
ct
u
d
o
r
P
e
C6 (W.s/°C)
)
(s
6
4
VND810
Package and packing information
5
Package and packing information
5.1
ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Figure 31. SO-16 package dimensions
)
s
(
ct
u
d
o
r
P
e
t
e
l
o
)
(s
s
b
O
t
c
u
d
o
r
P
e
t
e
l
o
s
b
O
23/27
Package and packing information
Table 15.
VND810
SO-16 mechanical data
mm.
DIM.
Min.
Typ.
Max.
A
1.75
a1
0.1
0.2
a2
1.65
b
0.35
0.46
b1
0.19
0.25
C
0.5
c1
45° (typ.)
D
9.8
E
5.8
e
t
e
ol
e
1.27
e3
F
3.8
G
4.6
(s)
ct
du
S
24/27
bs
-O
10
6.2
o
r
P
4.0
5.3
0.5
M
s
b
O
Pr
u
d
o
8.89
L
e
t
e
ol
)
s
(
ct
1.27
0.62
8° (max.)
VND810
5.2
Package and packing information
SO-16 packing information
Figure 32. SO-16 tube shipment (no suffix)
B
Base Q.ty
Bulk Q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
C
A
50
1000
532
3.2
6
0.6
All dimensions are in mm.
)
s
(
ct
Figure 33. SO-16 tape and reel shipment (suffix “TR”)
u
d
o
Reel dimensions
r
P
e
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
t
e
l
o
)
(s
t
c
u
Tape dimensions
s
b
O
1000
1000
330
1.5
13
20.2
16.4
60
22.4
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
d
o
r
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
P
e
s
b
O
t
e
l
o
W
P0 (± 0.1)
P
D (± 0.1/-0)
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
All dimensions are in mm.
16
4
8
1.5
1.5
7.5
6.5
2
End
Start
Top
cover
tape
No components
Components
No components
500mm min
Empty components pockets
saled with cover tape.
500mm min
User direction of feed
25/27
Revision history
6
VND810
Revision history
Table 16.
Document revision history
Date
Revision
09-Sep-2004
1
Initial release.
2
Current and voltage convention update (page 2).
Configuration diagram (top view) & suggested connections for unused
and n.c. pins insertion (page 2).
4 cm2 Cu condition insertion in thermal data table (page 3).
VCC - output diode section update (page 4).
Protections note insertion (page 4).
Revision history table insertion (page 18).
Disclaimers update (page 19).
3
Document reformatted and restructured.
Added contents, list of tables and figures.
Added ECOPACK® packages information.
03-May-2006
04-Dec-2008
Changes
r
P
e
t
e
l
o
)
(s
t
c
u
d
o
r
P
e
t
e
l
o
s
b
O
26/27
u
d
o
s
b
O
)
s
(
ct
VND810
)
s
(
ct
Please Read Carefully:
u
d
o
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
time, without notice.
r
P
e
All ST products are sold pursuant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
t
e
l
o
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products
or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such
third party products or services or any intellectual property contained therein.
)
(s
s
b
O
UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
t
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Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
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