VND830E-E
Double channel high-side driver
Features
Type
RDS(on)
IOUT
VCC
VND830E-E
65 mΩ(1)
9.5 A(1)
36 V
1. Per each channel.
■
Output current: 9.5 A
■
CMOS compatible inputs
■
On-state open-load detection
■
Off-state open-load detection
■
Output stuck to VCC detection
■
Open drain status outputs
■
Undervoltage shutdown
■
Overvoltage clamp
■
Thermal shutdown
■
Current and power limitation
■
Very low standby current
■
Protection against loss of ground and loss of
VCC
■
Reverse battery protection
■
Very low electromagnetic susceptibility
■
Optimized electromagnetic emission
Description
The VND830E-E is a monolithic device made by
using STMicroelectronics™ VIPower™ M0-3
technology. It is intended for driving resistive or
inductive loads with one side connected to
ground.
Active VCC pin voltage clamp protects the device
against low energy spikes (see ISO7637 transient
compatibility table).
The device detects open-load condition both in
on-state and off-state. Output shorted to VCC is
detected in the off-state.
Output current limitation protects the device in
overload condition. In case of long duration
overload, the device limits the dissipated power to
safe level up to thermal shutdown intervention.
Thermal shutdown with automatic restart allows
the device to recover normal operation as soon as
fault condition disappears.
Table 1.
Device summary
Order codes
Package
SO-16L
September 2013
Tube
Tape and reel
VND830E-E
VND830ETR-E
Doc ID 17461 Rev 2
1/26
www.st.com
1
VND830E-E
Contents
Contents
1
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
2.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1
4
Solution 1: a resistor in the ground line (RGND only) . . . . . . . . . . . . . . 16
3.1.2
Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . 17
Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.3
MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.4
Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.5
Maximum demagnetization energy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
SO-16L thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.1
6
3.1.1
3.2
4.1
5
GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 16
ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Doc ID 17461 Rev 2
2/26
List of tables
VND830E-E
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
3/26
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Thermal data (per island) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Power outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Switching (VCC = 13 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
VCC - output diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Electrical transient requirements on VCC pin (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Electrical transient requirements on VCC pin (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Electrical transient requirements on VCC pin (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
SO-16L mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Doc ID 17461 Rev 2
VND830E-E
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Open-load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Open-load off-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
SO-16L PC board(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 20
SO-16 L thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . 21
Thermal fitting model of a quad channel HSD in SO-16L . . . . . . . . . . . . . . . . . . . . . . . . . . 21
SO-16L package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Doc ID 17461 Rev 2
4/26
Block diagram and pin description
1
VND830E-E
Block diagram and pin description
Figure 1.
Block diagram
Vcc
Vcc
CLAMP
OVERVOLTAGE
UNDERVOLTAGE
CLAMP 1
GND
OUTPUT1
INPUT1
DRIVER 1
CLAMP 2
STATUS1
CURRENT LIMITER 1
DRIVER 2
LOGIC
OUTPUT2
OVERTEMP. 1
OPEN-LOAD ON 1
CURRENT LIMITER 2
INPUT2
OPEN-LOAD OFF 1
OPEN-LOAD ON 2
STATUS2
OPEN-LOAD OFF 2
OVERTEMP. 2
Figure 2.
Configuration diagram (top view)
1
VCC
5/26
VCC
N.C.
OUTPUT 1
GND
OUTPUT 1
INPUT 1
OUTPUT 1
STATUS 1
STATUS 2
OUTPUT 2
OUTPUT 2
INPUT 2
OUTPUT 2
8
VCC
Table 2.
16
9
VCC
Suggested connections for unused and not connected pins
Connection / pin
Status
N.C.
Output
Input
Floating
X
X
X
X
To ground
-
X
-
Through 10 KΩ
resistor
Doc ID 17461 Rev 2
VND830E-E
Electrical specifications
2
Electrical specifications
2.1
Absolute maximum ratings
Stressing the device above the rating listed in Table 3 may cause permanent damage to the
device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the operating sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect device
reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality
document.
Table 3.
Absolute maximum ratings
Symbol
VCC
Parameter
DC supply voltage
Value
Unit
41
V
- VCC
Reverse DC supply voltage
- 0.3
V
- IGND
DC reverse ground pin current
- 200
mA
Internally limited
A
-6
A
IOUT
- IOUT
DC output current
Reverse DC output current
IIN
DC input current
+/- 10
mA
ISTAT
DC status current
+/- 10
mA
VESD
Electrostatic discharge (Human Body Model: R = 1.5 KΩ;
C = 100 pF)
- INPUT
- STATUS
- OUTPUT
- VCC
4000
4000
5000
5000
V
V
V
V
EMAX
Maximum switching energy
(L = 0.45 mH; RL = 0 Ω; Vbat = 13.5 V; Tjstart = 150 °C;
IL = 13.5 A)
57
mJ
Power dissipation TC = 25 °C
8.3
W
Internally limited
°C
Ptot
Tj
Junction operating temperature
Tc
Case operating temperature
- 40 to 150
°C
Storage temperature
- 55 to 150
°C
Tstg
Doc ID 17461 Rev 2
6/26
Electrical specifications
VND830E-E
2.2
Thermal data
Table 4.
Thermal data (per island)
Symbol
Rthj-lead
Rthj-amb
Parameter
Value
Thermal resistance junction-lead
Unit
15
Thermal resistance junction-ambient
65
°C/W
(1)
47
(2)
°C/W
2
1. When mounted on a standard single-sided FR-4 board with 0.5 cm of Cu (at least 35 µm thick) connected to all VCC pins.
Horizontal mounting and no artificial air flow.
2. When mounted on a standard single-sided FR-4 board with 6 cm2 of Cu (at least 35 µm thick) connected to all VCC pins.
Horizontal mounting and no artificial air flow.
2.3
Electrical characteristics
Values specified in this section are for 8 V < VCC < 36 V; -40 °C < Tj < 150 °C, unless
otherwise stated.
(Per each channel)
Figure 3.
Current and voltage conventions
IS
VF1 (1)
IIN1
ISTAT1
VIN1
IOUT1
OUTPUT 1
STATUS 1
VSTAT1
VCC
VCC
INPUT 1
IIN2
VOUT1
INPUT 2
IOUT2
VIN2 ISTAT2
OUTPUT 2
STATUS 2
VSTAT2
VOUT2
GND
IGND
1. VFn = VCCn - VOUTn during reverse battery condition.
Table 5.
7/26
Power outputs
Symbol
Parameter
VCC
Test conditions
Min.
Typ.
Operating supply voltage
5.5
13
36
V
VUSD
Undervoltage shutdown
3
4
5.5
V
VOV
Overvoltage shutdown
36
RON
On-state resistance
IOUT = 2 A; Tj = 25°C
IOUT = 2 A; VCC > 8 V
Doc ID 17461 Rev 2
Max. Unit
V
65
130
mΩ
mΩ
VND830E-E
Electrical specifications
Table 5.
Symbol
IS
Power outputs (continued)
Parameter
Test conditions
Supply current
Min.
Typ.
Max. Unit
Off-state; VCC = 13 V;
VIN = VOUT = 0 V
12
40
µA
Off-state; VCC = 13 V;
VIN = VOUT = 0 V; Tj = 25°C
12
25
µA
On-state; VCC = 13 V;
VIN = 5 V; IOUT = 0 A
5
7
mA
0
50
µA
-75
0
µA
IL(off1)
Off-state output current
VIN = VOUT = 0 V
IL(off2)
Off-state output current
VIN = 0 V; VOUT = 3.5 V
IL(off3)
Off-state output current
VIN = VOUT = 0 V; VCC = 13 V;
Tj = 125°C
5
µA
IL(off4)
Off-state output current
VIN = VOUT = 0 V; VCC = 13 V;
Tj =25°C
3
µA
Table 6.
Symbol
Switching (VCC = 13 V)
Parameter
Test conditions
Min.
Typ.
Max. Unit
td(on)
Turn-on delay time
RL = 6.5 Ω from VIN rising
edge to VOUT = 1.3 V
-
50
-
µs
td(off)
Turn-off delay time
RL = 6.5 Ω from VIN falling
edge to VOUT = 11.7 V
-
50
-
µs
dVOUT/dt(on) Turn-on voltage slope
RL = 6.5 Ω from VOUT = 1.3 V
to VOUT = 10.4 V
-
See
Figure 21
-
V/µs
dVOUT/dt(off) Turn-off voltage slope
RL = 6.5 Ω from VOUT = 11.7 V
to VOUT = 1.3 V
-
See
Figure 22
-
V/µs
Test conditions
Min.
Typ.
Table 7.
Symbol
Logic input
Parameter
VIL
Input low level
IIL
Low level input current
VIH
Input high level
IIH
High level input current
VI(hyst)
Input hysteresis voltage
VICL
Input clamp voltage
VIN = 1.25 V
Max.
Unit
1.25
V
1
µA
3.25
V
VIN = 3.25 V
10
0.5
IIN = 1 mA
IIN = -1 mA
Doc ID 17461 Rev 2
6
µA
V
6.8
-0.7
8
V
V
8/26
Electrical specifications
Table 8.
Symbol
VF
Table 9.
Symbol
VND830E-E
VCC - output diode
Parameter
Test conditions
Forward on voltage
-IOUT = 1.2 A; Tj = 150 °C
Min.
Typ.
Max.
Unit
-
-
0.6
V
Status pin
Parameter
Test conditions
Min. Typ. Max.
Unit
VSTAT
Status low output voltage
ISTAT = 1.6 mA
0.5
V
ILSTAT
Status leakage current
Normal operation; VSTAT = 5 V
10
µA
CSTAT
Status pin Input capacitance
Normal operation; VSTAT = 5 V
100
pF
VSCL
Status clamp voltage
ISTAT = 1 mA
ISTAT = - 1 mA
8
V
V
Table 10.
Protections(1)
Symbol
Typ.
Max.
Unit
Shutdown temperature
150
175
200
°C
TR
Reset temperature
135
Thyst
Thermal hysteresis
7
tSDL
Status delay in overload
conditions
Tj > TTSD
Ilim
Current limitation
VCC = 13 V
5.5 V < VCC < 36 V
Turn-off output clamp
voltage
IOUT = 2 A; L = 6 mH
Vdemag
Test conditions
6.8
- 0.7
Min.
TTSD
Parameter
6
°C
15
°C
20
µs
9.5
13.5
18
18
A
A
VCC-41
VCC-48
VCC-55
V
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
Table 11.
Open-load detection
Symbol
Parameter
IOL
Open-load on-state detection
VIN = 5 V
threshold
tDOL(on)
Open-load on-state detection
IOUT = 0 A
delay
VOL
tDOL(off)
9/26
Test conditions
Open-load off-state voltage
detection threshold
VIN = 0 V
Open-load detection delay at
turn-off
Doc ID 17461 Rev 2
Min.
50
1.5
Typ. Max.
Unit
115
200
mA
200
µs
3.5
V
1000
µs
2.9
VND830E-E
Electrical specifications
Figure 4.
Status timings
OPEN- LOAD STATUS TIMING (with external pull-up)
IOUT < IOL
VOUT > VOL
VINn
OVERTEMP STATUS TIMING
Tj > TTSD
VINn
VSTATn
VSTATn
tSDL
tDOL(off)
tSDL
tDOL(on)
Figure 5.
Switching time waveforms
Table 12.
Truth table
Conditions
Inputn
Outputn
Statusn
Normal operation
L
H
L
H
H
H
Current limitation
L
H
H
L
X
X
Overtemperature
L
H
L
L
H
L
Undervoltage
L
H
L
L
X
X
Doc ID 17461 Rev 2
H
(Tj < TTSD) H
(Tj > TTSD) L
10/26
Electrical specifications
Table 12.
VND830E-E
Truth table (continued)
Conditions
Inputn
Outputn
Statusn
Overvoltage
L
H
L
L
H
H
Output voltage > VOLn
L
H
H
H
L
H
Output current < IOLn
L
H
L
H
H
L
Table 13.
Electrical transient requirements on VCC pin (part 1)
Test levels
ISO T/R
7637/1
test pulse
I
II
III
IV
Delays and impedance
1
-25 V
-50 V
-75 V
-100 V
2 ms, 10 Ω
2
+25 V
+50 V
+75 V
+100 V
0.2 ms, 10 Ω
3a
-25 V
-50 V
-100 V
-150 V
0.1 µs, 50 Ω
3b
+25 V
+50 V
+75 V
+100 V
0.1 µs, 50 Ω
4
-4 V
-5 V
-6 V
-7 V
100 ms, 0.01 Ω
5
+26.5 V
+46.5 V
+66.5 V
+86.5 V
400 ms, 2 Ω
Table 14.
Electrical transient requirements on VCC pin (part 2)
ISO T/R
Test levels results
7637/1
test pulse
I
II
III
IV
1
C
C
C
C
2
C
C
C
C
3a
C
C
C
C
3b
C
C
C
C
4
C
C
C
C
5
C
E
E
E
Table 15.
Electrical transient requirements on VCC pin (part 3)
Class
11/26
Contents
C
All functions of the device are performed as designed after exposure to
disturbance.
E
One or more functions of the device is not performed as designed after
exposure to disturbance and cannot be returned to proper operation without
replacing the device.
Doc ID 17461 Rev 2
VND830E-E
Electrical specifications
Figure 6.
Waveforms
NORMAL OPERATION
INPUTn
OUTPUT VOLTAGEn
STATUSn
UNDERVOLTAGE
VUSDhyst
VCC
VUSD
INPUTn
OUTPUT VOLTAGEn
STATUS
undefined
OVERVOLTAGE
VCC VOV
VCC
INPUTn
OUTPUT VOLTAGEn
STATUSn
OPEN-LOAD with external pull-up
INPUTn
VOUT > VOL
OUTPUT VOLTAGEn
VOL
STATUSn
OPEN-LOAD without external pull-up
INPUTn
OUTPUT VOLTAGEn
STATUSn
Tj
TTSD
TR
OVERTEMPERATURE
INPUTn
OUTPUT CURRENTn
STATUSn
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Electrical specifications
VND830E-E
2.4
Electrical characteristics curves
Figure 7.
Off-state output current
Figure 8.
High level input current
lih (µA)
IL(off1) (µA)
6
0.9
5.5
0.8
Off state
Vcc=13V
Vin=Vout=0V
0.7
5
Vin=3.25V
4.5
0.6
4
0.5
3.5
3
0.4
2.5
0.3
2
0.2
1.5
0.1
1
0
0.5
-50
-25
0
25
50
75
100
125
150
-50
175
-25
0
25
Figure 9.
50
75
100
125
150
175
150
175
Tc (°C)
Tc (°C)
Input clamp voltage
Figure 10. Status leakage current
Vicl (V)
Ilstat (µA)
12
0.2
11
0.195
Iin=1mA
Vstat=5V
10
0.19
9
0.185
8
0.18
7
0.175
6
0.17
5
0.165
4
0.16
3
0.155
2
0.15
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C)
Figure 11.
75
100
125
Tc (°C)
Status low output voltage
Figure 12. Status clamp voltage
Vstat (V)
Vscl (V)
0.8
10
0.7
9
Istat=1.6mA
Istat=1mA
0.6
8
0.5
7
0.4
6
0.3
5
0.2
4
0.1
3
0
2
-50
-25
0
25
50
75
100
125
150
175
-50
Tc (°C)
13/26
50
-25
0
25
50
75
Tc (°C)
Doc ID 17461 Rev 2
100
125
150
175
VND830E-E
Electrical specifications
Figure 13. On-state resistance vs Tcase
Figure 14. On-state resistance vs VCC
Ron (mOhm)
Ron (mOhm)
160
120
140
105
Iout=2A
Vcc=8V; 13V & 36V
120
Tc=150°C
90
100
75
80
60
60
45
40
30
20
15
Tc=25°C
Tc=25°
Tc=-40°C
Iout=2A
0
0
-50
-25
0
25
50
75
100
125
150
175
5
10
15
20
Tc (°C)
25
30
35
40
Vcc (V)
Figure 15. Open-load on-state detection
threshold
Figure 16. Open-load off-state detection
threshold
Vol (V)
Iol (mA)
5
150
4.5
140
Vin=0V
4
Vcc=13V
Vin=5V
130
3.5
120
3
110
2.5
2
100
1.5
90
1
80
0.5
0
70
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
Tc (°C)
Figure 17. Input high level
Figure 18. Input low level
Vih (V)
Vil (V)
3.6
2.6
3.4
2.4
3.2
2.2
3
2
2.8
1.8
2.6
1.6
2.4
1.4
2.2
1.2
2
1
-50
-25
0
25
50
75
100
125
150
175
-50
Tc (°C)
-25
0
25
50
75
100
125
150
175
Tc (°C)
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Electrical specifications
VND830E-E
Figure 19. Input hysteresis voltage
Figure 20. Overvoltage shutdown
Vhyst (V)
Vov (V)
2
70
65
1.75
60
1.5
55
50
1.25
45
1
40
35
0.75
30
0.5
25
20
0.25
15
0
10
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C)
50
75
100
125
150
175
150
175
Tc (°C)
Figure 21. Turn-on voltage slope
Figure 22. Turn-off voltage slope
dVout/dt(on) (Vms)
dVout/dt(off) (Vms)
800
500
700
450
Vcc=13V
Rl=6.5Ohm
600
Vcc=13V
Rl=6.5Ohm
400
350
500
300
400
250
200
300
150
200
100
100
50
0
0
-50
-25
0
25
50
75
100
125
150
-50
175
-25
0
25
Figure 23. ILIM vs Tcase
50
75
100
125
Tc (°C)
Tc (°C)
Figure 24. Undervoltage shutdown
Ilim (A)
Vusd (V)
30
10
9
25
8
Vcc=13V
20
7
6
15
5
10
4
3
5
2
1
0
-50
-25
0
25
50
75
100
125
150
175
-50
15/26
-25
0
25
50
75
Tc (°C)
Tc (°C)
Doc ID 17461 Rev 2
100
125
150
175
VND830E-E
3
Application information
Application information
Figure 25. Application schematic
+5V +5V
+5V
VCC
Rprot
STATUS1
Dld
μC
Rprot
INPUT1
OUTPUT1
Rprot
STATUS2
Rprot
INPUT2
OUTPUT2
GND
RGND
VGND
3.1
DGND
GND protection network against reverse battery
This section provides two solutions for implementing a ground protection network against
reverse battery.
3.1.1
Solution 1: a resistor in the ground line (RGND only)
This can be used with any type of load.
The following shows how to dimension the RGND resistor:
1.
RGND ≤ 600 mV / (IS(on)max)
2.
RGND ≥ (-VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device’s datasheet.
Power dissipation in RGND (when VCC < 0 during reverse battery situations) is:
PD = (-VCC)2 / RGND
This resistor can be shared amongst several different HSD. Please note that the value of this
resistor should be calculated with formula (1) where IS(on)max becomes the sum of the
maximum on-state currents of the different devices.
Doc ID 17461 Rev 2
16/26
Application information
VND830E-E
Please note that, if the microprocessor ground is not common with the device ground, then
the RGND produces a shift (IS(on)max * RGND) in the input thresholds and the status output
values. This shift varies depending on how many devices are ON in the case of several highside drivers sharing the same RGND.
If the calculated power dissipation requires the use of a large resistor, or several devices
have to share the same resistor, then ST suggests using Section 3.1.2 described below.
3.1.2
Solution 2: a diode (DGND) in the ground line
A resistor (RGND = 1 kΩ) should be inserted in parallel to DGND if the device is driving an
inductive load. This small signal diode can be safely shared amongst several different HSD.
Also in this case, the presence of the ground network produce a shift (~600 mV) in the input
threshold and the status output values if the microprocessor ground is not common with the
device ground. This shift does not vary if more than one HSD shares the same
diode/resistor network. Series resistor in INPUT and STATUS lines are also required to
prevent that, during battery voltage transient, the current exceeds the absolute maximum
rating. Safest configuration for unused INPUT and STATUS pin is to leave them
unconnected.
3.2
Load dump protection
Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the
VCC maximum DC rating. The same applies if the device is subjected to transients on the
VCC line that are greater than those shown in Table 13.
3.3
MCU I/O protection
If a ground protection network is used and negative transients are present on the VCC line,
the control pins are pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent
the microcontroller I/O pins from latching up.
The value of these resistors is a compromise between the leakage current of microcontroller
and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of
microcontroller I/Os:
- VCCpeak / Ilatchup ≤ Rprot ≤ (VOHμC - VIH - VGND) / IIHmax
Example
For the following conditions:
VCCpeak = -100 V
Ilatchup ≥ 20 mA
VOHμC ≥ 4.5 V
5 kΩ ≤ Rprot ≤ 65 kΩ.
The recommended values are:
Rprot = 10 kΩ
17/26
Doc ID 17461 Rev 2
VND830E-E
3.4
Application information
Open-load detection in off-state
Off-state open-load detection requires an external pull-up resistor (RPU) connected between
OUTPUT pin and a positive supply voltage (VPU) like the +5 V line used to supply the
microprocessor.
The external resistor has to be selected according to the following requirements:
1.
No false open-load indication when load is connected: in this case it needs to avoid
VOUT to be higher than VOlmin; this results in the following condition
VOUT = (VPU / (RL + RPU))RL < VOlmin.
2.
No misdetection when load is disconnected: in this case the VOUT has to be higher than
VOLmax; this results in the following condition RPU < (VPU - VOLmax) / IL(off2).
Because Is(OFF) may significantly increase if Vout is pulled high (up to several mA), the pullup resistor RPU should be connected to a supply that is switched OFF when the module is in
standby.
The values of VOLmin, VOLmax and IL(off2) are available in Chapter 2: Electrical specifications.
Figure 26. Open-load detection in off-state
V b a tt.
V PU
V CC
R PU
IN P U T
D R IV E R
+
L O G IC
IL (o ff2 )
OUT
+
STATUS
R
V OL
RL
GROUND
Doc ID 17461 Rev 2
18/26
Application information
3.5
VND830E-E
Maximum demagnetization energy
Figure 27. Maximum turn-off current versus load inductance
I LM AX (A)
100
10
A
C
B
1
0,1
1
10
100
L(mH)
A = single pulse at TJstart = 150°C
B= repetitive pulse at TJstart = 100°C
C= repetitive pulse at TJstart = 125°C
Conditions:
VCC= 13.5 V
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
Note:
Values are generated with RL = 0 Ω.
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse
must not exceed the temperature specified above for curves B and C.
19/26
Doc ID 17461 Rev 2
VND830E-E
Package and PCB thermal data
4
Package and PCB thermal data
4.1
SO-16L thermal data
Figure 28. SO-16L PC board(1)
1. Layout condition of Rth and Zth measurements (PCB FR4 area = 41 mm x 48 mm, PCB thickness = 2 mm,
Cu thickness = 35 µm, Copper areas: 0.5 cm2, 6 cm2).
Figure 29. Rthj-amb vs PCB copper area in open box free air condition
70
RTH j-amb (°C/W)
65
60
55
50
45
40
0
1
2
3
4
5
6
7
PCB Cu heatsink area (cm^2)
Doc ID 17461 Rev 2
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Package and PCB thermal data
VND830E-E
Figure 30. SO-16 L thermal impedance junction ambient single pulse
Equation 1: pulse calculation formula
Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ )
where
δ = tp ⁄ T
Figure 31. Thermal fitting model of a quad channel HSD in SO-16L
Tj_1
C1
C2
C3
C4
C5
C6
R1
R2
R3
R4
R5
R6
Pd1
Tj_2
C1
C2
R1
R2
Pd2
T_amb
21/26
Doc ID 17461 Rev 2
VND830E-E
Package and PCB thermal data
Table 16.
Thermal parameters
Area/ island (cm2)
Footprint
R1 (°C/W)
0.15
R2 (°C/W)
0.7
R3 (°C/W)
2
R4 (°C/W)
10
R5 (°C/W)
15
R6 (°C/W)
37
C1 (W.s/°C)
0.0005
C2 (W.s/°C)
0.003
C3 (W.s/°C)
0.015
C4 (W.s/°C)
0.15
C5 (W.s/°C)
1.5
C6 (W.s/°C)
3
Doc ID 17461 Rev 2
6
22
5
22/26
Package and packing information
VND830E-E
5
Package and packing information
5.1
ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Figure 32. SO-16L package dimensions
23/26
Doc ID 17461 Rev 2
VND830E-E
Package and packing information
Table 17.
SO-16L mechanical data
mm.
DIM.
Min.
Typ.
A
a1
Max.
2.65
0.1
0.2
a2
2.45
b
0.35
0.49
b1
0.23
0.32
C
0.5
c1
45° (typ.)
D
10.1
10.5
E
10.0
10.65
e
1.27
e3
8.89
F
7.4
7.6
L
0.5
1.27
M
0.75
S
8° (max.)
Doc ID 17461 Rev 2
24/26
Revision history
6
VND830E-E
Revision history
Table 18.
25/26
Document revision history
Date
Revision
Changes
03-May-2010
1
Initial release.
19-Sep-2013
2
Updated Disclaimer
Doc ID 17461 Rev 2
VND830E-E
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