VNH3SP30-E

VNH3SP30-E Automotive fully integrated H-bridge motor driver Features Type VNH3SP30-E ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ RDS(on) 45mΩ max (per leg) Iout 30A Vccmax 40V MultiPowerSO-30™ Output current: 30A 5V logic level compatible inputs Undervoltage and overvoltage shutdown Overvoltage clamp Thermal shut down Cross-conduction protection Linear current limiter Very low standby power consumption PWM operation up to 10 kHz Protection against loss of ground and loss of VCC Package: ECOPACK® Description The VNH3SP30-E is a full-bridge motor driver intended for a wide range of automotive applications. The device incorporates a dual monolithic high-side driver (HSD) and two lowside switches. The HSD switch is designed using STMicroelectronics proprietary VIPower™ M0-3 technology that efficiently integrates a true Power MOSFET with an intelligent signal/protection circuit on the same die. Table 1. Device summary Package MultiPowerSO-30 Tube The low-side switches are vertical MOSFETs manufactured using STMicroelectronics proprietary EHD (“STripFET™”) process.The three circuits are assembled in a MultiPowerSO30 package on electrically isolated lead frames. This package, specifically designed for the harsh automotive environment, offers improved thermal performance thanks to exposed die pads. Moreover, its fully symmetrical mechanical design provides superior manufacturability at board level. The input signals INA and INB can directly interface with the microcontroller to select the motor direction and the brake condition. Pins DIAGA/ENA or DIAGB/ENB, when connected to an external pull-up resistor, enable one leg of the bridge. They also provide a feedback digital diagnostic signal. The normal condition operation is explained in The speed of the motor can be controlled in all possible conditions by the PWM up to kHz. In all cases, a low level state on the PWM pin will turn off both the LSA and LSB switches. When PWM rises to a high level, LSA or LSB turn on again depending on the input pin state. Tape & reel VNH3SP30TR-E VNH3SP30-E November 2007 Rev 6 1/33 www.st.com 33 Contents VNH3SP30-E Contents 1 2 Block diagram and pins description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.1 2.2 2.3 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.1 3.2 3.3 Reverse battery protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Open load detection in Off mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Test mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.1 MultiPowerSO-30 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.1.1 4.1.2 4.1.3 4.1.4 Thermal calculation in clockwise and anti-clockwise operation in steadystate mode 26 Thermal resistances definition (values according to the PCB heatsink area) . . . . . . . . . . . . . . . . . . . . . 26 Thermal calculation in transient mode . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Single pulse thermal impedance definition (values according to the PCB heatsink area) . . . . . . . . . . . . . . . . . . . . . 26 5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.1 5.2 5.3 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 MultiPowerSO-30 package mechanical data . . . . . . . . . . . . . . . . . . . . . . 29 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 2/33 VNH3SP30-E List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Block description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Pin functions description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Logic inputs (INA, INB, ENA, ENB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 PWM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Switching (VCC = 13V, RLOAD = 1.1Ω, unless otherwise specified) . . . . . . . . . . . . . . . . . . 10 Protection and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Truth table in normal operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Truth table in fault conditions (detected on OUTA). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Thermal calculation in clockwise and anti-clockwise operation in steady-state mode . . . . 26 Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 MultiPowerSO-30 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 3/33 List of figures VNH3SP30-E List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40. Figure 41. Figure 42. Figure 43. Figure 44. Figure 45. Figure 46. Figure 47. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Definition of the delay times measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Definition of the low side switching times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Definition of the high side switching times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 On state supply current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Off state supply current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Input high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Input low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 High level enable pin current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Delay time during change of operation mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Enable clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 High level enable voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Low level enable voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 PWM high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 PWM low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 PWM high level current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Current limitation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 On state high side resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 On state low side resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 On state high side resistance vs Vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 On state low side resistance vs Vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Output voltage rise time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Output voltage fall time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Enable output low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 ON state leg resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Typical application circuit for DC to 10 kHz PWM operation short circuit protection . . . . . 20 Half-bridge configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Multi-motors configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Waveforms in full bridge operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Waveforms in full bridge operation (continued) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 MultiPowerSO-30™ PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Chipset configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Auto and mutual Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . 25 MultiPowerSO-30 HSD thermal impedance junction ambient single pulse . . . . . . . . . . . . 27 MultiPowerSO-30 LSD thermal impedance junction ambient single pulse . . . . . . . . . . . . . 27 Thermal fitting model of an H-bridge in MultiPowerSO-30 . . . . . . . . . . . . . . . . . . . . . . . . . 28 MultiPowerSO-30 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 MultiPowerSO-30 suggested pad layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 MultiPowerSO-30 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 MultiPowerSO-30 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 4/33 VNH3SP30-E Block diagram and pins description 1 Block diagram and pins description Figure 1. Block diagram Table 2. Block description Description Allows the turn-on and the turn-off of the high side and the low side switches according to the truth table Shuts down the device outside the range [5.5V..36V] for the battery voltage Protects the high side and the low side switches from the high voltage on the battery line in all configurations for the motor Drives the gate of the concerned switch to allow a proper RDS(on) for the leg of the bridge Limits the motor current by reducing the high side switch gate-source voltage when short-circuit to ground occurs In case of short-circuit with the increase of the junction’s temperature, shuts down the concerned high side to prevent its degradation and to protect the die Signals an abnormal behavior of the switches in the half-bridge A or B by pulling low the concerned ENx/DIAGx pin Name Logic control Overvoltage + undervoltage High side and low side clamp voltage High side and low side driver Linear current limiter Overtemperature protection Fault detection 5/33 Block diagram and pins description Figure 2. Configuration diagram (top view) VNH3SP30-E Table 3. Pin No 1, 25, 30 Pin definitions and functions Symbol Function OUTA, Heat Slug2 Source of high side switch A / Drain of low side switch A Not connected Drain of high side switches and power supply voltage Status of high side and low side switches A; open drain output Clockwise input PWM input Counter clockwise input Status of high side and low side switches B; open drain output 2, 4, 7, 9, 12, 14, 17, 22, 24, NC 29 3, 13, 23 6 5 8 11 10 15, 16, 21 26, 27, 28 18, 19, 20 VCC, Heat Slug1 ENA/DIAGA INA PWM INB ENB/DIAGB OUTB, Heat Slug3 Source of high side switch B / Drain of low side switch B GNDA GNDB Source of low side switch A(1) Source of low side switch B(1) 1. GNDA and GNDB must be externally connected together. 6/33 VNH3SP30-E Table 4. Name VCC Battery connection Block diagram and pins description Pin functions description Description GNDA, GNDB Power grounds; must always be externally connected together OUTA, OUTB INA, INB Power connections to the motor Voltage controlled input pins with hysteresis, CMOS compatible. These two pins control the state of the bridge in normal operation according to the truth table (brake to VCC, brake to GND, clockwise and counterclockwise). Voltage controlled input pin with hysteresis, CMOS compatible. Gates of low side FETs are modulated by the PWM signal during their ON phase allowing speed control of the motor. Open drain bidirectional logic pins. These pins must be connected to an external pull up resistor. When externally pulled low, they disable half-bridge A or B. In case of fault detection (thermal shutdown of a high side FET or excessive ON state voltage drop across a low side FET), these pins are pulled low by the device (see truth table in fault condition). PWM ENA/DIAGA, ENB/DIAGB 7/33 Electrical specifications VNH3SP30-E 2 Electrical specifications Figure 3. Current and voltage conventions 2.1 Absolute maximum ratings Table 5. Symbol Vcc Imax1 IR IIN IEN Ipw VESD Tj Tc TSTG Supply voltage Maximum output current (continuous) Reverse output current (continuous) Input current (INA and INB pins) Enable input current (DIAGA/ENA and DIAGB/ENB pins) PWM input current Electrostatic discharge (R = 1.5kΩ C = 100pF) , – logic pins – output pins: OUTA, OUTB, VCC Junction operating temperature Case operating temperature Storage temperature Absolute maximum ratings Parameter Value -0.3...40 30 A -30 ±10 ±10 ±10 4 5 Internally limited -40 to 150 -55 to 150 °C kV kV mA Unit V 8/33 VNH3SP30-E Electrical specifications 2.2 Electrical characteristics Vcc = 9V up to 18V; -40°C < Tj < 150°C, unless otherwise specified. Table 6. Symbol VCC Power section Parameter Operating supply voltage Off state: INA = INB = PWM = 0; Tj = 25°C; VCC = 13V INA = INB = PWM = 0 On state: INA or INB = 5V, no PWM Test Conditions Min Typ 5.5 Max Unit 36 V 20 IS Supply current 30 40 15 µA µA mA RONHS RONLS Static high side resistance Static low side resistance High side freewheeling diode forward voltage High side off state output current (per channel) IOUT = 12A; Tj = 25°C IOUT = 12A; Tj = -40 to 150°C IOUT = 12A; Tj = 25°C IOUT = 12A; Tj = -40 to 150°C If = 12 A Tj = 25°C; VOUTX = ENX = 0V; VCC = 13V Tj = 125°C; VOUTX = ENX = 0V; VCC = 13V 23 11 30 60 15 30 1.1 mΩ Vf 0.8 V IL(off) 3 5 µA Table 7. Symbol VIL VIH VIHYST VICL IINL IINH VDIAG Logic inputs (INA, INB, ENA, ENB) Parameter Input low level voltage Input high level voltage Input hysteresis voltage Input clamp voltage Input low current Input high current Enable output low level voltage IIN = 1mA IIN = -1mA VIN = 1.5V VIN = 3.25V Fault operation (DIAGX/ENX pin acts as an output pin); IEN = 1mA Normal operation (DIAGX/ENX pin acts as an input pin) 3.25 0.5 6 -1 1 µA 10 0.4 V 6.8 8 V Test conditions Min Typ Max Unit 1.5 -0.7 -0.3 9/33 Electrical specifications Table 8. Symbol Vpwl Ipwl Vpwh Ipwh Vpwhhyst Vpwcl Vpwtest Ipwtest VNH3SP30-E PWM Parameter PWM low level voltage PWM low level pin current PWM high level voltage PWM high level pin current PWM hysteresis voltage PWM clamp voltage Test mode PWM pin voltage Test mode PWM pin current VIN = -2 V Ipw = 1mA Ipw = -1mA Vpw = 3.25V 0.5 VCC + 0.3 -5 -3.5 -2000 VCC + 0.7 -3.5 -2 -500 VCC + 1 -2 -0.5 V µA V Vpw = 1.5V 1 3.25 10 Test Conditions Min Typ Max 1.5 Unit V µA V µA Table 9. Symbol f td(on) td(off) tr tf tDEL Switching (VCC = 13V, RLOAD = 1.1Ω unless otherwise specified) , Parameter PWM frequency Turn-on delay time Turn-off delay time Rise time Fall time Delay time during change of operating mode Input rise time < 1µs (see Figure 6) Input rise time < 1µs (see Figure 6) (see Figure 5) (see Figure 5) (see Figure 4) Test Conditions Min 0 100 85 1.5 2 600 Typ Max 10 300 255 3 5 1800 µs Unit kHz Table 10. Symbol VUSD VOV ILIM TTSD TTR THYST Protection and diagnostic Parameter Undervoltage shut-down Overvoltage shut-down Current limitation Thermal shut-down temperature Thermal reset temperature Thermal hysteresis VIN = 3.25V 36 30 150 135 7 15 43 45 170 200 °C A Test Conditions Min Typ Max 5.5 V Unit 10/33 VNH3SP30-E Figure 4. Definition of the delay times measurement VINA Electrical specifications t VINB t PWM t ILOAD tDEL tDEL t Figure 5. Definition of the low side switching times PWM t VOUTA, B 90% 80% tf 20% 10% tr t 11/33 Electrical specifications Figure 6. Definition of the high side switching times VINA tD(on) tD(off) VNH3SP30-E t VOUTA 90% 10% t 12/33 VNH3SP30-E Table 11. INA 1 0 1 1 0 0 L L 1 H INB 1 H L Electrical specifications Truth table in normal operating conditions DIAGA/ENA DIAGB/ENB OUTA OUTB H Operating mode Brake to VCC Clockwise (CW) Counterclockwise (CCW) Brake to GND Table 12. INA 1 Truth table in fault conditions (detected on OUTA) INB 1 0 1 1 H 0 0 1 0 L OPEN L OPEN H DIAGA/ENA DIAGB/ENB OUTA OUTB H L 0 0 X X 1 Fault Information Protection Action Note: Notice that saturation detection on the low side power MOSFET is possible only if the impedance of the short-circuit from the output to the battery is less than 100mΩ when the device is supplied with a battery voltage of 13.5V. 13/33 Electrical specifications Table 13. Electrical transient requirements Test Level I -25V +25V -25V +25V -4V +26.5V Test Level II -50V +50V -50V +50V -5V +46.5V Test Level III -75V +75V -100V +75V -6V +66.5V Test Level IV -100V +100V -150V +100V -7V +86.5V VNH3SP30-E ISO T/R - 7637/1 Test Pulse 1 2 3a 3b 4 5 Test Levels Delays and Impedance 2ms, 10Ω 0.2ms, 10Ω 0.1µs, 50Ω 100ms, 0.01Ω 400ms, 2Ω ISO T/R - 7637/1 Test Pulse 1 2 3a Test Levels Result I Test Levels Result II Test Levels Result III Test Levels Result IV C C C C 3b 4 5(1) E E E 1. For load dump exceeding the above value a centralized suppressor must be adopted Class C Contents All functions of the device are performed as designed after exposure to disturbance. One or more functions of the device are not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device. E 14/33 VNH3SP30-E Electrical specifications 2.3 Figure 7. Electrical characteristics curves On state supply current Figure 8. Off state supply current Figure 9. High level input current Figure 10. Input clamp voltage Figure 11. Input high level voltage Figure 12. Input low level voltage 15/33 Electrical specifications VNH3SP30-E Figure 13. Input hysteresis voltage Figure 14. High level enable pin current Figure 15. Delay time during change of operation mode Figure 16. Enable clamp voltage Figure 17. High level enable voltage Figure 18. Low level enable voltage 16/33 VNH3SP30-E Electrical specifications Figure 19. PWM high level voltage Figure 20. PWM low level voltage Figure 21. PWM high level current Figure 22. Overvoltage shutdown Figure 23. Undervoltage shutdown Figure 24. Current limitation 17/33 Electrical specifications VNH3SP30-E Figure 25. On state high side resistance vs Tcase Figure 26. On state low side resistance vs Tcase Figure 27. On state high side resistance vs Vcc Figure 28. On state low side resistance vs Vcc Figure 29. Output voltage rise time Figure 30. Output voltage fall time 18/33 VNH3SP30-E Electrical specifications Figure 31. Enable output low level voltage Figure 32. ON state leg resistance 19/33 Application information VNH3SP30-E 3 Application information In normal operating conditions the DIAGX/ENX pin is considered as an input pin by the device. This pin must be externally pulled high. PWM pin usage: In all cases, a “0” on the PWM pin will turn off both LSA and LSB switches. When PWM rises back to “1”, LSA or LSB turn on again depending on the input pin state. Figure 33. Typical application circuit for DC to 10 kHz PWM operation short circuit protection µC Note: The value of the blocking capacitor (C) depends on the application conditions and defines voltage and current ripple onto supply line at PWM operation. Stored energy of the motor inductance may fly back into the blocking capacitor, if the bridge driver goes into tri-state. This causes a hazardous overvoltage if the capacitor is not big enough. As basic orientation, 500µF per 10A load current is recommended. In case of a fault condition the DIAGX/ENX pin is considered as an output pin by the device. The fault conditions are: ● ● overtemperature on one or both high sides short to battery condition on the output (saturation detection on the low side power MOSFET) 20/33 VNH3SP30-E Possible origins of fault conditions may be: ● ● Application information OUTA is shorted to ground →overtemperature detection on high side A. OUTA is shorted to VCC →low side power MOSFET saturation detection(a). When a fault condition is detected, the user can know which power element is in fault by monitoring the INA, INB, DIAGA/ENA and DIAGB/ENB pins. In any case, when a fault is detected, the faulty leg of the bridge is latched off. To turn on the respective output (OUTX) again, the input signal must rise from low to high level. 3.1 Reverse battery protection Three possible solutions can be considered: 1. 2. 3. a Schottky diode D connected to VCC pin an N-channel MOSFET connected to the GND pin (see Figure 33: Typical application circuit for DC to 10 kHz PWM operation short circuit protection on page 20 a P-channel MOSFET connected to the VCC pin The device sustains no more than -30A in reverse battery conditions because of the two body diodes of the power MOSFETs. Additionally, in reverse battery condition the I/Os of VNH3SP30-E will be pulled down to the VCC line (approximately -1.5V). A series resistor must be inserted to limit the current sunk from the microcontroller I/Os. If IRmax is the maximum target reverse current through µC I/Os, the series resistor is: V IOs – V CC R = -------------------------------I Rmax 3.2 Open load detection in Off mode It is possible for the microcontroller to detect an open load condition by adding a simply resistor (for example, 10k ohm) between one of the outputs of the bridge (for example, OUTB) and one microcontroller input. A possible sequence of inputs and enable signals is the following: INA = 1, INB = X, ENA = 1, ENB = 0. ● normal condition: OUTA = H and OUTB = H ● open load condition: OUTA = H and OUTB = L: In this case the OUTB pin is internally pulled down to GND. This condition is detected on OUTB pin by the microcontroller as an open load fault. a. An internal operational amplifier compares the Drain-Source MOSFET voltage with the internal reference (2.7V Typ.). The relevant low side power MOS is switched off when its Drain-Source voltage exceeds the reference voltage. 21/33 Application information VNH3SP30-E 3.3 Test mode The PWM pin can be used to test the load connection between two half-bridges. In the Test mode (Vpwm = -2V) the internal power MOS gate drivers are disabled. The INA or INB inputs can be used to turn on the high side A or B, respectively, in order to connect one side of the load at VCC voltage. The check of the voltage on the other side of the load can be used to verify the continuity of the load connection. In case of load disconnection, the DIADX/ENX pin corresponding to the faulty output is pulled down. Figure 34. Half-bridge configuration VCC INA INB DIAGA/ENA DIAGB/ENB PWM OUTB INA INB DIAGA/ENA DIAGB/ENB PWM OUTA M OUTA OUTB GNDA GNDB GNDA GNDB Note: The VNH3SP30-E can be used as a high power half-bridge driver achieving an On resistance per leg of 22.5mΩ . Figure 35. Multi-motors configuration VCC INA INB DIAGA/ENA DIAGB/ENB PWM OUTB INA INB DIAGA/ENA DIAGB/ENB PWM OUTA M2 OUTA OUTB GNDA GNDB GNDA GNDB M1 Note: M3 The VNH3SP30-E can easily be designed in multi-motors driving applications such as seat positioning systems where only one motor must be driven at a time. DIAGX/ENX pins allow to put unused half-bridges in high impedance. 22/33 VNH3SP30-E Figure 36. Waveforms in full bridge operation Application information 23/33 Application information Figure 37. Waveforms in full bridge operation (continued) VNH3SP30-E 24/33 VNH3SP30-E Package and PCB thermal data 4 4.1 Package and PCB thermal data MultiPowerSO-30 thermal data Figure 38. MultiPowerSO-30™ PC board Note: Layout condition of Rth and Zth measurements (PCB FR4 area = 58mm x 58mm, PCB thickness = 2mm, Cu thickness = 35µm, Copper areas: from minimum pad layout to 16cm2). Figure 39. Chipset configuration HIGH SIDE CHIP HSAB LOW SIDE CHIP A LSA LOW SIDE CHIP B LSB Figure 40. Auto and mutual Rthj-amb vs PCB copper area in open box free air condition 45 40 35 30 25 20 15 °C/W 10 5 0 0 5 10 15 cm2 of Cu area (refer to PCB layout) 20 RthHS RthLS RthHSLS RthLSLS 25/33 Package and PCB thermal data VNH3SP30-E 4.1.1 Thermal calculation in clockwise and anti-clockwise operation in steady-state mode Table 14. Thermal calculation in clockwise and anti-clockwise operation in steadystate mode TjHSAB TjLSA TjLSB PdHSA x RthHSLS + PdLSB x RthLS + Tamb PdHSB x RthHSLS + PdLSA x RthLSLS + Tamb HSA HSB LSA LSB ON OFF OFF ON OFF ON ON OFF PdHSA x RthHS + PdLSB PdHSA x RthHSLS + x RthHSLS + Tamb PdLSB x RthLSLS + Tamb PdHSB x RthHS + PdLSA PdHSB x RthHSLS + x RthHSLS + Tamb PdLSA x RthLS + Tamb 4.1.2 Thermal resistances definition (values according to the PCB heatsink area) RthHS = RthHSA = RthHSB = High Side Chip Thermal Resistance Junction to Ambient (HSA or HSB in ON state) RthLS = RthLSA = RthLSB = Low Side Chip Thermal Resistance Junction to Ambient RthHSLS = RthHSALSB = RthHSBLSA = Mutual Thermal Resistance Junction to Ambient between High Side and Low Side Chips RthLSLS = RthLSALSB = Mutual Thermal Resistance Junction to Ambient between Low Side Chips 4.1.3 Thermal calculation in transient mode(b) TjHSAB = ZthHS x PdHSAB + ZthHSLS x (PdLSA + PdLSB) + Tamb TjLSA = ZthHSLS x PdHSAB + ZthLS x PdLSA + ZthLSLS x PdLSB + Tamb TjLSB = ZthHSLS x PdHSAB + ZthLSLS x PdLSA + ZthLS x PdLSB + Tamb 4.1.4 Single pulse thermal impedance definition (values according to the PCB heatsink area) ZthHS = High Side Chip Thermal Impedance Junction to Ambient ZthLS = ZthLSA = ZthLSB = Low Side Chip Thermal Impedance Junction to Ambient ZthHSLS = ZthHSABLSA = ZthHSABLSB = Mutual Thermal Impedance Junction to Ambient between High Side and Low Side Chips ZthLSLS = ZthLSALSB = Mutual Thermal Impedance Junction to Ambient between Low Side Chips b. Calculation is valid in any dynamic operating condition. Pd values set by user. 26/33 VNH3SP30-E Equation 1: pulse calculation formula Z TH δ = R TH ⋅ δ + Z THtp ( 1 – δ) where δ = t p ⁄ T Package and PCB thermal data Figure 41. 100 MultiPowerSO-30 HSD thermal impedance junction ambient single pulse ZthHS Footprint 4 cm2 8 cm2 16 cm2 Footprint 4 cm2 8 cm2 16 cm2 10 ZthHSLS °C/W 1 0.1 0.001 0.01 0.1 time (sec) 1 10 100 1000 Figure 42. MultiPowerSO-30 LSD thermal impedance junction ambient single pulse 100 Footprint 4 cm2 8 cm2 16 cm2 10 Footprint 4 cm2 8 cm2 16 cm2 0,1 0,001 °C/W 1 0,01 0,1 time (sec) 1 10 100 1000 27/33 Package and PCB thermal data Figure 43. Thermal fitting model of an H-bridge in MultiPowerSO-30 VNH3SP30-E Table 15. Thermal parameters(1) Footprint 0.05 0.3 0.5 1.3 14 44.7 0.6 0.8 1.5 20 46.9 115 0.001 0.005 0.02 0.3 0.6 5 0.003 0.075 2.5 3.5 4.5 5.5 7 9 11 36.1 30.4 20.8 39.1 31.6 23.7 4 8 16 Area/island (cm2) R1 = R7 (°C/W) R2 = R8 (°C/W) R3 (°C/W) R4 (°C/W) R5 (°C/W) R6 (°C/W) R9 = R10= R15= R16 (°C/W) R11 = R17 (°C/W) R12 = R18 (°C/W) R13 = R19 (°C/W) R14 = R20 (°C/W) R21 = R22 = R23 (°C/W) C1 = C7 = C9 = C15 (W.s/°C) C2 = C8 (W.s/°C) C3 = (W.s/°C) C4 = C13 = C19 (W.s/°C) C5 (W.s/°C) C6 (W.s/°C) C10 = C11= C16 = C17 (W.s/°C) C12 = C18 (W.s/°C) C14 = C20 (W.s/°C) 1. The blank space means that the value is the same as the previous one. 28/33 VNH3SP30-E Package and packing information 5 5.1 Package and packing information ECOPACK® packages In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second-level interconnect. The category of Second-Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. 5.2 MultiPowerSO-30 package mechanical data Figure 44. MultiPowerSO-30 package outline 29/33 Package and packing information VNH3SP30-E Table 16. MultiPowerSO-30 mechanical data Millimeters Min A A2 A3 B C D E E1 e F1 F2 F3 L N S 0deg 5.55 4.6 9.6 0.8 1.85 0 0.42 0.23 17.1 18.85 15.9 16 1 6.05 5.1 10.1 1.15 10deg 7deg 17.2 Typ Max 2.35 2.25 0.1 0.58 0.32 17.3 19.15 16.1 Symbol Figure 45. MultiPowerSO-30 suggested pad layout 30/33 VNH3SP30-E Package and packing information 5.3 Note: Packing information The devices can be packed in tube or tape and reel shipments (see the Device summary on page 1 for packaging quantities). Figure 46. MultiPowerSO-30 tube shipment (no suffix) Dimension mm 532 3.82 23.6 0.8 A C B Tube length (± 0.5) A B C (± 0.13) Figure 47. MultiPowerSO-30 tape and reel shipment (suffix “TR”) Reel dimensions Dimension A (max) B (min) C (± 0.2) D (min) G (+ 2 / -0) N (min) T (max) mm 330 1.5 13 20.2 32 100 38.4 Tape dimensions According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Description Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Dimension W P0 (± 0.1) P D (± 0.1/-0) D1 (min) F (± 0.1) mm 32 4 24 1.5 2 14.2 End Start Top cover tape No components 500 mm min 500 mm min Empty components pockets User direction of feed Components No components 31/33 Revision history VNH3SP30-E 6 Revision history Table 17. Date Aug-2004 Aug- 2005 Document revision history Revision 1 2 Description of changes Initial release of lead-free version based on the VNH3SP30 datasheet (May 2004 - Rev.1) Modified figure 5 Document converted into new ST corporate template. Changed document title . Changed features on page 1 to add ECOPACK® package. Added section 1: device block description on page 5. Added section 2: pinout description on page 6. Added section 3: maximum ratings on page 8. Added section 4: electrical characteristics on page 9. Added “low” and “high” to parameters for IINL and IINH in Table 6 on page 9. Added section 5: Waveforms and truth table on page 12. Changed first of two fault conditions in section 5 on page 12. Inserted note in Figure 4 on page 12. Added vertical limitation line to left side arrow of tD(off) to Figure 7 on page 17. Added section 6: thermal data on page 26. Added section 7: package characteristics on page 30. Added section 8: packaging information on page 32. Updated disclaimer (last page) to include a mention about the use of ST products in automotive applications. Document reformatted. Changed Table 6: Power section on page 9 : supply current and static resistance values. Added Table 7: Logic inputs (INA, INB, ENA, ENB) on page 9 : VDIAG ROW . Deleted Enable (Logic I/O pin) Table. Updated Table 2: Block description on page 5. Corrected Figure 34 note : changed On resistance per leg from 9.5 mΩ to 22.5 mΩ . 20-Dec-2006 3 20-Jun-2007 4 13-Sep-2007 15-Nov-2007 5 6 32/33 VNH3SP30-E Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. 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