VNLD5300-E

VNLD5300-E OMNIFET III fully protected low-side driver for automotive applications Datasheet - production data Description The VNLD5300-E is a monolithic device made using STMicroelectronics VIPower technology, intended for driving resistive or inductive loads with one side connected to the battery. Built-in thermal shutdown protects the chip from overtemperature and short-circuit. Output current limitation protects the device in an overload condition. In case of long duration overload, the device limits the dissipated power to a safe level up to thermal shutdown intervention.Thermal shutdown, with automatic restart, allows the device to recover normal operation as soon as a fault condition disappears. Fast demagnetization of inductive loads is achieved at turn-off. SO-8 Features Type Vclamp RDS(on) ID VNLD5300-E 41 V 300 m 2A  AEC-Q100 qualified  Drain current: 2 A  ESD protection  Overvoltage clamp  Thermal shutdown  Current and power limitation  Very low standby current  Very low electromagnetic susceptibility  Compliant with European directive 2002/95/EC Table 1. Devices summary Order codes Package SO-8 September 2021 This is information on a product in full production. Tube Tape and reel VNLD5300-E VNLD5300TR-E DS9083 Rev 8 1/20 www.st.com 1 Contents VNLD5300-E Contents 1 Block diagrams and pins configurations . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.1 4 Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.1 5 6 2/20 MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.1 ECOPACK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.2 SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.3 SO-8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 DS9083 Rev 8 VNLD5300-E List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Devices summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Suggested connections for unused and n.c. pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 PowerMOS section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Source drain diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Input section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 DS9083 Rev 8 3/20 3 List of figures VNLD5300-E List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. 4/20 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Configuration diagrams (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Maximum demagnetization energy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 SO-8 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 13 SO-8 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Thermal fitting model of a LSD in SO-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 SO-8 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 SO-8 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 DS9083 Rev 8 VNLD5300-E 1 Block diagrams and pins configurations Block diagrams and pins configurations Figure 1. Block diagram DRAIN1 DRAIN2 Control & Diagnostic ch2 Control & Diagnostic ch1 LOGIC OFF State Open load Current Limitation Power Clamp IN1/VSUPPLY1 IN2/VSUPPLY2 DRIVER OVERTEMPERATURE PROTECTION STATUS1 STATUS2 OVERLOAD PROTECTION (ACTIVE POWER LIMITATION) SOURCE1 SOURCE2 GAPGCFT00727 Table 2. Pin function Name IN1,2/VSUPPLY1,2 DRAIN1,2 Function Voltage controlled input pin with hysteresis, CMOS compatible. They control output switch state. PowerMOS drain. SOURCE1,2 PowerMOS source and ground reference for the control section. STATUS1,2 Open drain digital diagnostic pin. DS9083 Rev 8 5/20 19 Block diagrams and pins configurations VNLD5300-E Figure 2. Current and voltage conventions ID IIN VIN VDS DRAIN1,2 IN1,2/VSUPPLY1,2 ISTAT STATUS 1,2 VSTAT SOURCE1,2 GAPGCFT00726 Figure 3. Configuration diagrams (top view) SOURCE2 DRAIN2 SOURCE1 DRAIN1 5 6 4 3 7 8 2 1 STATUS2 IN2/VSUPPLY2 STATUS1 IN1/VSUPPLY1 SO-8 GAPGCFT00725 Table 3. Suggested connections for unused and n.c. pins Connection / pin STATUS1,2 N.C. INPUT1,2 Floating X(1) X X To ground Not allowed X Through 10 kresistor 1. X: do not care. 6/20 DS9083 Rev 8 VNLD5300-E Electical specifications 2 Electical specifications 2.1 Absolute maximum ratings Stressing the device above the rating listed in Table 4 may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 4. Absolute maximum ratings Symbol VDS Drain-source voltage (VIN = 0 V) Value Unit Internally clamped V Internally limited A 6 A ID DC drain current -ID Reverse DC drain current IS DC supply current -1 to 10 mA IIN DC input current -1 to 10 mA ISTAT DC status current -1 to 10 mA VESD1 Electrostatic discharge (R = 1.5 k; C = 100 pF) – DRAIN – SUPPLY, INPUT, STATUS VESD2 Electrostatic discharge on output pin only (R = 330 , C = 150 pF) 5000 4000 V 2000 V Junction operating temperature -40 to 150 °C Tstg Storage temperature -55 to 150 °C EAS Single pulse avalanche energy (L = 19 mH, Tj = 150°C, RL = 0, IOUT = IlimL) 26 mJ Tj 2.2 Parameter Thermal data Table 5. Thermal data Symbol Rthj-amb Parameter Thermal resistance junction-ambient DS9083 Rev 8 Maximum value Unit 115 °C/W 7/20 19 Electical specifications 2.3 VNLD5300-E Electrical characteristics Values specified in this section are for Vsupply = VIN = 4.5 V to 5.5 V, -40°C < Tj < 150°C, unless otherwise stated. Table 6. PowerMOS section Symbol RON Parameter Test conditions Min. Typ. ID = 0.8 A; Tj = 25°C; Vsupply = VIN = 4.5 V ON-state resistance Max. 300 m ID = 0.8 A; Tj = 150°C; Vsupply = VIN = 4.5 V 600 VCLAMP Drain-source clamp voltage VIN = 5 V; ID = 0.8 A 41 VCLTH Drain-source clamp threshold voltage VIN = 0 V; ID = 2 mA 36 VIN = 0 V; VDS = 13 V; Tj = 25°C 0 3 VIN = 0 V; VDS = 13 V; Tj = 125°C 0 5 IDSS OFF-state output current Unit 46 52 V V µA Table 7. Source drain diode Symbol VSD Parameter Test conditions Forward on voltage ID = 0.8 A; VIN = 0 V Min. Typ. Max. Unit — 0.8 — V Table 8. Input section Symbol Parameter Test conditions IISS Supply current from input pin ON-state: Vsupply = VIN = 5 V; VDS = 0 V VICL Input clamp voltage VINTH Min. IS = 1 mA Max. Unit 30 65 µA 5.5 IS = -1 mA Input threshold voltage Typ. 7 -0.7 VDS = VIN; ID = 1 mA 1 3.5 V V Table 9. Status pin Symbol 8/20 Parameter Test conditions Min. Typ. Max. Unit VSTAT Status low output voltage ISTAT = 1 mA 0.5 V ILSTAT Status leakage current Normal operation; VSTAT = 5 V 10 µA CSTAT Status pin input capacitance Normal operation; VSTAT = 5 V 100 pF VSTCL Status clamp voltage ISTAT = 1 mA ISTAT = -1 mA DS9083 Rev 8 5.5 7 -0.7 V VNLD5300-E Electical specifications Table 10. Switching characteristics Symbol td(ON) td(OFF) Parameter Test conditions Min. Typ. Max. Unit Turn-on delay time RL = 16 VCC = 13 V(1) — 6 — µs Turn-off delay time RL = 16 VCC = 13 V (1) — 3 — µs (1) — 11 — µs tr Rise time RL = 16 VCC = 13 V tf Fall time RL = 16 VCC = 13 V(1) — 3 — µs WON Switching energy losses at turn-on RL = 16 VCC = 13 V(1) — 0.028 — mJ WOFF Switching energy losses at turn-off RL = 16 VCC = 13 V(1) — 0.006 — mJ Qg Total gate charge Vsupply = VIN = 5 V — 0.6 — nC 1. See Figure 4: Switching characteristics. Note: See Figure 5: Application schematic. Table 11. Protection and diagnostics Symbol Parameter Test conditions IlimH DC short-circuit current VDS = 13 V; Vsupply = VIN = 5 V IlimL Short-circuit current during thermal cycling VDS = 13 V; TR < Tj < TTSD; Vsupply = VIN = 5 V tdlimL Step response current limit VDS = 13 V; Vinput = 5 V TTSD Shutdown temperature TR Reset temperature TRS Thermal reset of STATUS THYST Min. Typ. Max. Unit 2 2.8 3.8 A 150 1.4 A 7 µs 175 200 TRS + 1 TRS + 5 °C 135 Thermal hysteresis (TTSD - TR) °C °C 7 °C Table 12. Truth table Conditions INPUT DRAIN STATUS Normal operation L H H L H H Current limitation L H H X H H Overtemperature L H H H H L Undervoltage L H H H X X DS9083 Rev 8 9/20 19 Electical specifications VNLD5300-E Figure 4. Switching characteristics ID 90% tr Vgen td(on) tf 10% td(off) GAPGCFT00815 10/20 DS9083 Rev 8 VNLD5300-E 3 Application information Application information Figure 5. Application schematic Vcc +5V RL MicroController IN/VSUPPLY DRAIN Rprot +5V STATUS Rprot SOURCE GAPGCFT00728 3.1 MCU I/O protection ST suggests to insert a resistor (Rprot) in line to prevent the microcontroller I/O pins from latching up(a). The value of these resistors is a compromise between the leakage current of microcontroller and the current required by the LSD I/Os (input levels compatibility) with the latch-up limit of microcontroller I/Os: Equation 1:  V OHC – V IH  0.7 --------------------  R prot  ---------------------------------------I latchup I IH max Let:  Ilatchup > 20 mA  VOHµC > 4.5 V  35   Rprot  100 K Then, the recommended value is Rprot = 1 K Figure 6 shows the turn-off current drawn during the demagnetization. a. In case of negative transient on the drain pin. DS9083 Rev 8 11/20 19 Application information VNLD5300-E Figure 6. Maximum demagnetization energy VNLD5300 - Maximum turn off current versus inductance I (A) 10 1 VNLD5300 - Single Pulse Repetitive pulse Tjstart=100°C Repetitive pulse Tjstart=125°C 0.1 1 10 100 1000 L (mH) VNLD5300 - Maximum turn off Energy versus Tdemag 1000 VNLD5300 - Single Pulse 100 Repetitive pulse Tjstart=100°C E [mJ] Repetitive pulse Tjstart=125°C 10 1 0.01 0.1 1 10 100 Tdemag [ms] GAPG1107131351CFT Note: 12/20 Values are generated with RL = 0W. In case of repetitive pulses, Tjstart (at the beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves A and B. DS9083 Rev 8 VNLD5300-E Package and PC board thermal data 4 Package and PC board thermal data 4.1 SO-8 thermal data Figure 7. SO-8 PC board GAPGCFT01274 Note: Layout condition of Rth and Zth measurements (Board finish thickness 1.6 mm +/- 10%; Board double layer; Board dimension 78 mm x 86 mm; Board Material FR4; Cu thickness 0.070 mm (front and back side); Thermal vias separation 1.2 mm; Thermal via diameter 0.3 mm +/- 0.08 mm; Cu thickness on vias 0.025 mm). Figure 8. Rthj-amb vs PCB copper area in open box free air condition RTHjamb 125 115 105 95 85 75 65 0 0.5 1 1.5 2 2.5 PCB Cu heatsink area (cm^2) - (refer to PCB layout) GAPGCFT01275 DS9083 Rev 8 13/20 19 Package and PC board thermal data VNLD5300-E Figure 9. SO-8 thermal impedance junction ambient single pulse ZTH (°C/W) 1000 Cu=footprint Cu=2 cm2 100 10 1 0.01 0.1 1 10 100 1000 Time (s) GAPGCFT01280 Equation 2: Z TH = R TH   + Z THtp  1 –   where  = tP/T Figure 10. Thermal fitting model of a LSD in SO-8 GAPGCFT01281 Note: 14/20 The fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered. DS9083 Rev 8 VNLD5300-E Package and PC board thermal data Table 13. Thermal parameters Area/island (cm2) Footprint 2 R1 = R7 (°C/W) 2.8 2.8 R2 = R8 (°C/W) 3.7 3.7 R3 = R9 (°C/W) 3.5 3.5 R4 = R10 (°C/W) 34 25 R5 (°C/W) 36 20 R6 (°C/W) 35 27 C1 = C7 (W.s/°C) 0.00002 0.00002 C2 = C8 (W.s/°C) 0.001 0.001 C3 = C9 (W.s/°C) 0.005 0.005 C4 = C10 (W.s/°C) 0.02 0.02 C5 (W.s/°C) 0.15 0.15 C6 (W.s/°C) 2.5 3.5 DS9083 Rev 8 15/20 19 Package and packing information VNLD5300-E 5 Package and packing information 5.1 ECOPACK In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 5.2 SO-8 mechanical data Figure 11. SO-8 package dimensions GAPGCFT00145 16/20 DS9083 Rev 8 VNLD5300-E Package and packing information Table 14. SO-8 mechanical data Millimeters Symbol Min. Typ. A Max. 1.75 A1 0.10 A2 1.25 b 0.28 0.48 c 0.17 0.23 D(1) 4.80 4.90 5.00 E 5.80 6.00 6.20 E1(2) 3.80 3.90 4.00 e 0.25 1.27 h 0.25 0.50 L 0.40 1.27 L1 k 1.04 0° ccc 8° 0.10 1. Dimension D does not include mold flash, protrusions or gate burrs. Mold flash, potrusions or gate burrs shall not exceed 0.15 mm in total (both side). 2. Dimension “E1” does not include interlead flash or protrusions. Interlead flash or protrusions shall not exceed 0.25 mm per side. DS9083 Rev 8 17/20 19 Package and packing information 5.3 VNLD5300-E SO-8 packing information Figure 12. SO-8 tube shipment (no suffix) B Base q.ty Bulk q.ty Tube length (± 0.5) A B C (± 0.1) C A 100 2000 532 3.2 6 0.6 All dimensions are in mm. Figure 13. SO-8 tape and reel shipment (suffix “TR”) Reel dimensions Base q.ty Bulk q.ty A (max) B (min) C (± 0.2) F G (+ 2 / -0) N (min) T (max) 2500 2500 330 1.5 13 20.2 12.4 60 18.4 All dimensions are in mm. Tape dimensions According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape hole spacing Component spacing Hole diameter Hole diameter Hole position Compartment depth Hole spacing W P0 (± 0.1) P D (+ 0.1/-0) D1 (min) F (± 0.05) K (max) P1 (± 0.1) 12 4 8 1.5 1.5 5.5 4.5 2 All dimensions are in mm. End Start Top cover tape No components Components Empty components pockets saled with cover tape. User direction of feed 18/20 DS9083 Rev 8 No components 500mm min 500mm min VNLD5300-E 6 Revision history Revision history Table 15. Document revision history Date Revision 28-Jun-2012 1 Initial release. 2 Table 6: PowerMOS section: – RON: added typical value, removed maximum value Table 10: Switching characteristics: – Updated typical values Table 11: Protection and diagnostics: – tdlimL: updated typical value Table 12: Truth table: – Output voltage < VOL: removed conditions 3 Table 5: Thermal data: – Rthj-amb: updated value Table 6: PowerMOS section: – VCLAMP: updated test conditions Table 8: Input section: – IISS: updated value Updated Section 3.1: MCU I/O protection Updated Chapter 4: Package and PC board thermal data 18-Jul-2013 4 Table 4: Absolute maximum ratings: – -ID: updated value – EAS: updated parameter value Table 10: Switching characteristics: – td(ON), tr, tf, WON, WOFF: updated typical values Added Figure 6: Maximum demagnetization energy 18-Sep-2013 5 Updated disclaimer. 26-Feb-2015 6 Updated Figure 5: Application schematic 26-Oct-2017 7 Added in cover page “automotive” word in the title and the icon of the car. Updated Features on page 1 17-Sep-2021 8 Updated Table 8: Input section. 25-Mar-2013 05-Jun-2013 Changes DS9083 Rev 8 19/20 19 VNLD5300-E IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2021 STMicroelectronics – All rights reserved 20/20 DS9083 Rev 8