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VNQ830

VNQ830

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    SOIC28

  • 描述:

    IC PWR DRIVER N-CHANNEL 1:1 28SO

  • 数据手册
  • 价格&库存
VNQ830 数据手册
VNQ830 Quad channel high-side driver Features Type RDS(on) IOUT VCC VNQ830 65 mΩ(1) 6A 36V ) s ( ct 1. Per each channel. u d o SO-28 (double island) ■ CMOS compatible inputs ■ Open Drain status outputs ■ On-state open-load detection ■ Off-state open-load detection ■ Shorted load protection ■ Undervoltage and overvoltage shutdown ■ Loss of ground protection ■ Very low standby current ■ Reverse battery protection u d o ) s ( ct r P e t e l o s b O Table 1. r P Description e t e l o s b -O The VNQ830 is a quad HSD formed by assembling two VND830 chips in the same SO-28 package. The VND830 is a monolithic device made using| STMicroelectronics™ VIPower™ M0-3 Technology. The device is intended for driving any type of multiple load with one side connected to ground. The active VCC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table). Active current limitation combined with thermal shutdown and automatic restart protects the device against overload. The device detects the open load condition in both the on and off state. In the off state the device detects if the output is shorted to VCC. The device automatically turns off in the case where the ground pin becomes disconnected. Device summary Order codes Package SO-28 (double island) September 2013 Tube Tape and reel VNQ830 VNQ83013TR Doc ID 7390 Rev 5 1/28 www.st.com 1 Contents VNQ830 Contents 1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 18 r P e 3.1.1 Solution 1: a resistor in the ground line (RGND only) . . . . . . . . . . . . . . 18 3.1.2 Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . 19 t e l o 3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.3 MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.4 Open load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.5 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . . 21 ) (s s b O t c u Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.1 5 d o r SO-28 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 P e Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 let so b O 2/28 u d o Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.1 6 ) s ( ct 5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.2 SO-28 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Doc ID 7390 Rev 5 VNQ830 List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal data (per island) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 VCC - output diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Switching (VCC = 13 V; Tj = 25 °C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Thermal calculation according to the PCB heatsink area . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 SO-28 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O Doc ID 7390 Rev 5 3/28 List of figures VNQ830 List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 On-state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Open-load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Open-load off-state voltage detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 SO-28 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 23 Thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Thermal fitting model of a quad channel HSD in SO-28 . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 SO-28 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 SO-28 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 SO-28 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O 4/28 Doc ID 7390 Rev 5 VNQ830 1 Block diagram and pin description Block diagram and pin description Figure 1. Block diagram VCC1,2 Vcc OVERVOLTAGE CLAMP UNDERVOLTAGE GND1,2 ) s ( ct CLAMP 1 OUTPUT1 INPUT1 DRIVER 1 u d o CLAMP 2 STATUS1 CURRENT LIMITER 1 Pr DRIVER 2 LOGIC OVERTEMP. 1 OPENLOAD ON 1 ete OUTPUT2 CURRENT LIMITER 2 INPUT2 ol OPENLOAD OFF 1 STATUS2 ) (s OVERTEMP. 2 Vcc CLAMP ro GND3,4 P e INPUT3 s b O t e l o du ct s b O OPENLOAD ON 2 OPENLOAD OFF 2 VCC3,4 OVERVOLTAGE UNDERVOLTAGE CLAMP 3 OUTPUT3 DRIVER 3 CLAMP 4 STATUS3 CURRENT LIMITER 3 LOGIC DRIVER 4 OUTPUT4 OVERTEMP. 3 OPENLOAD ON 3 CURRENT LIMITER 4 INPUT4 OPENLOAD OFF 3 OPENLOAD ON 4 STATUS4 OPENLOAD OFF 4 OVERTEMP. 4 Doc ID 7390 Rev 5 5/28 Block diagram and pin description Figure 2. VNQ830 Configuration diagram (top view) VCC1,2 1 VCC1,2 28 GND 1,2 OUTPUT1 INPUT1 OUTPUT1 STATUS1 OUTPUT1 STATUS2 OUTPUT2 INPUT2 OUTPUT2 VCC1,2 OUTPUT2 VCC3,4 OUTPUT3 GND 3,4 OUTPUT3 INPUT3 OUTPUT3 u d o r P e OUTPUT4 STATUS3 STATUS4 t e l o INPUT4 VCC3,4 Table 2. 14 ) (s t c u s b O 15 OUTPUT4 OUTPUT4 VCC3,4 Suggested connections for unused and not connected pins Connection / pin d o r Floating Status N.C. Output Input X X X X P e To ground X t e l o s b O 6/28 ) s ( ct Doc ID 7390 Rev 5 Through 10KΩ resistor VNQ830 Electrical specifications 2 Electrical specifications 2.1 Absolute maximum ratings Stressing the device above the rating listed in the “Absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality document. Table 3. Absolute maximum ratings Symbol Parameter VCC DC supply voltage -VCC Reverse DC supply voltage -IGND DC reverse ground pin current IOUT DC output current -IOUT Reverse DC output current IIN Internally limited A -6 A +/- 10 mA +/- 10 mA 4000 4000 5000 5000 V V V V Maximum switching energy (L = 2.5 mH; RL = 0 Ω; Vbat = 13.5 V; Tjstart = 150 °C; IL = 9 A) 140 mJ Power dissipation (per island) at Tlead = 25 °C 6.25 W Internally limited °C -55 to 150 °C DC input current O e t e ol s b O VESD Tj Tstg Pr V mA ) (s t c u d o r P e bs V -200 Electrostatic discharge (human body model: R=1.5KΩ; C = 100pF) – INPUT – STATUS – OUTPUT – VCC Ptot 41 -0.3 DC Status current t e l o Unit u d o ISTAT EMAX ) s ( ct Value Junction operating temperature Storage temperature Doc ID 7390 Rev 5 7/28 Electrical specifications 2.2 VNQ830 Thermal data Table 4. Thermal data (per island) Symbol Parameter Value Unit 20 °C/W Rthj-lead Thermal resistance junction-lead Rthj-amb Thermal resistance junction-ambient (one chip ON) 60(1) 44(2) °C/W Rthj-amb Thermal resistance junction-ambient (two chips ON) 46(1) 31(2) °C/W 1. When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35 µm thick) connected to all VCC pins. Horizontal mounting and no artificial air flow. ) s ( ct 2. When mounted on a standard single-sided FR-4 board with 6cm2 of Cu (at least 35 µm thick) connected to all VCC pins. Horizontal mounting and no artificial air flow. 2.3 u d o Electrical characteristics r P e Values specified in this section are for 8V < VCC < 36V; -40 °C < Tj < 150 °C, unless otherwise stated. Figure 3. Current and voltage conventions IS3,4 )- VCC3,4 s ( t c IIN1 ISTAT1 VIN1 IIN2 u d o VSTAT1 VIN2 r P e let o s b O Note: 8/28 ISTAT2 IIN3 VSTAT2 ISTAT3 VIN3 VSTAT3 IIN4 VIN4 ISTAT4 VSTAT4 s b O t e l o VCC3,4 IS1,2 VCC1,2 VF1 (*) INPUT1 VCC1,2 IOUT1 STATUS1 OUTPUT1 VOUT1 IOUT2 INPUT2 OUTPUT2 STATUS2 IOUT3 INPUT3 VOUT2 OUTPUT3 STATUS3 IOUT4 INPUT4 OUTPUT4 STATUS4 GND3,4 VOUT4 GND1,2 IGND3,4 VFn = VCCn - VOUTn during reverse battery condition. Doc ID 7390 Rev 5 IGND1,2 VOUT3 VNQ830 Electrical specifications Table 5. Power Symbol Parameter VCC Operating supply voltage VUSD Test conditions Min. 5.5 13 36 V Undervoltage shutdown 3 4 5.5 V VOV Overvoltage shutdown 36 RON On-state resistance IS Supply current 65 mΩ IOUT = 2 A; VCC > 8 V 130 mΩ Off-state; VCC = 13 V; VIN = VOUT = 0 V 12 40 µA Off-state; VCC = 13 V; VIN = VOUT = 0 V; Tj = 25 °C 12 25 µA 7 mA 0 50 µA -75 0 µA Pr IL(off2) Off-state output current VIN = 0 V; VOUT = 3.5 V IL(off3) Off-state output current VIN = VOUT = 0 V; VCC = 13 V; Tj = 125 °C 5 µA IL(off4) Off-state output current VIN = VOUT = 0 V; VCC = 13 V; Tj = 25 °C 3 µA TTSD TR Thyst ete tSDL Note: 5 Off-state output current VIN = VOUT = 0 V e t e ol ) (s Protections Symbol O u d o ) s ( ct IL(off1) Table 6. bs V IOUT = 2 A; Tj = 25 °C On-state; VCC = 13 V; VIN = 5 V; IOUT = 0 A ol Typ. Max. Unit Parameter t c u s b O Test conditions Shutdown temperature od Reset temperature Pr Ilim Vdemag Min. Typ. Max. Unit 150 175 200 °C 135 Thermal hysteresis 7 Status delay in overload conditions °C 15 Tj > TTSD VCC = 13 V Current limitation 6 9 5.5 V < VCC < 36 V Turn-off output clamp voltage IOUT = 2 A; L = 6 mH °C 20 µs 15 A 15 A VCC - VCC - VCC 41 48 55 V To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles. Table 7. VCC - output diode Symbol Parameter Test conditions VF Forward on voltage -IOUT = 1.2 A; Tj = 150 °C Doc ID 7390 Rev 5 Min. Typ. Max. Unit — — 0.6 V 9/28 Electrical specifications Table 8. VNQ830 Switching (VCC = 13 V; Tj = 25 °C) Symbol Parameter Max. Unit RL = 6.5 Ω from VIN rising edge to VOUT = 1.3 V (see Figure 5) — 30 — µs td(off) Turn-off delay time RL = 6.5 Ω from VIN falling edge to VOUT = 11.7 V (see Figure 5) — 30 — µs RL = 6.5 Ω from VOUT = 1.3 V dVOUT/dt(on) Turn-on voltage slope to VOUT = 10.4 V (see Figure 5) — See Figure 10 — V/µs RL = 6.5 Ω from VOUT = 11.7 V dVOUT/dt(off) Turn-off voltage slope to VOUT = 1.3 V (see Figure 5) — See Figure 12 Parameter Test conditions Input low level IIL Low level input current VIH Input high level IIH High level input current VI(hyst) Input hysteresis voltage ) (s Input clamp voltage Table 10. ct u d o u d o e t e ol Pr Min. Typ. — V/µs Max. Unit 1.25 V VIN = 1.25 V 1 µA s b O 3.25 V VIN = 3.25 V 10 0.5 IIN = 1 mA µA V 6 6.8 IIN = -1 mA 8 -0.7 V V Status pin Pr Symbol ) s ( ct Logic inputs VIL VICL Parameter Test conditions Min. Typ. Max. Unit Status low output voltage ISTAT = 1.6 mA 0.5 V Status leakage current Normal operation; VSTAT = 5 V 10 µA CSTAT Status pin Input capacitance Normal operation; VSTAT = 5 V 100 pF 8 V VSCL Status clamp voltage VSTAT e t e l ILSTAT Table 11. ISTAT = 1 mA 6 ISTAT = - 1 mA 6.8 -0.7 V Open-load detection Symbol Parameter IOL Open-load on-state detection threshold VIN = 5 V Open-load on-state detection delay IOUT = 0 A VOL Open-load off-state voltage detection threshold VIN = 0 V tDOL(off) Open-load detection delay at turn-off tDOL(on) 10/28 Typ. Turn-on delay time Symbol O Min. td(on) Table 9. o s b Test conditions Doc ID 7390 Rev 5 Test conditions Min. 50 1.5 Typ. Max. Unit 100 200 mA 200 µs 3.5 V 1000 µs 2.5 VNQ830 Electrical specifications Figure 4. Status timings OPEN LOAD STATUS TIMING (with external pull-up) IOUT < IOL VOUT > VOL OVER TEMP STATUS TIMING Tj > TTSD VINn VINn VSTATn VSTATn tSDL tDOL(off) Figure 5. tDOL(on) ) s ( ct u d o Switching characteristics r P e VOUTn t e l o 80% dVOUT/dt(on) ) (s s b O 90% dVOUT/dt(off) 10% ct u d o VINn tSDL td(on) t td(off) r P e t e l o t s b O Doc ID 7390 Rev 5 11/28 Electrical specifications Table 12. VNQ830 Truth table Conditions Input Output Status Normal operation L H L H H H Current limitation L H H L X X H (Tj < TTSD) H (Tj > TTSD) L Overtemperature L H L L H L Undervoltage L H L L X X Overvoltage L H L L Output voltage > VOL L H H H Output current < IOL L H L H ) (s r P e t e l o s b O t c u d o r P e t e l o s b O 12/28 u d o Doc ID 7390 Rev 5 ) s ( ct H H L H H L VNQ830 Electrical specifications Table 13. Electrical transient requirements (part 1) ISO T/R Test level 7637/1 Test pulse I II III IV Delays and impedance 1 - 25V - 50V - 75V - 100V 2ms, 10Ω 2 + 25V + 50V + 75V + 100V 0.2ms, 10Ω 3a - 25V - 50V - 100V - 150V 0.1µs, 50Ω 3b + 25V + 50V + 75V + 100V 0.1µs, 50Ω 4 - 4V - 5V - 6V - 7V 100ms, 0.01Ω 5 + 26.5V + 46.5V + 66.5V + 86.5V 400ms, 2Ω Table 14. ISO T/R Test pulse I II 1 C C 2 C C 3a C 3b C 4 C 5 C Class s b O t e l o E C C C C C C C C C C E E E ol s b O C s ( t c ete IV C C )- Pr III u d o Electrical transient requirements (part 3) r P e C u d o Test level 7637/1 Table 15. ) s ( ct Electrical transient requirements (part 2) Contents All functions of the device are performed as designed after exposure to disturbance. One or more functions of the device is not performed as designed after exposure and cannot be returned to proper operation without replacing the device. Doc ID 7390 Rev 5 13/28 Electrical specifications Figure 6. VNQ830 Waveforms NORMAL OPERATION INPUTn LOAD VOLTAGEn STATUSn UNDERVOLTAGE VUSDhyst VCC VUSD ) s ( ct INPUTn LOAD VOLTAGEn STATUS r P e OVERVOLTAGE VCC VOV t e l o VCC INPUTn LOAD VOLTAGEn STATUSn ) (s t c u INPUTn od LOAD VOLTAGEn r P e STATUSn t e l o bs O s b O OPEN LOAD with external pull-up VOUT > VOL VOL OPEN LOAD without external pull-up INPUTn LOAD VOLTAGEn STATUSn Tj TTSD TR OVERTEMPERATURE INPUTn LOAD CURRENTn STATUSn 14/28 u d o undefined Doc ID 7390 Rev 5 VNQ830 Electrical specifications 2.4 Electrical characteristics curves Figure 7. Off-state output current Figure 8. IL(off1) (uA) High level input current Iih (uA) 2.5 5 2.25 4.5 Off state Vcc=36V Vin=Vout=0V 2 1.75 Vin=3.25V 4 3.5 1.5 3 1.25 2.5 1 2 0.75 ) s ( ct 1.5 0.5 1 0.25 0.5 0 -25 0 25 50 75 100 125 150 175 -50 -25 0 Figure 9. 150 175 bs 7.8 700 Iin=1mA 7.6 O ) 7.4 7.2 s ( t c 7 6.8 du ro P e 6 -50 -25 0 25 t e l o Figure 11. 50 75 75 150 175 150 175 100 125 t e l o dVout/dt(on) (V/ms) 800 8 6.2 75 Figure 10. Turn-on voltage slope Vicl (V) 6.4 50 Tc (°C) Input clamp voltage 6.6 25 r P e Tc (°C) 600 Vcc=13V Rl=6.5Ohm 500 400 300 200 100 0 100 125 150 -50 175 -25 0 25 50 100 125 Tc (ºC) Tc (°C) Overvoltage shutdown Figure 12. Turn-off voltage slope bs O u d o 0 -50 Vov (V) dVout/dt(off) (V/ms) 50 600 48 550 Vcc=13V Rl=6.5Ohm 46 500 44 450 42 400 40 38 350 36 300 34 250 32 30 200 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) -50 -25 0 25 50 75 100 125 Tc (ºC) Doc ID 7390 Rev 5 15/28 Electrical specifications VNQ830 Figure 13. ILIM vs Tcase Figure 14. On-state resistance vs VCC Ilim (A) Ron (mOhm) 20 120 Tc=150°C 110 18 Vcc=13V 100 16 90 14 80 12 70 10 60 8 50 Tc=25°C 40 6 Tc= - 40°C 30 4 10 0 0 -50 -25 0 25 50 75 100 125 150 Iout=2A 175 5 10 15 20 Tc (°C) 30 u d o 35 40 Figure 16. Input hysteresis voltage Vih (V) Vhyst (V) 3.6 1.5 s b O 1.3 3.2 1.2 3 r P e t e l o 1.4 3.4 1.1 )- 2.8 s ( t c 2.6 2.4 u d o 2.2 2 -50 -25 0 Pr 25 50 75 100 1 0.9 0.8 0.7 0.6 0.5 125 150 175 -50 -25 0 25 Tc (°C) e t e l so Vil (V) 160 2.6 100 125 150 175 2.4 Iout=2A Vcc=8V; 13V & 36V 120 75 Figure 18. Input low level Ron (mOhm) 140 50 Tc (°C) Figure 17. On-state resistance vs Tcase 2.2 100 2 80 1.8 60 1.6 40 1.4 20 1.2 0 1 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) 16/28 25 Vcc (V) Figure 15. Input high level b O ) s ( ct 20 2 -50 -25 0 25 50 75 Tc (°C) Doc ID 7390 Rev 5 100 125 150 175 VNQ830 Electrical specifications Figure 19. Status leakage current Figure 20. Status low output voltage Ilstat (uA) Vstat (V) 0.05 0.8 0.7 Istat=1.6mA 0.04 0.6 Vstat=5V 0.5 0.03 0.4 0.02 0.3 0.2 0.01 ) s ( ct 0.1 0 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 Tc (°C) 150 7.8 140 130 7.4 7.2 ) s ( ct 6.8 6.6 du -50 -25 0 e t e ol o r P 25 50 75 u d o 100 150 175 t e l o bs Istat=1mA 7.6 7 125 r P e Iol (mA) 8 6 100 Figure 22. Open-load on-state detection threshold Vscl (V) 6.2 75 Tc (°C) Figure 21. Status clamp voltage 6.4 50 -O Vcc=13V Vin=5V 120 110 100 90 80 70 60 50 125 150 175 Tc (°C) -50 -25 0 25 50 75 100 125 150 175 Tc (°C) Figure 23. Open-load off-state voltage detection threshold s b O Vol (V) 5 4.5 Vin=0V 4 3.5 3 2.5 2 1.5 1 0.5 0 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) Doc ID 7390 Rev 5 17/28 Application information 3 VNQ830 Application information Figure 24. Application schematic +5V +5V +5V VCC1,2 VCC3,4 Rprot STATUS1 Rprot INPUT1 ) s ( ct Dld Rprot STATUS2 Rprot INPUT2 OUTPUT1 u d o r P e μC Rprot Rprot INPUT3 Rprot STATUS4 )- Rprot s b O e t e ol Note: s b O 3.1 3.1.1 OUTPUT4 s ( t c +5V +5V GND1,2 GND3,4 RGND VGND DGND Channels 3 and 4 have the same internal circuit as channel 1 and 2. GND protection network against reverse battery This section provides two solutions for implementing a ground protection network against reverse battery. Solution 1: a resistor in the ground line (RGND only) This can be used with any type of load. The following show how to dimension the RGND resistor: 18/28 OUTPUT3 INPUT4 du o r P t e l o STATUS3 OUTPUT2 1. RGND ≤ 600 mV / 2(IS(on)max) 2. RGND ≥ (-VCC) / (-IGND) Doc ID 7390 Rev 5 VNQ830 Application information where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. Power dissipation in RGND (when VCC < 0 during reverse battery situations) is: PD = (-VCC)2/ RGND This resistor can be shared amongst several different HSDs. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that, if the microprocessor ground is not shared by the device ground, then the RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift will vary depending on how many devices are ON in the case of several high side drivers sharing the same RGND . ) s ( ct If the calculated power dissipation requires the use of a large resistor, or several devices have to share the same resistor, then ST suggests using solution 2 below. 3.1.2 Solution 2: a diode (DGND) in the ground line u d o r P e A resistor (RGND = 1 kΩ) should be inserted in parallel to DGND if the device will be driving an inductive load. This small signal diode can be safely shared amongst several different HSD. Also in this case, the presence of the ground network will produce a shift (≈600 mV) in the input threshold and the status output values if the microprocessor ground is not common with the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network. Series resistor in INPUT and STATUS lines are also required to prevent that, during battery voltage transient, the current exceeds the Absolute Maximum Rating. Safest configuration for unused INPUT and STATUS pin is to leave them unconnected. t e l o ) (s s b O t c u 3.2 Load dump protection d o r Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the VCC maximum DC rating. The same applies if the device is subject to transients on the VCC line that are greater than those shown in the ISO T/R 7637/1 table. P e 3.3 s b O t e l o MCU I/O protection If a ground protection network is used and negative transients are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the microcontroller I/O pins from latching up. The value of these resistors is a compromise between the leakage current of microcontroller and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit microcontroller I/Os: -VCCpeak / Ilatchup ≤ Rprot ≤ (VOHμC - VIH - VGND) / IIHmax Doc ID 7390 Rev 5 19/28 Application information VNQ830 Example For the following conditions: VCCpeak = -100 V Ilatchup ≥ 20 mA VOHμC ≥ 4.5 V 5 kΩ ≤ Rprot ≤ 65 kΩ. Recommended values are: Rprot = 10 kΩ 3.4 ) s ( ct Open load detection in off-state Off-state open load detection requires an external pull-up resistor (RPU) connected between OUTPUT pin and a positive supply voltage (VPU) like the +5V line used to supply the microprocessor. u d o r P e The external resistor has to be selected according to the following requirements: 1. No false open load indication when load is connected: in this case we have to avoid VOUT to be higher than VOlmin; this results in the following condition t e l o VOUT = (VPU / (RL + RPU))RL < VOlmin. 2. No misdetection when load is disconnected: in this case the VOUT has to be higher than VOLmax; this results in the following condition RPU < (VPU - VOLmax) / IL(off2). s b O Because Is(OFF) may significantly increase if Vout is pulled high (up to several mA), the pullup resistor RPU should be connected to a supply that is switched OFF when the module is in standby. ) (s t c u Figure 25. Open-load detection in off-state od r P e t e l o s b O V batt. VPU VCC RPU INPUT DRIVER + LOGIC IL(off2) OUT + R STATUS VOL GROUND 20/28 Doc ID 7390 Rev 5 RL VNQ830 3.5 Application information Maximum demagnetization energy (VCC = 13.5V) Figure 26. Maximum turn-off current versus load inductance ILMAX (A) 100 ) s ( ct 10 u d o A r P e C t e l o 1 0.1 1 ) (s s b O 10 B 100 L(mH) t c u A = single pulse at TJstart = 150 °C B= repetitive pulse at TJstart = 100 °C d o r C= repetitive pulse at TJstart = 125 °C P e VIN, IL let o s b Demagnetization Demagnetization Demagnetization O t Note: Values are generated with RL = 0 Ω. In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. Doc ID 7390 Rev 5 21/28 Package and PCB thermal data VNQ830 4 Package and PCB thermal data 4.1 SO-28 thermal data Figure 27. SO-28 PC board ) s ( ct u d o r P e t e l o Layout condition of Rth and Zth measurements (PCB FR4 area = 58mm x 58mm, PCB thickness = 2mm, Cu thickness = 35µm, Copper areas: 0.5 cm2, 3 cm2, 6 cm2). Note: Table 16. s b O Thermal calculation according to the PCB heatsink area )- Chip 1 Chip 2 ON OFF RthA x Pdchip1 + Tamb RthC x Pdchip1 + Tamb OFF ON RthC x Pdchip2 + Tamb RthA x Pdchip2 + Tamb ON ON RthB x (Pdchip1 + Pdchip2) + Tamb RthB x (Pdchip1 + Pdchip2) + Tamb Pdchip1 = Pdchip2 (RthA x Pdchip1) + RthC x Pdchip2 + Tamb (RthA x Pdchip2) + RthC x Pdchip1 + Tamb Pdchip1 ≠ Pdchip2 ON e t e ol Tjchip1 c u d o r P ON t(s Tjchip2 Note RthA = thermal resistance junction to ambient with one chip ON s b O 22/28 RthB = thermal resistance junction to ambient with both chips ON and Pdchip1 = Pdchip2 RthC = mutual thermal resistance Doc ID 7390 Rev 5 VNQ830 Package and PCB thermal data Figure 28. Rthj-amb vs PCB copper area in open box free air condition RTHj_am b (°C/W) 70 60 50 RthA 40 ) s ( ct RthB 30 RthC u d o 20 r P e 10 0 1 2 3 4 5 PCB Cu heatsink area (cm ^2)/island 6 7 t e l o s b O Figure 29. Thermal impedance junction ambient single pulse ) (s ZTH (°C/W) 1000 100 t c u d o r Footprint P e s b O t e l o 6 cm 2 10 1 0.1 0.0001 0.001 0.01 0.1 1 Time (s) Doc ID 7390 Rev 5 10 100 1000 23/28 Package and PCB thermal data VNQ830 Equation 1: pulse calculation formula Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ ) where δ = tp ⁄ T Figure 30. Thermal fitting model of a quad channel HSD in SO-28 Tj_1 C1 C2 C3 C4 C5 C6 R1 R2 R3 R4 R5 R6 Pd1 C13 Tj_2 ) s ( ct C14 R13 R14 Pd2 R17 Tj_3 C7 C8 C9 R7 R8 R9 C15 C16 ) (s R15 Pd4 R16 ol ete bs O 24/28 u d o r P e R10 C11 R11 C12 R12 s b O ct Table 17. C10 t e l o Pd3 Tj_4 u d o R18 T_amb Thermal parameters Pr Area / island (cm2) Footprint R1 = R7 = R13 = R15 (°C/W) 0.15 R2 = R8 = R14 = R16 (°C/W) 0.7 R3 = R9 (°C/W) 1.8 R4 = R10 (°C/W) 10 R5 = R11 (°C/W) 15 R6 = R12 (°C/W) 30 C1 = C7 = C13 = C15 (W.s/°C) 0.0005 C2 = C8 = C14 = C16 (W.s/°C) 3E-03 C3 = C9 (W.s/°C) 1.50E-02 C4 = C10 (W.s/°C) 0.15 C5 = C11 (W.s/°C) 1.5 C6 = C12 (W.s/°C) 5 R17 = R18 (°C/W) 150 Doc ID 7390 Rev 5 6 13 8 VNQ830 Package and packing information 5 Package and packing information 5.1 ECOPACK® packages In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Figure 31. SO-28 package dimensions ) s ( ct u d o r P e t e l o ) (s Table 18. SO-28 mechanical data Symbol A O bs t c u od r P e t e l o s b O Min. Millimeters Typ. Max. 2.65 a1 0.10 0.30 b 0.35 0.49 b1 0.23 0.32 C 0.50 c1 45° (typ.) D 17.7 18.1 E 10.00 10.65 e 1.27 e3 16.51 F 7.40 7.60 L 0.40 1.27 S 8° (max.) Doc ID 7390 Rev 5 25/28 Package and packing information 5.2 VNQ830 SO-28 packing information Figure 32. SO-28 tube shipment (no suffix) Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1) C B 28 700 532 3.5 13.8 0.6 All dimensions are in mm. ) s ( ct u d o A r P e Figure 33. SO-28 tape and reel shipment (suffix “TR”) let so ) (s b O Reel dimensions Base Q.ty Bulk Q.ty A (max) B (min) C (± 0.2) F G (+ 2 / -0) N (min) T (max) t c u 1000 1000 330 1.5 13 20.2 16.4 60 22.4 d o r P e Tape dimensions According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 t e l o s b O Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 (± 0.1) P D (± 0.1/-0) D1 (min) F (± 0.05) K (max) P1 (± 0.1) All dimensions are in mm. 16 4 12 1.5 1.5 7.5 6.5 2 End Start Top No components Components No components cover tape 500mm min Empty components pockets saled with cover tape. User direction of feed 26/28 Doc ID 7390 Rev 5 500mm min VNQ830 6 Revision history Revision history Table 19. Document revision history Date Revision 21-Jun-2004 1 Initial release. 2 Emax value (page 1). Current and voltage convention update (page 3). Configuration diagram (top view) & suggested connections for unused and n.c. pins insertion (page 3). 6 cm2 Cu condition insertion in Thermal Data table (page 4). VCC - output diode section update (page 5). Protections note insertion (page 5). On-state resistance Vs VCC curve conditions correction (page 13). Turn-off voltage slope curve conditions correction (page 14). "Maximum turn-off current versus load inductance" curve modification (page 15). "SO-28 thermal impedance junction ambient single pulse”: curve modification (page 17). Revision history table insertion (page 20). Disclaimers update (page 21). 03-May-2006 Changes ) s ( ct u d o r P e t e l o 25-Nov-2008 3 07-Feb-2011 4 ) (s t c u 20-Sep-2013 5 s b O Document reformatted and restructured. Added contents, list of tables and figures. Added ECOPACK® packages information. Updated Figure 5: Switching characteristics Updated Disclaimer. d o r P e t e l o s b O Doc ID 7390 Rev 5 27/28 VNQ830 ) s ( ct Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. u d o r P e All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. t e l o No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. ) (s s b O UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. t c u ST PRODUCTS ARE NOT DESIGNED OR AUTHORIZED FOR USE IN: (A) SAFETY CRITICAL APPLICATIONS SUCH AS LIFE SUPPORTING, ACTIVE IMPLANTED DEVICES OR SYSTEMS WITH PRODUCT FUNCTIONAL SAFETY REQUIREMENTS; (B) AERONAUTIC APPLICATIONS; (C) AUTOMOTIVE APPLICATIONS OR ENVIRONMENTS, AND/OR (D) AEROSPACE APPLICATIONS OR ENVIRONMENTS. WHERE ST PRODUCTS ARE NOT DESIGNED FOR SUCH USE, THE PURCHASER SHALL USE PRODUCTS AT PURCHASER’S SOLE RISK, EVEN IF ST HAS BEEN INFORMED IN WRITING OF SUCH USAGE, UNLESS A PRODUCT IS EXPRESSLY DESIGNATED BY ST AS BEING INTENDED FOR “AUTOMOTIVE, AUTOMOTIVE SAFETY OR MEDICAL” INDUSTRY DOMAINS ACCORDING TO ST PRODUCT DESIGN SPECIFICATIONS. PRODUCTS FORMALLY ESCC, QML OR JAN QUALIFIED ARE DEEMED SUITABLE FOR USE IN AEROSPACE BY THE CORRESPONDING GOVERNMENTAL AGENCY. d o r P e t e l o s b O Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. © 2013 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 28/28 Doc ID 7390 Rev 5
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