VNQ830M_04

® VNQ830M QUAD CHANNEL HIGH SIDE DRIVER TYPE VNQ830M (*) Per each channel RDS(on) 60 mΩ (*) IOUT 6 A (*) VCC 36 V CMOS COMPATIBLE INPUTS OPEN DRAIN STATUS OUTPUTS s O N STATE OPEN LOAD DETECTION s O FF STATE OPEN LOAD DETECTION s SHORTED LOAD PROTECTION s UNDERVOLTAGE AND OVERVOLTAGE SHUTDOWN s LOSS OF GROUND PROTECTION s VERY LOW STAND-BY CURRENT s s s SO-28 (DOUBLE ISLAND) ORDER CODES PACKAGE TUBE VNQ830M T&R VNQ830M13TR SO-28 REVERSE BATTERY PROTECTION (**) DESCRIPTION The VNQ830M is a quad HSD formed by assembling two VND830M chips in the same SO28 package. The VND830M is a monolithic device made by using| STMicroelectronics VIPower M03 Technology. The VNQ830M is intended for driving any type of multiple loads with one side connected to ground. Active VCC pin voltage clamp protects the device ABSOLUTE MAXIMUM RATING Symbol VCC - VCC - IGND IOUT - IOUT IIN ISTAT Parameter against low energy spikes (see ISO7637 transient compatibility table). Active current limitation combined with thermal shutdown and automatic restart protects the device against overload. The device detects open load condition both in on and off state. The openload threshold is aimed at detecting the 5W/12V standard bulb as an openload fault in the on state. Output shorted to VCC is detected in the off state. Device automatically turns off in case of ground pin disconnection. DC Supply Voltage Reverse DC Supply Voltage DC Reverse Ground Pin Current DC Output Current Reverse DC Output Current DC Input Current DC Status Current Electrostatic Discharge (Human Body Model: R=1.5KΩ; C=100pF) - INPUT - STATUS - OUTPUT - VCC Power Dissipation Tpins=25°C Maximum Switching Energy (L=1mH; RL=0Ω; Vbat=13.5V; Tjstart=150ºC; IL=10.5A) Junction Operating Temperature Storage Temperature Value 41 - 0.3 - 200 Internally Limited -6 +/- 10 +/- 10 4000 4000 5000 5000 6.25 77 Internally Limited - 55 to 150 Unit V V mA A A mA mA V V V V W mJ °C °C VESD Ptot EMAX Tj Tstg (**) See application schematic at page 9 Rev. 1 1/21 July 2004 VNQ830M BLOCK DIAGRAM VCC1,2 Vcc CLAMP OVERVOLTAGE UNDERVOLTAGE GND1,2 CLAMP 1 OUTPUT1 DRIVER 1 CLAMP 2 INPUT1 STATUS1 CURRENT LIMITER 1 LOGIC OVERTEMP. 1 OPENLOAD ON 1 CURRENT LIMITER 2 INPUT2 OPENLOAD OFF 1 STATUS2 OPENLOAD ON 2 DRIVER 2 OUTPUT2 OPENLOAD OFF 2 OVERTEMP. 2 VCC3,4 Vcc CLAMP OVERVOLTAGE UNDERVOLTAGE GND3,4 INPUT3 CLAMP 3 OUTPUT3 DRIVER 3 CLAMP 4 STATUS3 CURRENT LIMITER 3 OVERTEMP. 3 LOGIC OPENLOAD ON 3 CURRENT LIMITER 4 INPUT4 OPENLOAD OFF 3 STATUS4 OPENLOAD OFF 4 OVERTEMP. 4 OPENLOAD ON 4 DRIVER 4 OUTPUT4 2/21 VNQ830M CURRENT AND VOLTAGE CONVENTIONS IS3,4 VCC3,4 IIN1 VIN1 VSTAT1 VIN2 VSTAT2 VIN3 VSTAT3 ISTAT1 IIN2 ISTAT2 IIN3 ISTAT3 IIN4 INPUT1 STATUS1 INPUT2 STATUS2 INPUT3 STATUS3 INPUT4 STATUS4 GND3,4 IGND3,4 OUTPUT3 IOUT4 OUTPUT4 GND1,2 IGND1,2 VOUT4 VOUT3 OUTPUT2 IOUT3 VOUT2 OUTPUT1 IOUT2 IOUT1 VOUT1 VCC3,4 VCC1,2 IS1,2 VF1 (*) VCC1,2 VIN4 ISTAT4 VSTAT4 (*) VFn = VCCn - VOUTn during reverse battery condition CONFIGURATION DIAGRAM (TOP VIEW) & SUGGESTED CONNECTIONS FOR UNUSED AND N.C. PINS VCC1,2 GND 1,2 INPUT1 STATUS1 STATUS2 INPUT2 VCC1,2 VCC3,4 GND 3,4 INPUT3 STATUS3 STATUS4 INPUT4 VCC3,4 1 28 VCC1,2 OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT3 OUTPUT3 OUTPUT3 OUTPUT4 OUTPUT4 OUTPUT4 14 15 VCC3,4 Connection / Pin Floating To Ground Status X N.C. X X Output X Input X Through 10KΩ resistor 3/21 VNQ830M THERMAL DATA (Per island) Symbol Rthj-lead Rthj-amb Rthj-amb (1) Parameter Thermal Resistance Junction-lead per chip Thermal Resistance Junction-ambient Thermal Resistance Junction-ambient (two chips ON) Value 20 60 (1) 46 (1) 44 (2) 31 (2) Unit °C/W °C/W °C/W When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35µm thick) connected to all VCC pins. Horizontal mounting and no artificial air flow. (2) When mounted on a standard single-sided FR-4 board with 6cm2 of Cu (at least 35µm thick) connected to all VCC pins. Horizontal mounting and no artificial air flow. ELECTRICAL CHARACTERISTICS (8V VOL Output Current < IOL INPUT L H L H H L H L H L H L H L H OUTPUT L H L X X L L L L L L H H L H STATUS H H H (Tj < TTSD) H (Tj > TTSD) L H L X X H H L H H L 6/21 VNQ830M ELECTRICAL TRANSIENT REQUIREMENTS ON VCC PIN ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 CLASS C E I -25 V +25 V -25 V +25 V -4 V +26.5 V II -50 V +50 V -50 V +50 V -5 V +46.5 V TEST LEVELS III -75 V +75 V -100 V +75 V -6 V +66.5 V TEST LEVELS RESULTS II III C C C C C C C C C C E E IV -100 V +100 V -150 V +100 V -7 V +86.5 V Delays and Impedance 2 ms 10 Ω 0.2 ms 10 Ω 0.1 µs 50 Ω 0.1 µs 50 Ω 100 ms, 0.01 Ω 400 ms, 2 Ω I C C C C C C IV C C C C C E CONTENTS All functions of the device are performed as designed after exposure to disturbance. One or more functions of the device is not performed as designed after exposure and cannot be returned to proper operation without replacing the device. 7/21 VNQ830M Figure 1: Waveforms NORMAL OPERATION INPUTn LOAD VOLTAGEn STATUSn UNDERVOLTAGE VUSDhyst VUSD INPUTn LOAD VOLTAGEn STATUS undefined VCC OVERVOLTAGE VCCVOL VCC>VOV Tj INPUTn LOAD CURRENTn STATUSn TTSD TR OVERTEMPERATURE 8/21 1 VNQ830M APPLICATION SCHEMATIC +5V +5V +5V VCC1,2 Rprot STATUS1 VCC3,4 Rprot INPUT1 Dld Rprot STATUS2 OUTPUT1 Rprot µC INPUT2 Rprot STATUS3 OUTPUT2 Rprot OUTPUT3 INPUT3 Rprot STATUS4 OUTPUT4 INPUT4 GND1,2 GND3,4 Rprot RGND +5V +5V VGND DGND Note: Channels 3 & 4 have the same internal circuit as channel 1 & 2. GND PROTECTION REVERSE BATTERY NETWORK AGAINST Solution 1: Resistor in the ground line (RGND only). This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1) RGND ≤ 600mV / 2(IS(on)max ). 2) RGND ≥ (−VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device’s datasheet. Power Dissipation in RGND (when VCC