VNS14NV04PTR-E

VNS14NV04P-E "OMNIFET II" fully autoprotected Power MOSFET Features Type RDS(on) Ilim Vclamp VNS14NV04P-E 35 mΩ 12 A 40 V ■ Linear current limitation ■ Thermal shutdown ■ Short circuit protection ■ Integrated clamp ■ Low current drawn from input pin ■ Diagnostic feedback through input pin ■ ESD protection ■ Direct access to the gate of the Power MOSFET (analog driving) ■ Compatible with standard Power MOSFET Table 1. Description The VNS14NV04P-E is monolithic device made using STMicroelectronics™ VIPower™ M0 Technology, intended for replacement of standard Power MOSFETs in DC to 50 KHz applications. Built-in thermal shutdown, linear current limitation and overvoltage clamp protect the chip in harsh environments. Fault feedback can be detected by monitoring the voltage at the input pin. Device summary Order codes Package SO-8 September 2013 Tube Tape and reel VNS14NV04P-E VNS14NV04PTR-E Doc ID 15561 Rev 3 1/22 www.st.com 1 Contents VNS14NV04P-E Contents 1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 Electrical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.1 Absolute maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 Package thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.1 6 7 2/22 SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 6.1 ECOPACK® . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 6.2 SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 6.3 SO-8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Doc ID 15561 Rev 3 VNS14NV04P-E List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Absolute maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Doc ID 15561 Rev 3 3/22 List of figures VNS14NV04P-E List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. 4/22 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Connection diagram SO-8 package (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Switching time test circuit for resistive load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Test circuit for diode recovery times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Unclamped inductive load test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Unclamped inductive waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Input charge test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Source-drain diode forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Static drain source on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Derating curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Static drain-source on resistance vs. input voltage (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . 13 Static drain-source on resistance vs. input voltage (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . 13 Transconductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Static drain-source on resistance vs. Id . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Transfer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Turn-on current slope (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Turn-on current slope (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Input voltage vs. input charge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Turn-off drain source voltage slope (part 1/2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Turn-off drain source voltage slope (part 2/2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Switching time resistive load (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Switching time resistive load (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Normalized on resistance vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Normalized input threshold voltage vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Current limit vs. junction temperatures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Step response current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 SO-8 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 17 SO-8 package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 SO-8 Tube Shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Doc ID 15561 Rev 3 VNS14NV04P-E 1 Block diagram Block diagram Figure 1. Block diagram DRAIN 2 Overvoltage Clamp INPUT 1 Gate Control Over Temperature Linear Current Limiter 3 SOURCE Doc ID 15561 Rev 3 5/22 Pin description 2 VNS14NV04P-E Pin description Figure 2. Connection diagram SO-8 package (top view) SOURCE 8 DRAIN DRAIN SOURCE DRAIN INPUT 6/22 1 SOURCE 4 Doc ID 15561 Rev 3 5 DRAIN VNS14NV04P-E 3 Electrical specification Electrical specification Figure 3. Current and voltage conventions ID VDS IIN DRAIN RIN INPUT SOURCE VIN 3.1 Absolute maximum rating Table 2. Absolute maximum rating Value Symbol Parameter Unit SO-8 VDS Drain-source voltage (VIN=0 V) Internally clamped V VIN Input voltage Internally clamped V IIN Input current +/-20 mA 10 Ω Internally limited A -15 A RIN MIN Minimum input series impedance ID Drain current IR Reverse DC output current VESD1 Electrostatic discharge (R=1.5 KΩ, C=100 pF) 4000 V VESD2 Electrostatic discharge on output pin only (R=330 Ω, C=150 pF) 16500 V 4.6 W Ptot EMAX Total dissipation at Tc=25 °C Maximum switching energy (L=0.4 mH; RL=0 Ω; Vbat=13.5 V; Tjstart=150 °C; IL=18 A) mJ Tj Operating junction temperature Internally limited °C Tc Case operating temperature Internally limited °C -55 to 150 °C Tstg Storage temperature Doc ID 15561 Rev 3 7/22 Electrical specification 3.2 Thermal data Table 3. Thermal data VNS14NV04P-E Value Symbol Parameter Unit SO-8 Rthj-case Thermal resistance junction-case max Rthj-lead Thermal resistance junction-lead max Rthj-amb °C/W 27 Thermal resistance junction-ambient max 90 °C/W (1) °C/W 1. When mounted on a standard single-sided FR4 board with 0.5 cm2 of Cu (at least 35 µm thick) connected to all DRAIN pins. Horizontal mounting and no artificial air flow. 3.3 Electrical characteristics -40 < Tj < 150 °C unless otherwise specified. Table 4. Electrical characteristics Symbol Parameter Test conditions Min Typ Max Unit 45 55 V Off VCLAMP Drain-source clamp voltage VIN=0 V; ID=7 A 40 VCLTH Drain-source clamp threshold voltage VIN=0 V; ID=2 mA 36 VINTH Input threshold voltage VDS=VIN; ID=1 mA 0.5 Supply current from input pin VDS=0 V; VIN=5 V VINCL Input-source clamp voltage IIN=1 mA IIN=-1 mA IDSS Zero input voltage drain current (VIN=0 V) Static drain-source on resistance IISS V 2.5 V 100 150 µA 6.8 8 -0.3 V VDS=13 V; VIN=0 V; Tj=25 °C VDS=25 V; VIN=0 V 30 75 µA Vin = 5 V ID = 7 A Tj = 25 °C Vin = 5 V ID = 7 A 35 70 mΩ 6 -1.0 On RDS(on) Dynamic (Tj=25 °C, unless otherwise specified) gfs (1) Forward transconductance VDD = 13 V ID = 7 A 18 S Coss Output capacitance VDS = 13 V f = 1 MHz VIN = 0 V 400 pF Switching td(on) tr td(off) tf 8/22 Turn-on delay time Rise time Turn-off delay time VDD = 15 V ID = 7 A Vgen = 5 V Rgen = RIN MIN =10 Ω (see Figure 4) Fall time Doc ID 15561 Rev 3 80 250 ns 350 1000 ns 450 1350 ns 150 500 ns VNS14NV04P-E Table 4. Electrical characteristics (continued) Symbol td(on) tr td(off) tf (di/dt)on Electrical specification Parameter Test conditions Min Turn-on delay time VDD = 15 V Id = 7 A Vgen = 5 V Rgen = 2.2 KΩ (see Figure 4) Rise time Turn-off delay time Fall time Typ Max Unit 1.5 4.5 µs 9.7 30.0 µs 25.0 µs 30.0 µs 10.2 Turn-on current slope VDD = 15 V ID = 7 A Vgen = 5 V Rgen = RIN MIN =10 Ω Total input charge 16 A/µs VDD = 12 V ID = 7 A Vin = 5 V; Igen = 2.13 mA (see Figure 8) 36.8 nC Forward on voltage ISD = 7 A Vin = 0 V 0.8 V trr Reverse recovery time 300 ns Qrr Reverse recovery charge 0.8 µC IRRM Reverse recovery current ISD = 7 A; di/dt = 40 A/µs VDD = 30 V L = 200 µH (see test circuit, Figure 5) 5 A Qi Source drain diode VSD (1) Protection Ilim Drain current limit VIN = 5 V; VDS = 13 V tdlim Step response current limit VIN = 5 V; VDS = 13 V Tjsh Over temperature shutdown 150 Tjrs Over temperature reset 135 Igf Fault sink current VIN = 5 V; VDS = 13 V; Tj = Tjsh 10 Single pulse avalanche energy starting Tj = 25 °C; VDD = 24 V VIN = 5 V; Rgen = RIN MIN = 10 Ω; L = 24 mH (see Figure 6 and Figure 7) 400 Eas 12 18 24 45 175 A µs 200 °C °C 15 20 mA mJ 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % Doc ID 15561 Rev 3 9/22 Protection features 4 VNS14NV04P-E Protection features During normal operation, the input pin is electrically connected to the gate of the internal power MOSFET through a low impedance path. The device then behaves like a standard power MOSFET and can be used as a switch from DC up to 50 KHz. The only difference from the user’s standpoint is that a small DC current IISS (typ. 100 µA) flows into the input pin in order to supply the internal circuitry. The device integrates: ● Overvoltage clamp protection: internally set at 45 V, along with the rugged avalanche characteristics of the Power MOSFET stage give this device unrivalled ruggedness and energy handling capability. This feature is mainly important when driving inductive loads. ● Linear current limiter circuit: limits the drain current ID to Ilim whatever the input pin voltages. When the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. Both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the over temperature threshold Tjsh. ● Over temperature and short circuit protection: these are based on sensing the chip temperature and are not dependent on the input voltage. The location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. Over temperature cutout occurs in the range 150 to 190 °C, a typical value being 170 °C. The device is automatically restarted when the chip temperature falls of about 15 °C below shutdown temperature. ● Status feedback: in the case of an over temperature fault condition (Tj > Tjsh), the device tries to sink a diagnostic current Igf through the input pin in order to indicate fault condition. If driven from a low impedance source, this current may be used in order to warn the control circuit of a device shutdown. If the drive impedance is high enough so that the input pin driver is not able to supply the current Igf, the input pin will fall to 0 V. This will not however affect the device operation: no requirement is put on the current capability of the input pin driver except to be able to supply the normal operation drive current IISS. Additional features of this device are ESD protection according to the Human Body model and the ability to be driven from a TTL logic circuit. 10/22 Doc ID 15561 Rev 3 VNS14NV04P-E Protection features Figure 4. Switching time test circuit for resistive load Figure 5. Test circuit for diode recovery times Doc ID 15561 Rev 3 11/22 Protection features VNS14NV04P-E Figure 6. Unclamped inductive load test circuits Figure 8. Input charge test circuit 12/22 Figure 7. Doc ID 15561 Rev 3 Unclamped inductive waveforms VNS14NV04P-E Protection features Figure 9. Source-drain diode forward characteristics Figure 10. Static drain source on resistance Figure 11. Derating curve Figure 12. Static drain-source on resistance vs. input voltage (part 1/2) Figure 13. Static drain-source on resistance vs. input voltage (part 2/2) Figure 14. Transconductance Doc ID 15561 Rev 3 13/22 Protection features VNS14NV04P-E Figure 15. Static drain-source on resistance vs. Id Figure 16. Transfer characteristics Figure 17. Turn-on current slope (part 1/2) Figure 18. Turn-on current slope (part 2/2) Figure 19. Input voltage vs. input charge Figure 20. Turn-off drain source voltage slope (part 1/2) 14/22 Doc ID 15561 Rev 3 VNS14NV04P-E Protection features Figure 21. Turn-off drain source voltage slope Figure 22. Capacitance variations (part 2/2) Figure 23. Switching time resistive load (part 1/2) Figure 24. Switching time resistive load (part 2/2) Figure 25. Output characteristics Figure 26. Normalized on resistance vs. temperature Doc ID 15561 Rev 3 15/22 Protection features VNS14NV04P-E Figure 27. Normalized input threshold voltage Figure 28. Current limit vs. junction vs. temperature temperatures Figure 29. Step response current limit 16/22 Doc ID 15561 Rev 3 VNS14NV04P-E Package thermal data 5 Package thermal data 5.1 SO-8 thermal data Figure 30. SO-8 PC board 1. Layout condition of Rth and Zth measurements (PCB FR4 area=58 mm x 58 mm, PCB thickness=2 mm, Cu thickness=35 µm, Copper areas: 0.14 cm2, 0.6 cm2, 1.6 cm2). Figure 31. Rthj-amb vs PCB copper area in open box free air condition SO-8 at 4 pins connected to TAB RTHj_amb (ºC/W) 110 105 100 95 90 85 80 75 70 0 0.5 1 1.5 2 2.5 PCB CU heatsink area (cm^2) Doc ID 15561 Rev 3 17/22 Package and packing information VNS14NV04P-E 6 Package and packing information 6.1 ECOPACK® In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 6.2 SO-8 mechanical data Table 5. SO-8 mechanical data mm Dim. Min. Typ. A Max. 1.75 A1 0.10 A2 1.25 b 0.28 0.48 c 0.17 0.23 D(1) 4.80 4.90 5.00 E 5.80 6.00 6.20 E1(2) 3.80 3.90 4.00 e 0.25 1.27 h 0.25 0.50 L 0.40 1.27 L1 k 1.04 0° ccc 8° 0.10 1. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed 0.15 mm in total (both side). 2. Dimension “E1” does not include interlead flash or protrusions. Interlead flash or protrusions shall not exceed 0.25 mm per side. 18/22 Doc ID 15561 Rev 3 VNS14NV04P-E Package and packing information Figure 32. SO-8 package dimension 0016023 D Doc ID 15561 Rev 3 19/22 Package and packing information 6.3 VNS14NV04P-E SO-8 packing information Figure 33. SO-8 Tube Shipment (no suffix) B Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1) C A 100 2000 532 3.2 6 0.6 All dimensions are in mm. Figure 1. Tape And Reel Shipment (suffix “TR”) REEL DIMENSIONS Base Q.ty Bulk Q.ty A (max) B (min) C (± 0.2) F G (+ 2 / -0) N (min) T (max) 2500 2500 330 1.5 13 20.2 12.4 60 18.4 All dimensions are in mm. TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 (± 0.1) P D (± 0.1/-0) D1 (min) F (± 0.05) K (max) P1 (± 0.1) All dimensions are in mm. 12 4 8 1.5 1.5 5.5 4.5 2 End Start Top No components Components No components cover tape 500mm min Empty components pockets saled with cover tape. User direction of feed 20/22 Doc ID 15561 Rev 3 500mm min VNS14NV04P-E 7 Revision history Revision history Table 6. Document revision history Date Revision Changes 15-Apr-2009 1 Initial release. 01-Mar-2011 2 Updated Table 1: Device summary Inserted Section 6.3: SO-8 packing information 18-Sep-2013 3 Updated Disclaimer. Doc ID 15561 Rev 3 21/22 VNS14NV04P-E Please Read Carefully: Information in this document is provided solely in connection with ST products. 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Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. © 2013 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 22/22 Doc ID 15561 Rev 3