VNS1NV04D-E

VNS1NV04D ® “OMNIFET II”: FULLY AUTOPROTECTED POWER MOSFET TYPE VNS1NV04D RDS(on) 250 mΩ (*) Ilim 1.7 A (*) Vclamp 40 V (*) (*) Per each device ) s ( ct n LINEAR CURRENT LIMITATION n THERMAL SHUT DOWN n SHORT CIRCUIT PROTECTION n INTEGRATED CLAMP n LOW CURRENT DRAWN FROM INPUT PIN n DIAGNOSTIC FEEDBACK THROUGH INPUT u d o r P e PIN n ESD PROTECTION t e l o n DIRECT ACCESS TO THE GATE OF THE POWER MOSFET (ANALOG DRIVING) n COMPATIBLE WITH STANDARD POWER MOSFET ) (s DESCRIPTION The VNS1NV04D is a device formed by two monolithic OMNIFET II chips housed in a standard SO-8 package. The OMNIFET II are designed in STMicroelectronics VIPower M0-3 s b O t c u BLOCK DIAGRAM SO-8 d o r Technology: they are intended for replacement of standard Power MOSFETS from DC up to 50KHz applications. Built in thermal shutdown, linear current limitation and overvoltage clamp protects the chip in harsh environments. Fault feedback can be detected by monitoring the voltage at the input pin. P e t e l o s b O INPUT1 DRAIN1 OVERVOLTAGE CLAMP OVERVOLTAGE CLAMP GATE CONTROL GATE CONTROL OVER TEMPERATURE LINEAR CURRENT LIMITER LINEAR CURRENT LIMITER SOURCE1 September 2013 DRAIN2 INPUT2 OVER TEMPERATURE SOURCE2 DocID7395 Rev 4 1/14 1 VNS1NV04D ABSOLUTE MAXIMUM RATING Symbol VDSn VINn IINn RIN MINn IDn IRn VESD1 VESD2 Ptot Tj Tc Tstg Parameter Drain-source Voltage (VINn=0V) Input Voltage Input Current Minimum Input Series Impedance Drain Current Reverse DC Output Current Electrostatic Discharge (R=1.5KΩ, C=100pF) Electrostatic Discharge on output pins only (R=330Ω, C=150pF) Total Dissipation at Tc=25°C Operating Junction Temperature Case Operating Temperature Storage Temperature Value Internally Clamped Internally Clamped +/-20 330 Internally Limited -3 4000 16500 4 Internally limited Internally limited -55 to 150 Unit V V mA Ω A A V V W °C °C °C u d o ) s ( ct r P e CONNECTION DIAGRAM (TOP VIEW) bs DRAIN 1 5 DRAIN 2 1 SOURCE 1 INPUT 1 8 O ) SOURCE 2 INPUT 2 4 t e l o DRAIN 1 DRAIN 2 s ( t c u d o r P e CURRENT AND VOLTAGE CONVENTIONS t e l o bs O VIN1 IIN1 IIN2 RIN1 ID1 INPUT 1 ID2 INPUT 2 VIN2 2/14 1 DRAIN 1 RIN2 SOURCE 1 VDS1 DRAIN 2 SOURCE 2 VDS1 VNS1NV04D THERMAL DATA Symbol Rthj-lead Rthj-amb Parameter Thermal Resistance Junction-lead (per channel) Thermal Resistance Junction-ambient Value 30 80(*) MAX MAX Unit °C/W °C/W (*) When mounted on a standard single-sided FR4 board with 50mm2 of Cu (at least 35 µm thick) connected to all DRAIN pins of the relative channel. ELECTRICAL CHARACTERISTICS (-40°C < Tj < 150°C, unless otherwise specified) (Per each device) OFF Symbol VCLAMP VCLTH VINTH IISS VINCL Parameter Drain-source Clamp Test Conditions Voltage Drain-source Clamp Threshold Voltage Input Threshold Voltage Supply Current from Input Pin Input-Source Clamp Voltage IDSS Zero Input Voltage Drain Current (VIN=0V) Symbol Parameter Typ Max Unit VIN=0V; ID=0.5A 40 45 55 V VIN=0V; ID=2mA 36 VDS=VIN; ID=1mA 0.5 VDS=0V; VIN=5V RDS(on) e t e ol IIN=1mA IIN=-1mA VDS=13V; VIN=0V; Tj=25°C ) (s Test Conditions VIN=5V; ID=0.5A; Tj = 25°C t c u VIN=5V; ID=0.5A Pr u d o 6 100 6.8 -1.0 s b O VDS=25V; VIN=0V ON Static Drain-source On Resistance ) s ( ct Min Min Typ V 2.5 V 150 µA 8 V -0.3 30 V µA 75 µA Max 250 Unit mΩ 500 mΩ d o r P e t e l o s b O 3/14 1 VNS1NV04D ELECTRICAL CHARACTERISTICS (continued) (Tj=25°C, unless otherwise specified) DYNAMIC Symbol gfs (*) COSS Parameter Forward Test Conditions Transconductance Output Capacitance Min Typ Max Unit VDD=13V; ID=0.5A 2 S VDS=13V; f=1MHz; VIN=0V 90 pF SWITCHING Symbol td(on) tr td(off) tf td(on) tr td(off) tf Parameter Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time (dI/dt)on Turn-on Current Slope Qi Test Conditions VDD=15V; ID=0.5A Vgen=5V; Rgen=RIN MINn=330Ω (see figure 1) IRRM r P e (see figure 1) let VDD=15V; ID=1.5A Vgen=5V; Rgen=RIN MINn=330Ω VDD=12V; ID=0.5A; VIN=5V so Total Input Charge Igen =2.13mA (see figure 5) Parameter Forward On Voltage Reverse Recovery Time Reverse Recovery Charge )- b O Test Conditions ISD=0.5A; VIN=0V ISD=0.5A; dI/dt=6A/µs Min s ( t c u d o VDD=30V; L=200µH Reverse Recovery Current (see test circuit, figure 2) r P e Typ 70 170 350 200 0.25 1.3 1.8 1.2 Max 200 500 1000 600 1.0 4.0 5.5 4.0 Unit ns ns ns ns µs µs µs µs ) s ( ct u d o VDD=15V; ID=0.5A Vgen=5V; Rgen=2.2KΩ SOURCE DRAIN DIODE Symbol VSD (*) trr Qrr Min 5.0 A/µs 5.0 nC Typ 0.8 205 100 Max 0.75 Unit V ns µC A PROTECTIONS (-40°C < Tj < 150°C, unless otherwise specified) Symbol Ilim Parameter Drain Current Limit t e l o tdlim bs Tjsh O Tjrs Igf Eas Step Response Current Limit Test Conditions VIN=5V; VDS=13V VIN=5V; VDS=13V Overtemperature Shutdown Overtemperature Reset Fault Sink Current Single Pulse Avalanche Energy VIN=5V; VDS=13V; Tj=Tjsh starting Tj=25°C; VDD=24V VIN=5V Rgen=RIN MINn=330Ω; L=50mH (see figures 3 & 4) (*) Pulsed: Pulse duration = 300µs, duty cycle 1.5% 4/14 2 Min 1.7 Typ Max 3.5 Unit A µs 2.0 150 175 200 °C 135 10 15 20 °C mA 55 mJ VNS1NV04D PROTECTION FEATURES During normal operation, the INPUT pin is electrically connected to the gate of the internal power MOSFET through a low impedance path. The device then behaves like a standard power MOSFET and can be used as a switch from DC to 50KHz. The only difference from the user’s standpoint is that a small DC current IISS (typ. 100µA) flows into the INPUT pin in order to supply the internal circuitry. The device integrates: - OVERVOLTAGE CLAMP PROTECTION: internally set at 45V, along with the rugged avalanche characteristics of the Power MOSFET stage give this device unrivalled ruggedness and energy handling capability. This feature is mainly important when driving inductive loads. - LINEAR CURRENT LIMITER CIRCUIT: limits the drain current ID to Ilim whatever the INPUT pin voltage. When the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. Both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the overtemperature threshold Tjsh. ) (s - OVERTEMPERATURE AND SHORT CIRCUIT PROTECTION: these are based on sensing the chip temperature and are not dependent on the input voltage. The location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. Overtemperature cutout occurs in the range 150 to 190 °C, a typical value being 170 °C. The device is automatically restarted when the chip temperature falls of about 15°C below shut-down temperature. - STATUS FEEDBACK: in the case of an overtemperature fault condition (Tj > Tjsh), the device tries to sink a diagnostic current Igf through the INPUT pin in order to indicate fault condition. If driven from a low impedance source, this current may be used in order to warn the control circuit of a device shutdown. If the drive impedance is high enough so that the INPUT pin driver is not able to supply the current Igf, the INPUT pin will fall to 0V. This will not however affect the device operation: no requirement is put on the current capability of the INPUT pin driver except to be able to supply the normal operation drive current IISS. Additional features of this device are ESD protection according to the Human Body model and the ability to be driven from a TTL Logic circuit. ) s ( ct u d o r P e t e l o s b O t c u d o r P e t e l o s b O 5/14 1 VNS1NV04D Figure 1: Switching Time Test Circuit for Resistive Load VD Rgen Vgen ) s ( ct ID u d o 90% tr Vgen s b O td(off) ) (s t e l o tf 10% td(on) r P e t c u t t d o r Figure 2: Test Circuit for Diode Recovery Times P e t e l o s b O A A D I FAST DIODE OMNIFET S L=100uH B B 330Ω D Rgen Vgen VDD I OMNIFET S 8.5 Ω 6/14 1 VNS1NV04D Figure 3: Unclamped Inductive Load Test Circuits Figure 4: Unclamped Inductive Waveforms ) s ( ct RGEN VIN PW u d o r P e Figure 5: Input Charge Test Circuit t e l o ) (s GEN VIN t c u d o r s b O ND8003 P e t e l o s b O 7/14 1 1 VNS1NV04D Source-Drain Diode Forward Characteristics Static Drain Source On Resistance Vsd (mV) Rds(on) (ohms) 1000 4.5 Tj=-40ºC 4 950 Vin=2.5V 3.5 Vin=0V 900 3 2.5 850 2 ) s ( ct 1.5 800 Tj=25ºC 1 750 Tj=150ºC 0.5 u d o 0 700 0 2 4 6 8 10 12 14 0 0.05 0.1 0.15 0.2 0.25 0.3 r P e Id (A) Id(A) Static Drain-Source On resistance Vs. Input Voltage Derating Curve t e l o Rds(on) (mohms) 500 s b O 450 Id=0.5A 400 ) (s t c u od ete Pr 300 250 200 Tj=25ºC 150 Tj=-40ºC 100 50 0 3 3.5 4 4.5 5 5.5 6 6.5 7 Vin(V) ol Static Drain-Source On resistance Vs. Input Voltage s b O Tj=150ºC 350 Rds(on) (mohms) Transconductance Gfs (S) 500 6 Tj=150ºC 5.5 450 Id=1.5A Id=1A 350 Tj=-40ºC Vds=13V 5 400 Tj=25ºC 4.5 4 300 Tj=150ºC 3.5 Tj=25ºC 250 3 2.5 200 Id=1.5A Id=1A Tj=-40ºC 2 150 Id=1.5A Id=1A 100 1.5 1 50 0.5 0 0 3 3.5 4 4.5 Vin(V) 5 5.5 6 6.5 0 0.25 0.5 0.75 1 1.25 1.5 1.75 2 Id(A) 8/14 1 1 VNS1NV04D Static Drain-Source On Resistance Vs. Id Transfer Characteristics Rds(on) (mohms) Idon(A) 500 2.25 Tj=25ºC Vin=3.5V 450 2 Vds=13.5V Tj=150ºC 400 1.75 Vin=5V 350 1.5 300 1.25 250 Vin=3.5V 1 Vin=5V Vin=3.5V 0.75 Tj=150ºC Tj=25ºC 200 150 Tj=-40ºC Tj=-40ºC ) s ( ct 0.5 Vin=5V 100 0.25 50 u d o 0 0 1.5 0 0.25 0.5 0.75 1 1.25 1.5 1.75 2 1.75 2 2.5 2.25 t e l o di/dt(A/us) di/dt(A/us) 6 1.4 bs 1.2 5 Vin=5V Vdd=15V Id=1.5A 4 (s) 3 t c u 2 od 1 r P e 500 1000 t e l o -O 4 3.75 4.5 4.25 5 4.75 r P e Turn On Current Slope Turn On Current Slope 0 3.5 3.25 Vin(V) Id(A) 0 3 2.75 Vin=3.5V Vdd=15V Id=1.5A 1 0.8 0.6 0.4 0.2 1500 2000 0 2500 500 1000 1500 2000 2500 Rg(ohm) Rg(ohm) Turn off drain source voltage slope Input Voltage Vs. Input Charge s b O Vin (V) dv/dt(V/us) 6 350 300 5 Vds=12V Id=0.5A Vin=5V Vdd=15V Id=0.5A 250 4 200 3 150 2 100 1 50 0 0 0 1 2 3 Qg (nC) 4 5 6 0 500 1000 1500 2000 2500 Rg(ohm) 9/14 1 1 VNS1NV04D Turn Off Drain-Source Voltage Slope Capacitance Variations dv/dt(V/us) C(pF) 350 225 300 200 Vin=3.5V Vdd=15V Id=0.5A 250 f=1MHz Vin=0V 175 200 150 150 125 100 100 50 75 0 ) s ( ct u d o 50 0 500 1000 1500 2000 2500 0 5 10 t e l o t(ns) 2 550 500 1.5 td(off) )- tf 1 t(s 0.75 uc 0.5 0 250 d o r td(on) td(off) 300 250 tf 200 150 td(on) 50 750 1000 1250 1500 1750 2000 2250 2500 t e l o 35 350 100 P e 500 30 Vdd=15V Id=0.5A Rg=330ohm tr 400 1.25 0 s b O 450 tr 0.25 25 Switching Time Resistive Load t(us) Vdd=15V Id=0.5A Vin=5V 20 Vds(V) Switching Time Resistive Load 1.75 15 r P e Rg(ohm) 0 3.25 3.5 3.75 4 Rg(ohm) 4.25 4.5 4.75 5 5.25 Vin(V) Normalized On Resistance Vs. Temperature Output Characteristics bs Rds(on) (mOhm) ID(A) 2.25 2.4 O Vin=5.5V 2.2 2 Vin=4.5V 2 Vin=5V Id=0.5A Vin=3.5V 1.8 1.75 1.6 1.5 1.4 1.2 1.25 1 0.8 1 0.6 0.4 0.75 Vin=3V 0.2 0.5 0 0 1 2 3 4 5 6 VDS(V) 7 8 9 10 11 12 -50 -25 0 25 50 75 100 125 150 175 Tc (ºC) 10/14 1 1 VNS1NV04D Normalized Input Temperature Threshold Voltage Vs. Vinth (V) Normalized Current Temperature Limit Vs. Junction Ilim (A) 2 5 1.8 4.5 Vds=Vin Id=1mA 1.6 Vin=5V Vds=13V 4 3.5 1.4 1.2 3 1 2.5 0.8 2 0.6 1.5 0.4 1 0.2 0.5 0 ) s ( ct u d o 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 r P e 0 Tc (ºC) 25 50 75 100 125 150 175 Tc (ºC) Step Response Current Limit t e l o Tdlim(us) 2.4 2.3 Vin=5V Rg=330ohm ) (s 2.2 s b O t c u 2.1 d o r 2 P e 1.9 t e l o 5 10 15 20 25 30 35 Vdd(V) s b O 11/14 VNS1NV04D SO-8 MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. TYP. a1 1.75 MAX. 0.1 0.068 0.25 a2 0.003 0.009 1.65 0.064 a3 0.65 0.85 0.025 b 0.35 0.48 0.013 b1 0.19 0.25 0.007 C 0.25 0.5 0.010 c1 45 (typ.) D 4.8 5.0 E 5.8 6.2 e 1.27 e3 3.81 F 3.8 L 0.4 M u d o F o s b u d o Pr 0.228 O ) s ( t c e t e l 0.188 ) s ( ct 0.033 0.018 0.010 0.019 0.196 0.244 0.050 0.150 4.0 0.14 0.157 1.27 0.015 0.050 0.6 0.023 8 (max.) r P e t e l o s b O 12/14 1 VNS1NV04D SO-8 TUBE SHIPMENT (no suffix) B Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1) C A 100 2000 532 3.2 6 0.6 All dimensions are in mm. ) s ( ct TAPE AND REEL SHIPMENT (suffix “13TR”) u d o REEL DIMENSIONS r P e Base Q.ty Bulk Q.ty A (max) B (min) C (± 0.2) F G (+ 2 / -0) N (min) T (max) t e l o ) (s s b O All dimensions are in mm. t c u d o r TAPE DIMENSIONS 2500 2500 330 1.5 13 20.2 12.4 60 18.4 According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 P e Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing t e l o s b O W P0 (± 0.1) P D (± 0.1/-0) D1 (min) F (± 0.05) K (max) P1 (± 0.1) All dimensions are in mm. 12 4 8 1.5 1.5 5.5 4.5 2 End Start Top No components Components No components cover tape 500mm min Empty components pockets saled with cover tape. 500mm min User direction of feed 13/14 1 VNS1NV04D Please Read Carefully: ) s ( ct Information in this document is provided solely in connection with ST products. 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The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. © 2013 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 14/14 DocID7395 Rev 4