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VNS3NV04

VNS3NV04

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

  • 描述:

    VNS3NV04 - “OMNIFET II”: FULLY AUTOPROTECTED POWER MOSFET - STMicroelectronics

  • 数据手册
  • 价格&库存
VNS3NV04 数据手册
® VNN3NV04 / VNS3NV04 / VND3NV04 / VND3NV04-1 “OMNIFET II”: FULLY AUTOPROTECTED POWER MOSFET TYPE VNN3NV04 VNS3NV04 VND3NV04 VND3NV04-1 RDS(on) 120 mΩ Ilim Vclamp 2 3.5 A 40 V 1 2 3 SOT-223 SO-8 n LINEAR CURRENT LIMITATION n THERMAL SHUT DOWN n SHORT CIRCUIT PROTECTION n INTEGRATED CLAMP n LOW CURRENT DRAWN FROM INPUT PIN n DIAGNOSTIC FEEDBACK THROUGH INPUT 3 1 1 3 2 PIN n ESD PROTECTION n DIRECT ACCESS TO THE GATE OF THE TO251 (IPAK) TO252 (DPAK) ORDER CODES: SOT-223 VNN3NV04 SO-8 VNS3NV04 TO-252 (DPAK) VND3NV04 TO-251 (IPAK) VND3NV04-1 POWER MOSFET (ANALOG DRIVING) n COMPATIBLE WITH STANDARD POWER MOSFET DESCRIPTION The VNN3NV04, VNS3NV04, VND3NV04 VND3NV04-1, are monolithic devices designed in STMicroelectronics VIPower M0-3 Technology, BLOCK DIAGRAM intended for replacement of standard Power MOSFETS from DC up to 50KHz applications. Built in thermal shutdown, linear current limitation and overvoltage clamp protect the chip in harsh environments. Fault feedback can be detected by monitoring the voltage at the input pin. DRAIN 2 Overvoltage Clamp INPUT 1 Gate Control Over Temperature Linear Current Limiter 3 SOURCE FC01000 February 2003 1/21 VNN3NV04 / VNS3NV04 / VND3NV04 / VND3NV04-1 ABSOLUTE MAXIMUM RATING Symbol VDS VIN IIN RIN MIN ID IR VESD1 VESD2 Ptot Tj Tc Tstg Parameter Drain-source Voltage (VIN=0V) Input Voltage Input Current Minimum Input Series Impedance Drain Current Reverse DC Output Current Electrostatic Discharge (R=1.5KΩ, C=100pF) Electrostatic Discharge on output pin only (R=330Ω, C=150pF) Total Dissipation at Tc=25°C Operating Junction Temperature Case Operating Temperature Storage Temperature SOT-223 Value SO-8 DPAK/IPAK Internally Clamped Internally Clamped +/-20 220 Internally Limited -5.5 4000 16500 7 8.3 Internally limited Internally limited -55 to 150 35 Unit V V mA Ω A A V V W °C °C °C CONNECTION DIAGRAM (TOP VIEW) SO-8 Package (*) SOURCE SOURCE SOURCE INPUT 1 8 DRAIN DRAIN DRAIN 4 5 DRAIN (*) For the pins configuration related to SOT-223, DPAK, IPAK see outlines at page 1. CURRENT AND VOLTAGE CONVENTIONS ID VDS DRAIN IIN RIN INPUT SOURCE VIN 2/21 VNN3NV04 / VNS3NV04 / VND3NV04 / VND3NV04-1 THERMAL DATA Symbol Rthj-case Rthj-lead Rthj-amb (*) When Parameter Thermal Resistance Junction-case}}} Thermal Resistance Junction-lead Thermal Resistance Junction-ambient MAX MAX MAX SOT-223 18 70(*) Value SO-8 DPAK 3.5 15 65(*) 54(*) IPAK 3.5 100 Unit °C/W °C/W °C/W mounted on a standard single-sided FR4 board with 50mm2 of Cu (at least 35 µm thick) connected to all DRAIN pins. ELECTRICAL CHARACTERISTICS (-40°C < Tj < 150°C, unless otherwise specified) OFF Symbol VCLAMP VCLTH VINTH IISS VINCL IDSS Parameter Drain-source Clamp Voltage Drain-source Clamp Threshold Voltage Input Threshold Voltage Supply Current from Input Pin Input-Source Clamp Voltage Zero Input Voltage Drain Current (VIN=0V) Test Conditions VIN=0V; ID=1.5A VIN=0V; ID=2mA VDS=VIN; ID=1mA VDS=0V; VIN=5V IIN=1mA IIN=-1mA VDS=13V; VIN=0V; Tj=25°C VDS=25V; VIN=0V 6 -1.0 Min 40 36 0.5 100 6.8 2.5 150 8 -0.3 30 75 Typ 45 Max 55 Unit V V V µA V µA ON Symbol RDS(on) Parameter Static Drain-source On Resistance Test Conditions VIN=5V; ID=1.5A; Tj=25°C VIN=5V; ID=1.5A Min Typ Max 120 240 Unit mΩ 3/21 1 VNN3NV04 / VNS3NV04 / VND3NV04 / VND3NV04-1 ELECTRICAL CHARACTERISTICS (continued) (Tj=25°C, unless otherwise specified) DYNAMIC Symbol gfs (*) COSS Parameter Forward Transconductance Output Capacitance Test Conditions VDD=13V; ID=1.5A VDS=13V; f=1MHz; VIN=0V Min Typ 5.0 150 Max Unit S pF SWITCHING Symbol td(on) tr td(off) tf td(on) tr td(off) tf (dI/dt)on Qi Parameter Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Turn-on Current Slope Total Input Charge Test Conditions VDD=15V; ID=1.5A Vgen=5V; Rgen=RIN MIN=220Ω (see figure 1) VDD=15V; ID=1.5A Vgen=5V; Rgen=2.2 KΩ (see figure 1) VDD=15V; ID=1.5A Vgen=5V; Rgen=RIN MIN=220Ω VDD=12V; ID=1.5A; VIN=5V Igen=2.13mA (see figure 5) Min Typ 90 250 450 250 0.45 2.5 3.3 2.0 4.7 8.5 Max 300 750 1350 750 1.35 7.5 10.0 6.0 Unit ns ns ns ns µs µs µs µs A/µs nC SOURCE DRAIN DIODE Symbol VSD (*) trr Qrr IRRM Parameter Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Test Conditions ISD=1.5A; VIN=0V ISD=1.5A; dI/dt=12A/µs Min Typ 0.8 107 37 0.7 Max Unit V ns µC A VDD=30V; L=200µH Reverse Recovery Current (see test circuit, figure 2) PROTECTIONS (-40°C < Tj < 150°C, unless otherwise specified) Symbol Ilim tdlim Tjsh Tjrs Igf Eas Parameter Drain Current Limit Step Response Current Limit Overtemperature Shutdown Overtemperature Reset Fault Sink Current Single Pulse Avalanche Energy Test Conditions VIN=5V; VDS=13V VIN=5V; VDS=13V Min 3.5 Typ 5 10 150 135 10 100 175 200 Max 7 Unit A µs °C °C mA mJ VIN=5V; VDS=13V; Tj=Tjsh starting Tj=25°C; VDD=24V VIN=5V Rgen=RIN MIN=220Ω; L=24mH (see figures 3 & 4) 15 20 (*) Pulsed: Pulse duration = 300µs, duty cycle 1.5% 4/21 2 VNN3NV04 / VNS3NV04 / VND3NV04 / VND3NV04-1 PROTECTION FEATURES During normal operation, the INPUT pin is electrically connected to the gate of the internal power MOSFET through a low impedance path. The device then behaves like a standard power MOSFET and can be used as a switch from DC up to 50KHz. The only difference from the user’s standpoint is that a small DC current IISS (typ. 100µA) flows into the INPUT pin in order to supply the internal circuitry. The device integrates: - OVERVOLTAGE CLAMP PROTECTION: internally set at 45V, along with the rugged avalanche characteristics of the Power MOSFET stage give this device unrivalled ruggedness and energy handling capability. This feature is mainly important when driving inductive loads. - LINEAR CURRENT LIMITER CIRCUIT: limits the drain current ID to Ilim whatever the INPUT pin voltages. When the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. Both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the overtemperature threshold Tjsh. - OVERTEMPERATURE AND SHORT CIRCUIT PROTECTION: these are based on sensing the chip temperature and are not dependent on the input voltage. The location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. Overtemperature cutout occurs in the range 150 to 190 °C, a typical value being 170 °C. The device is automatically restarted when the chip temperature falls of about 15°C below shut-down temperature. - STATUS FEEDBACK: in the case of an overtemperature fault condition (Tj > Tjsh), the device tries to sink a diagnostic current Igf through the INPUT pin in order to indicate fault condition. If driven from a low impedance source, this current may be used in order to warn the control circuit of a device shutdown. If the drive impedance is high enough so that the INPUT pin driver is not able to supply the current Igf, the INPUT pin will fall to 0V. This will not however affect the device operation: no requirement is put on the current capability of the INPUT pin driver except to be able to supply the normal operation drive current IISS. Additional features of this device are ESD protection according to the Human Body model and the ability to be driven from a TTL Logic circuit. 5/21 VNN3NV04 / VNS3NV04 / VND3NV04 / VND3NV04-1 Fig.1: Switching Time Test Circuit for Resistive Load VD Rgen Vgen ID 90% tr td(on) 10% td(off) tf t Vgen t Fig.2: Test Circuit for Diode Recovery Times A D I A FAST DIODE OMNIFET S B L=100uH B 220Ω Rgen I D VDD OMNIFET S Vgen 8.5 Ω 6/21 1 VNN3NV04 / VNS3NV04 / VND3NV04 / VND3NV04-1 Thermal Impedance for DPAK/IPAK Thermal Impedance for SOT-223 7/21 VNN3NV04 / VNS3NV04 / VND3NV04 / VND3NV04-1 Fig. 3: Unclamped Inductive Load Test Circuits Fig. 4: Unclamped Inductive Waveforms RGEN VIN PW Fig. 5: Input Charge Test Circuit VIN GEN ND8003 8/21 VNN3NV04 / VNS3NV04 / VND3NV04 / VND3NV04-1 Source-Drain Diode Forward Characteristics Vsd (mV) 1100 1050 Static Drain Source On Resistance Rds(on) (mohms) 1000 900 Tj=-40ºC Vin=0V 1000 950 900 850 800 750 700 650 600 0 1 2 3 4 5 6 7 8 9 10 11 12 800 700 600 500 400 300 Vin=2.5V Tj=25ºC Tj=150ºC 200 100 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 Id (A) Id(A) Derating Curve Static Drain-Source On resistance Vs. Input Voltage Rds(on) (mohms) 300 275 250 225 200 175 150 125 100 75 50 25 0 3 3.5 4 4.5 5 5.5 6 6.5 Id=3.5A Id=1A Tj=150ºC Tj=25ºC Tj=-40ºC Id=3.5A Id=1A Id=3.5A Id=1A Vin(V) Static Drain-Source On resistance Vs. Input Voltage Rds(on) (mohms) 250 225 200 175 150 125 100 75 50 Transconductance Gfs (S) 11 10 Id=1.5A 9 8 7 Vds=13V Tj=-40ºC Tj=25ºC Tj=150ºC Tj=150ºC 6 5 4 3 Tj=25ºC 2 Tj=-40ºC 25 0 3 3.5 4 4.5 5 5.5 6 6.5 1 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 Vin(V) Id (A) 9/21 VNN3NV04 / VNS3NV04 / VND3NV04 / VND3NV04-1 Static Drain-Source On Resistance Vs. Id Rds(on) (mohms) 250 225 Transfer Characteristics Idon (A) 6 5.5 Vin=5V 200 175 150 125 100 75 50 25 0 0 0.5 1 1.5 2 2.5 3 3.5 4 5 Vds=13.5V Tj=150ºC 4.5 4 Tj=150ºC 3.5 3 Tj=25ºC 2.5 2 1.5 Tj=-40ºC Tj= - 40ºC Tj=25ºC 1 0.5 0 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 Id (A) Vin (V) Turn On Current Slope di/dt(A/us) 5 4.5 4 3.5 3 2.5 2 1.5 1 Turn On Current Slope di/dt(A/usec) 1.75 Vin=5V Vdd=15V Id=1.5A 1.5 1.25 1 Vin=3.5V Vdd=15V Id=1.5A 0.75 0.5 0.25 0.5 0 0 250 500 750 1000 1250 1500 1750 2000 2250 2500 0 0 250 500 750 1000 1250 1500 1750 2000 2250 2500 Rg(ohm) Rg(ohm) Input Voltage Vs. Input Charge Vin (V) 9 8 7 6 5 4 3 2 1 0 0 1 2 3 4 5 6 7 8 9 10 11 Turn off drain source voltage slope dv/dt(V/usec) 300 275 Vds=1V Id=1.5A 250 225 200 175 150 125 100 75 50 25 0 0 250 500 750 1000 1250 1500 Vin=5V Vdd=15V Id=1.5A 2000 1750 2250 2500 Qg (nC) Rg(ohm) 10/21 VNN3NV04 / VNS3NV04 / VND3NV04 / VND3NV04-1 Turn Off Drain-Source Voltage Slope dv/dt(V/usec) 300 275 250 225 200 175 150 125 100 75 50 100 25 0 0 250 500 750 1000 1250 1500 1750 2000 2250 2500 50 0 5 10 15 20 25 30 35 150 200 Capacitance Variations C(pF) 350 Vin=3.5V Vdd=15V Id=1.5A 300 f=1MHz Vin=0V 250 Rg(ohm) Vds(V) Switching Time Resistive Load t(usec) 4 3.5 3 2.5 2 Switching Time Resistive Load t(nsec) 900 800 Vdd=15V Id=1.5A Vin=5V td(off) 700 tr tr Vdd=15V Id=1.5A Rg=220ohm 600 500 tf 1.5 400 td(off) 300 1 0.5 0 0 250 500 750 1000 1250 1500 1750 2000 2250 2500 0 3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25 td(on) 200 100 tf td(on) Rg(ohm) Vin(V) Output Characteristics Id (A) 5 4.5 4 3.5 3 2.5 2 1.5 1 Vin=5V Vin=4V Normalized On Resistance Vs. Temperature Rds(on) (mOhm) 4 3.5 3 Vin=3V Vin=5V Id=1.5A 2.5 2 1.5 1 0.5 0 0 1 2 3 4 5 6 7 8 9 10 0.5 -50 -25 0 25 50 75 100 125 150 175 Vds (V) Tc )ºC) 11/21 VNN3NV04 / VNS3NV04 / VND3NV04 / VND3NV04-1 Normalized Input Temperature Vinth (V) 2 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0 -50 -25 0 25 50 75 100 125 150 175 Threshold Voltage Vs. Normalized Current Temperature Ilim (A) 10 9 Limit Vs. Junction Vds=Vin Id=1mA 8 7 6 5 4 3 2 1 0 -50 -25 Vin=5V Vds=13V 0 25 50 75 100 125 150 175 Tc (ºC) Tc (ºC) Step Response Current Limit Tdlim(usec) 13 12.5 12 11.5 11 10.5 10 9.5 9 8.5 8 7.5 5 7.5 10 12.5 15 17.5 20 22.5 25 27.5 30 32.5 Vin=5V Rg=220ohm Vdd(V) 12/21 VNN3NV04 / VNS3NV04 / VND3NV04 / VND3NV04-1 TO-251 (IPAK) MECHANICAL DATA mm. MIN. 2.2 0.9 0.7 0.64 5.2 0.3 0.95 0.45 0.48 6 6.4 4.4 15.9 9 0.8 0.8 0.6 0.6 6.2 6.6 4.6 16.3 9.4 1.2 1 0.017 0.019 0.236 0.252 0.173 0.626 0.354 0.031 0.031 TYP MAX. 2.4 1.1 1.3 0.9 5.4 0.85 0.012 0.037 0.023 0.023 0.244 0.260 0.181 0.641 0.370 0.047 0.039 MIN. 0.086 0.035 0.027 0.025 0.204 inch TYP. MAX. 0.094 0.043 0.051 0.031 0.212 0.033 DIM. A A1 A3 B B2 B3 B5 B6 C C2 D E G H L L1 L2 H C A C2 L2 D B3 B6 A1 L = = 3 B5 B A3 = B2 = G = E L1 1 2 = 13/21 VNN3NV04 / VNS3NV04 / VND3NV04 / VND3NV04-1 TO-252 (DPAK) MECHANICAL DATA DIM. A A1 A2 B B2 C C2 D D1 E E1 e G H L2 L4 R V2 Package Weight 0° 0.60 0.2 8° Gr. 0.29 4.40 9.35 0.8 1.00 6.40 4.7 2.28 4.60 10.10 mm. MIN. 2.20 0.90 0.03 0.64 5.20 0.45 0.48 6.00 5.1 6.60 TYP MAX. 2.40 1.10 0.23 0.90 5.40 0.60 0.60 6.20 P032P 14/21 1 VNN3NV04 / VNS3NV04 / VND3NV04 / VND3NV04-1 SOT-223 MECHANICAL DATA mm. DIM. MIN. A B B1 c D e e1 E H V A1 0.02 0.1 3.3 6.7 0.6 2.9 0.24 6.3 0.7 3 0.26 6.5 2.3 4.6 3.5 7 3.7 7.3 10 (max) 0.0008 0.004 0.13 0.264 TYP MAX. 1.8 0.85 3.15 0.35 6.7 0.024 0.114 0.009 0.248 0.027 0.118 0.01 0.256 0.09 0.181 0.138 0.276 0.146 0.287 MIN. TYP. MAX. 0.071 0.033 0.124 0.014 0.264 inch 0046067 15/21 VNN3NV04 / VNS3NV04 / VND3NV04 / VND3NV04-1 SO-8 MECHANICAL DATA mm. DIM. MIN. A a1 a2 a3 b b1 C c1 D E e e3 F L M F 3.8 0.4 4.8 5.8 1.27 3.81 4.0 1.27 0.6 8 (max.) 0.14 0.015 5.0 6.2 0.65 0.35 0.19 0.25 0.1 TYP MAX. 1.75 0.25 1.65 0.85 0.48 0.25 0.5 45 (typ.) 0.188 0.228 0.050 0.150 0.157 0.050 0.023 0.196 0.244 0.025 0.013 0.007 0.010 0.003 MIN. TYP. MAX. 0.068 0.009 0.064 0.033 0.018 0.010 0.019 inch 16/21 VNN3NV04 / VNS3NV04 / VND3NV04 / VND3NV04-1 SOT-223 TAPE AND REEL SHIPMENT (suffix “13TR”) REEL DIMENSIONS Base Q.ty Bulk Q.ty A (max) B (min) C (± 0.2) F G (+ 2 / -0) N (min) T (max) 1000 1000 330 1.5 13 20.2 12.4 60 18.4 TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 (± 0.1) P D (± 0.1/-0) D1 (min) F (± 0.05) K (max) P1 (± 0.1) 12 4 8 1.5 1.5 5.5 4.5 2 All dimensions are in mm. End Start Top cover tape 500mm min Empty components pockets saled with cover tape. User direction of feed 500mm min No components Components No components 17/21 1 VNN3NV04 / VNS3NV04 / VND3NV04 / VND3NV04-1 SO-8 TUBE SHIPMENT (no suffix) B C A Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1) All dimensions are in mm. 100 2000 532 3.2 6 0.6 TAPE AND REEL SHIPMENT (suffix “13TR”) REEL DIMENSIONS Base Q.ty Bulk Q.ty A (max) B (min) C (± 0.2) F G (+ 2 / -0) N (min) T (max) 2500 2500 330 1.5 13 20.2 12.4 60 18.4 All dimensions are in mm. TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 (± 0.1) P D (± 0.1/-0) D1 (min) F (± 0.05) K (max) P1 (± 0.1) 12 4 8 1.5 1.5 5.5 4.5 2 End All dimensions are in mm. Start Top cover tape 500mm min Empty components pockets saled with cover tape. User direction of feed 500mm min No components Components No components 18/21 VNN3NV04 / VNS3NV04 / VND3NV04 / VND3NV04-1 DPAK FOOTPRINT A TUBE SHIPMENT (no suffix) 1 .6 6 .7 1 .8 3 .0 C 2 .3 6 .7 2 .3 B Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1) All dimensions are in mm. 75 3000 532 6 21.3 0.6 TAPE AND REEL SHIPMENT (suffix “13TR”) REEL DIMENSIONS Base Q.ty Bulk Q.ty A (max) B (min) C (± 0.2) F G (+ 2 / -0) N (min) T (max) 2500 2500 330 1.5 13 20.2 16.4 60 22.4 TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 (± 0.1) P D (± 0.1/-0) D1 (min) F (± 0.05) K (max) P1 (± 0.1) 16 4 8 1.5 1.5 7.5 6.5 2 End All dimensions are in mm. Start Top cover tape 500mm min Empty components pockets saled with cover tape. User direction of feed 500mm min No components Components No components 19/21 VNN3NV04 / VNS3NV04 / VND3NV04 / VND3NV04-1 IPAK TUBE SHIPMENT (no suffix) A C B Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1) All dimensions are in mm. 75 3000 532 6 21.3 0.6 20/21 1 VNN3NV04 / VNS3NV04 / VND3NV04 / VND3NV04-1 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics © 2003 STMicroelectronics - Printed in ITALY- All Rights Reserved. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 21/21
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