W29NK50ZD

STW29NK50ZD N-CHANNEL 500 V - 0.11Ω - 29A TO-247 Fast Diode SuperMESH™ MOSFET PRODUCT PREVIEW Table 1: General Features TYPE STW29NK50ZD s s s s s s Figure 1: Package ID 29 A PW 350 W VDSS 500 V RDS(on) < 0.15 Ω s TYPICAL RDS(on) = 0.11 Ω HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED GATE CHARGE MINIMIZED LOW INTRINSIC CAPACITANCES VERY GOOD MANUFACTURING REPEATIBILITY FAST INTERNAL RECOVERY TIME 3 2 1 TO-247 DESCRIPTION The Fast SuperMesh™ series associates all advantages of reduced on-resistance, zener gate protection and very goog dv/dt capability with a Fast body-drain recovery diode. Such series complements the “FDmesh™” Advanced Technology. Figure 2: Internal Schematic Diagram APPLICATIONS s HID BALLAST s ZVS PHASE-SHIFT FULL BRIDGE Table 2: Order Codes PART NUMBER STW29NK50ZD MARKING W29NK50ZD PACKAGE TO-247 PACKAGING TUBE Rev. 2 December 2004 1/7 STW29NK50ZD Table 3: Absolute Maximum ratings Symbol VDS VDGR VGS ID ID IDM(*) PTOT VESD(G-S) dv/dt (1) Tstg Tj Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 KΩ) Gate- source Voltage Drain Current (continuous) at TC = 25°C Drain Current (continuous) at TC = 100°C Drain Current (pulsed) Total Dissipation at TC = 25°C Derating Factor Gate source ESD (HBM-C = 100pF, R = 1.5 KΩ) Peak Diode Recovery voltage slope Storage Temperature Operating Junction Temperature Value 500 500 ± 30 29 18.27 116 350 2.77 6000 4.5 -55 to 150 Unit V V V A A A W W/°C V V/ns °C (*) Pulse width limited by safe operating area (1) ISD≤ 29 A, di/dt≤ 200 A/µs, VDD≤ V(BR)DSS, T J≤ TJMAX Table 4: Thermal Data Rthj-case Rthj-amb Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Maximum Lead Temperature For Soldering Purpose 0.36 50 300 °C/W °C/W °C Table 5: Avalanche Characteristics Symbol IAR EAS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) Max Value 29 500 Unit A mJ Table 6: Gate-Source Zener Diode Symbol BVGSO Parameter Gate-Source Breakdown Voltage Test Condition Min. 30 Typ. Max Unit A Igs= ± 1mA (Open Drain) PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external components. 2/7 STW29NK50ZD TABLE 7: ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED) On /Off Symbol V(BR)DSS IDSS IGSS VGS(th) RDS(on Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Gate Threshold Voltage Static Drain-source On Resistance Test Conditions ID = 1 mA, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125°C VGS = ± 20 V VDS = VGS, ID = 150 µA VGS = 10 V, ID = 14.5 A 3 3.75 0.11 Min. 500 1 50 ± 10 4.5 0.15 Typ. Max. Unit S µA µA µA V Ω Table 8: Dynamic Symbol gfs (1) Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-on Delay Time Rise Time Turn-off-Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDS = 15 V, ID = 14.5 A VDS = 25 V, f = 1 MHz, VGS = 0 Min. Typ. 28 6000 570 155 TBD TBD TBD TBD 180 TBD TBD 200 Max. Unit S pF pF pF ns ns ns ns nC nC nC VDD = 400 V, ID = 14.5 A, RG = 4.7 Ω, VGS = 10 V (Resistive Load see Figure 4)) VDD = 480 V, ID = 14.5 A, VGS = 10 V Table 9: Source Drain Diode Symbol ISD ISDM (2) VSD (1) trr Qrr IRRM trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 29 A, VGS = 0 ISD = 29 A, di/dt = 100 A/µs VDD = 30V, Tj = 25°C (see test circuit Figure 5) ISD = 29 A, di/dt = 100 A/µs VDD = 30V, Tj = 150°C (see test circuit Figure 5) TBD TBD TBD TBD TBD TBD Test Conditions Min. Typ. Max. 29 116 1.6 Unit A A V ns µC A ns µC A (1) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. (2) Pulse width limited by safe operating area. 3/7 STW29NK50ZD Figure 3: Unclamped Inductive Load Test Circuit Figure 6: Unclamped Inductive Wafeform Figure 4: Switching Times Test Circuit For Resistive Load Figure 7: Gate Charge Test Circuit Figure 5: Test Circuit For Inductive Load Switching and Diode Recovery Times 4/7 STW29NK50ZD TO-247 MECHANICAL DATA mm. MIN. 4.85 2.20 1.0 2.0 3.0 0.40 19.85 15.45 5.45 14.20 3.70 18.50 3.55 4.50 5.50 3.65 5.50 0.140 0.177 0.216 14.80 4.30 0.560 0.14 0.728 0.143 0.216 TYP MAX. 5.15 2.60 1.40 2.40 3.40 0.80 20.15 15.75 MIN. 0.19 0.086 0.039 0.079 0.118 0.015 0.781 0.608 0.214 0.582 0.17 inch TYP. MAX. 0.20 0.102 0.055 0.094 0.134 0.03 0.793 0.620 DIM. A A1 b b1 b2 c D E e L L1 L2 øP øR S 5/7 STW29NK50ZD Table 10: Revision History Date 05-Feb-2004 06-Dec-2004 Revision 1 2 Description of Changes First Release. Some electrical value changed 6/7 STW29NK50ZD Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. 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