WS57C128FB-35D

WS57C128FB HIGH SPEED 16K x 8 CMOS EPROM KEY FEATURES • Very Fast Access Time — 35 ns • Standard EPROM Pinout • DIP and Surface Mount Packaging Available • Low Power Consumption • EPI Processing — Latch-up Immunity Up to 200 mA GENERAL DESCRIPTION The WS57C128FB is a High Performance 128K UV Erasable Electrically Programmable Read Only Memory. It is manufactured with an advanced CMOS technology which enables it to operate at Bipolar speeds while consuming only 90 mA. Two major features of the WS57C128FB are its Low Power and High Speed. These features make it an ideal solution for applications which require fast access times, low power, and non-volatility. Typical applications include systems which do not utilize mass storage devices and/or are board space limited. The WS57C128FB is configured in the standard EPROM pinout which provides an easy upgrade path for systems which are currently using standard EPROMs. The EPROMs are available in both 600 Mil DIP packages, and both J-leaded and leadless surface mount packages. MODE SELECTION PINS MODE Read Output Disable Standby Program Program Verify Program Inhibit PGM X X X VIL VIH X CE VIL X VIH VIL VIL VIH OE VIL VIH X VIH VIL X VPP VCC VCC VCC VPP VPP VPP VCC OUTPUTS PIN CONFIGURATION TOP VIEW Chip Carrier VCC VCC VCC VCC VCC High Z High Z DIN DOUT High Z A6 A5 A4 A3 A2 A1 A0 NC O0 A7 A12 VPP NC VCC PGM A13 CERDIP VPP A12 A7 A6 A5 A4 A3 A2 A1 A0 O0 O1 O2 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC PGM A13 A8 A9 A11 OE A10 CE O7 O6 O5 O4 O3 VCC DOUT X can be VIL or VIH. 32 31 30 1 5 29 6 28 7 27 8 26 9 25 10 24 11 23 12 22 13 21 14 15 16 17 18 19 20 O1 O2 GND 432 A8 A9 A11 NC OE A10 CE O7 O6 NC O3 O4 O5 PRODUCT SELECTION GUIDE PARAMETER Address Access Time (Max) Chip Select Time (Max) Output Enable Time (Max) WS57C128FB-35 35 ns 35 ns 20 ns WS57C128FB-45 45 ns 45 ns 25 ns WS57C128FB-55 55 ns 55 ns 25 ns WS57C128FB-70 70 ns 70 ns 25 ns Return to Main Menu 3-7 WS57C128FB ABSOLUTE MAXIMUM RATINGS* Storage Temperature............................–65° to + 150°C Voltage on any Pin with Respect to Ground ....................................–0.6V to +7V VPP with Respect to Ground...................–0.6V to + 13V ESD Protection ..................................................> 2000V *NOTICE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect device reliability. OPERATING RANGE RANGE Commercial Industrial Military TEMPERATURE 0°C to +70°C –40°C to +85°C –55°C to +125°C VCC +5V ± 10% +5V ± 10% +5V ± 10% DC READ CHARACTERISTICS Over Operating Range with VPP = VCC SYMBOL VIL VIH VOL VOH ISB1 ISB2 ICC1 PARAMETER Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage VCC Standby Current (CMOS) VCC Standby Current (TTL) VCC Active Current (CMOS) TEST CONDITIONS (Note 5) (Note 5) IOL = 16 mA IOH = – 4 mA (Notes 1 and 3) (Notes 2 and 3) (Notes 1 and 4) Outputs Not Loaded (Notes 2 and 4) Outputs Not Loaded VPP = VCC VCC – 0.4 VIN = 5.5V or Gnd VOUT = 5.5 V or Gnd –10 –10 Comm'l Industrial Military Comm'l Industrial Military 2.4 500 15 30 40 40 50 60 60 100 VCC 10 10 MIN – 0.1 2.0 MAX 0.8 VCC + 0.3 0.4 UNITS V V V V µA mA mA mA mA mA mA mA µA V µA µA ICC2 IPP VPP ILI ILO NOTES: VCC Active Current (TTL) VPP Supply Current VPP Read Voltage Input Leakage Current Output Leakage Current 1. CMOS inputs: GND ± 0.3V or VCC ± 0.3V. 2. TTL inputs: VIL ≤ 0.8V, VIH ≥ 2.0V. 3. Add 1 mA/MHz for A.C. power component. 4. Add 4 mA/MHz for A.C. power component. 5. These are absolute voltages with respect to device ground pin and include all overshoots due to system and/or tester noise. Do not attempt to test these values without suitable equipment. AC READ CHARACTERISTICS Over Operating Range with VPP = VCC PARAMETER Address to Output Delay CE to Output Delay OE to Output Delay Output Disable to Output Float Address to Output Hold SYMBOL tACC tCE tOE tDF tOH 0 57C128FB-35 57C128FB-45 57C128FB-55 MIN MAX MIN MAX MIN MAX 57C128FB-70 MIN MAX UNITS 35 35 20 20 0 45 45 25 25 0 55 55 25 25 0 70 70 25 25 ns 3-8 WS57C128FB AC READ TIMING DIAGRAM ADDRESSES tACC CE VALID tOH tCE OE tDF tOE OUTPUTS VALID tDF CAPACITANCE (6) TA = 25°C, f = 1 MHz SYMBOL C IN C OUT C VPP PARAMETER Input Capacitance Output Capacitance VPP Capacitance CONDITIONS VIN = 0V VOUT = 0V VPP = 0 V TYP (7) 4 8 18 MAX 6 12 25 UNITS pF pF pF NOTES: 6. This parameter is only sampled and is not 100% tested. 7. Typical values are for TA = 25°C and nominal supply voltages. TEST LOAD (High Impedance Test Systems) A.C. TESTING INPUT/OUTPUT WAVEFORM 97.5 Ω 2.01 V D.U.T. 3.0 2.0 0.8 TEST POINTS 2.0 0.8 30 pF (INCLUDING SCOPE AND JIG CAPACITANCE) 0.0 A.C. testing inputs are driven at 3.0 V for a logic "1" and 0.0 V for a logic "0." Timing measurements are made at 2.0 V for a logic "1" and 0.8 V for a logic "0". NOTE: 8. Provide adequate decoupling capacitance as close as possible to this device to achieve the published A.C. and D.C. parameters. A 0.1 microfarad capacitor in parallel with a 0.01 microfarad capacitor connected between VCC and ground is recommended. Inadequate decoupling may result in access time degradation or other transient performance failures. 3-9 WS57C128FB PROGRAMMING INFORMATION DC CHARACTERISTICS (TA = 25 ± 5°C, VCC = 6.25 V ± 0.25 V, VPP = 12.75 ± 0.25 V) SYMBOLS ILI IPP ICC VOL VOH NOTE: PARAMETER Input Leakage Current (VIN = VCC or Gnd) VPP Supply Current During Programming Pulse (CE = PGM = VIL) VCC Supply Current Output Low Voltage During Verify (IOL = 16 mA) Output High Voltage During Verify (IOH = –4 mA) MIN –10 MAX 10 60 30 0.4 UNITS µA mA mA V V 2.4 9. VCC must be applied either coincidentally or before VPP and removed either coincidentally or after VPP. 10. VPP must not be greater than 13 volts including overshoot. During CE = PGM = VIL, VPP must not be switched from 5 volts to 12.5 volts or vice-versa. 11. During power up the PGM pin must be brought high (≥ VIH) either coincident with or before power is applied to VPP. AC CHARACTERISTICS (TA = 25 ± 5°C, VCC = 6.25 V ± 0.25 V, VPP = 12.75 ± 0.25 V) SYMBOLS t AS t CES t OES t OS t AH t OH t DF t OE t VS t PW PARAMETER Address Setup Time Chip Enable Setup Time Output Enable Setup Time Data Setup Time Address Hold Time Data Hold Time Chip Disable to Output Float Delay Data Valid From Output Enable VPP Setup Time PGM Pulse Width 2 100 200 MIN 2 2 2 2 0 2 0 130 130 TYP MAX UNITS µs µs µs µs µs µs ns ns µs µs PROGRAMMING WAVEFORM ADDRESSES tAS DATA tOS VPP VPP VCC tVS VIH CE VIL tCES VIH PGM VIL tPW VIH OE VIL tOES DATA IN STABLE tOH HIGH Z tOE ADDRESS STABLE tAH DATA OUT VALID tDF 3-10 WS57C128FB ORDERING INFORMATION PART NUMBER WS57C128FB-35D WS57C128FB-45D WS57C128FB-45DMB WS57C128FB-45J WS57C128FB-45L WS57C128FB-55CMB WS57C128FB-55D WS57C128FB-55DMB WS57C128FB-70D WS57C128FB-70DM WS57C128FB-70DMB NOTE: SPEED (ns) 35 45 45 45 45 55 55 55 70 70 70 PACKAGE TYPE 28 Pin CERDIP, 0.6" 28 Pin CERDIP, 0.6" 28 Pin CERDIP, 0.6" 32 Pin PLDCC 32 Pin CLDCC 32 Pad CLLCC 28 Pin CERDIP, 0.6" 28 Pin CERDIP, 0.6" 28 Pin CERDIP, 0.6" 28 Pin CERDIP, 0.6" 28 Pin CERDIP, 0.6" OPERATING PACKAGE TEMPERATURE DRAWING RANGE D2 D2 D2 J4 L3 C2 D2 D2 D2 D2 D2 Comm'l Comm'l Military Comm'l Comm'l Military Comm'l Military Comm'l Military Military WSI MANUFACTURING PROCEDURE Standard Standard MIL-STD-883C Standard Standard MIL-STD-883C Standard MIL-STD-883C Standard Standard MIL-STD-883C 12. The actual part marking will not include the initials "WS." PROGRAMMING/ALGORITHMS/ERASURE/PROGRAMMERS REFER TO PAGE 5-1 The WS57C128FB is programmed using Algorithm D shown on page 5-9. Return to Main Menu 3-11