SMR100

SMR100 THIS PRODUCT HAS REACHED END OF LIFE Programmable Long-Delay Push-Button Reset Controller for Consumer Equipment FEATURES & APPLICATIONS • De-Bounced Reset Input with up to 40 Second Programmable Delay Time • External Push-Button Control Provides a Reliable End-User System Reset Function • Reset Signal at 3.0V with a Programmable Timeout Period • Brownout Warning Signal whenever the supply dips below 3.1V • Programmable Glitch Filtering of Brownout Warning (BAD_PWR#) and Reset Function • 8 Pin SOIC Package TM • 6 ball Ultra CSP (Chip-Scale) Package Applications • Satellite and Cable-TV Set-top box • Handheld PCs, Cameras, Camcorders, PDAs • Security/Medical Alert Systems INTRODUCTION The SMR100 programmable reset controller is designed for consumer applications specified by Satellite-TV set-top box standards. The SMR100 provides a satellite box controller solution during initial setup, changing programming cards and/or system reset needs without removing power. The part can accommodate a long-delay hold down of an external reset push-button using an internal programmable debounced timer. The part is factory programmed, however, multiplexed programming pins are also provided for in-system programming for prototype purposes. The required hold down time is programmable from 0.325 to 40 Sec with an internal on-chip oscillator. Accurate warning of a 3.1V brownout condition (BAD_PWR#), and a programmable reset (RESET_OUT#) timeout period when the VDD supply pin reaches 3.0V are also provided. During a reset (RESET_OUT#), the part enables the “BAD_PWR#” or brownout warning output until the reset has cleared. A programmable glitch filter avoids nuisance tripping of the internal comparators. SIMPLIFIED APPLICATIONS DRAWING 3.3V Manual Reset Switch RESET_IN# 0.1µf VDD 3.3V TRIM_C AP FILT_CAP BAD_PWR# SMR100 RESET_OUT# PROG GND ASIC µP Figure 1 – Applications Schematic using the SMR100 to supervise the supply to digital components. As shown, the SMR100 is designed to use a minimum of external components. © SUMMIT Microelectronics, Inc. 2004 • 1717 Fox Drive • San Jose CA 95131 • Phone 408 436-9890 • FAX 408 436-9897 The Summit Web Site can be accessed by “right” or “left” mouse clicking on the link: http://www.summitmicro.com/ 2076 1.6 06/30/04 1 SMR100 Preliminary Information GENERAL DESCRIPTION The SMR100 is a programmable Reset Controller for Consumer Equipment used to monitor the power supply in µP and digital systems. It provides excellent circuit reliability and low cost by eliminating external components and adjustments when used with +3.3V powered circuits. The device performs several functions: it first asserts a ‘bad power’ signal and then a reset signal whenever the VDD supply voltage declines below two preset thresholds, keeping it asserted for a programmable time period after VDD has risen above the reset threshold. The part also provides a programmable delay push button input for manual system reset. The open-drain RESET_OUT# and BAD_PWR# outputs have on-chip 100K pull-up resistors and do not require external pull-up resistors unless more drive current is needed (see figure 3). The RESET_OUT# and BAD_PWR# comparators are designed to ignore fast transients on VDD, and the outputs are guaranteed to be in the correct logic state for VDD down to 1V. Low supply current makes the SMR100 ideal for use in portable equipment. The RESET_IN# input includes a programmable hold-down delay timer for use with a push button switch for consumer equipment such as set-top boxes and PCs. A microprocessor’s (µP’s) reset input starts the µP in a known state. The SMR100 asserts a reset to prevent code -execution errors during power-up, power-down, or UnderVoltage (UV) conditions. It asserts a RESET_OUT# signal whenever the VDD supply voltage declines below a 3.0V threshold, keeping it asserted for a programmable period after VDD has risen above the reset threshold. It also asserts a Bad Power signal to warn of an impending reset or brownout condition to allow time for the system to save data before a reset occurs. The BAD_PWR# signal is also asserted whenever RESET_OUT# is asserted to prevent erroneous or false Bad Power warnings during initial turn-on. In addition to issuing a reset to the µP during powerup, power-down, and brownout conditions, the SMR100 is immune to short-duration VDD transients (glitches) due to a programmable glitch filter. Typically, a VDD transient of 100mV less than the reset threshold and lasting for a duration less than the programmed glitch filter setting will not cause a reset pulse. A 0.1µF bypass capacitor mounted as close as possible to the VDD pin provides additional transient immunity. Since the BAD_PWR# and RESET_OUT# outputs are open drain, the device interfaces easily with µPs that have bidirectional-reset pins. Connecting the RESET_OUT# output directly to the µP’s RESET pin allows either the µP or the SMR100 to assert a reset. 3.1V 3.0V VDD TRESET TRESET RESET_OUT# TGLITCH BAD_PWR# TRESET_HD RESET_IN# Push-Button Input Push-Button Released Figure 2 – SMR100 Operation and timing diagram Summit Microelectronics, Inc 2076 1.6 06/30/04 2 SMR100 Preliminary Information INTERNAL BLOCK DIAGRAM 3.3V VDD BAD_PWR at 3.1V + 100k Programmable Duration Glitch Filter BAD_PWR# 1.25V Vref + Programmable Duration Glitch Filter RESET_OUT at 3.0V 2 PROG Programmable Hold-Down Time, 0.3125 to 40Sec MSB Reset Programmable Duration Reset Output Up Count 8 KHz Ring Oscillator, +/-10% accurate Programmable Delay Generator/ Logic User Reset 100k User Reset Pushbutton 100k RESET _IN# RESET_OUT# GND Figure 3 – SMR100 Controller Internal Block Diagram. Summit Microelectronics, Inc 2076 1.6 06/30/04 3 SMR100 Preliminary Information PACKAGE AND PIN CONFIGURATION 6 Ball Ultra CSPTM Bottom View 8 Pin SOIC Top View PROG GND RESET_IN# A1 B1 C1 A2 B2 C2 VDD RESET_OUT# BAD_PWR# PROG 1 NC 2 RESET_IN# 3 GND 4 8 VDD 7 NC 6 BAD_PWR# 5 RESET_OUT# PIN DESCRIPTIONS CSP Pin Number A1 A2 B1 B2 C1 C2 NA SOIC Pin Number 1 8 4 5 3 6 2,7 Pin Type I PWR PWR O I O NC Pin Name PROG VDD GND RESET_OUT# RESET_IN# BAD_PWR# NC Pin Description High voltage programming pin. Set to 12V in programming mode. Connected to ground if not used. Positive supply voltage. Ground pin. Open Drain active low Reset Out indicator. Internally connected to VDD through a 100KΩ resistor. De-bounced push button switch input. Internally connected to VDD through a 100KΩ resistor. Also used as the Data input programming pin when the PROG pin is set to 12V. Open Drain active low Bad Power indicator. Internally connected to VDD through a 100KΩ resistor. No Connect Summit Microelectronics, Inc 2076 1.6 06/30/04 4 SMR100 Preliminary Information ABSOLUTE MAXIMUM RATINGS Temperature Under Bias ......................-55°C to 125°C Storage Temperature............................-65°C to 125°C Terminal Voltage with Respect to GND: VDD……………………………...….-0.3V to 6.0V PROG, RESET_IN#………...….-0.3V to 16.0V All Others………………………..….VDD + 0.7V Output Short Circuit Current .................. 100mA Reflow Solder Temperature (30 secs)................ 240°C ESD Rating per JEDEC…………………....……..2000V Latch-Up testing per JEDEC……………......…±100mA Note - The device is not guaranteed to function outside its operating rating. Stresses listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions outside those listed in the operational sections of the specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability. Devices are ESD sensitive. Handling precautions are recommended. RECOMMENDED OPERATING CONDITIONS Temperature Range (Commercial)……….–5°C to +70°C Supply Voltage………………………………..3.3V +/-10%1 Programming Supply Voltage………………12.0V +/-10% Note 1 – The device can operate over a supply range of 2.7V to 5.5V. Package Thermal Resistance (θJA) 8 Pin SOIC………………….……….………….…23oC/W 6 Ball Ultra CSPTM………….………….…….…TBDoC/W Moisture Classification Level 1 (MSL 1) per J-STD- 020 RELIABILITY CHARACTERISTICS Data Retention……………...……………..…..100 Years Endurance………………...…….……….100,000 Cycles DC OPERATING CHARACTERISTICS (Over recommended operating conditions, unless otherwise noted. All voltages are relative to GND.) Symbol Parameter Notes Min. Typ. Max Unit VDD VPROG VRT VBPT IDD VIH VIL VOL IOL Supply Voltage Range Programming Supply Voltage Range Reset Threshold Bad Power Warning Threshold Power Supply Current Input High Voltage Input Low Voltage Programmable Active High or Low Open Drain Outputs (RESET_OUT#, BAD_PWR#) Output Low Current VDD = 3.3V, no RESET_OUT# in progress VDD = 3.3V VDD = 3.3V ISINK = 1mA 0 0 0.9xVDD 2.7 10.0 2.95 3.05 3.3 12.0 3.0 3.1 100 5.5 15.0 3.05 3.15 200 VDD 0.1xVDD 0.4 1.0 V V V V µA V V V mA Summit Microelectronics, Inc 2076 1.6 06/30/04 5 SMR100 Preliminary Information AC OPERATING CHARACTERISTICS (Over recommended operating conditions, unless otherwise noted. All voltages are relative to GND.) Symbol Parameter Notes Min. Typ. Max Unit 0.8 TRESET_OUT Reset Timeout period Programmed Default = 25ms 20 80 160 3 tGLITCH Programmable glitch filter times Programmed Default = 4µs 4.5 7.5 13.5 0.26 0.5 1 tRESET_HD Programmable Reset Hold-Down Delay times Programmed Default = 10s 2 4 8 16 32 1 25 100 200 4 6 10 18 0.325 0.625 1.25 2.5 5 10 20 40 1.2 30 120 240 5 7.5 12.5 22.5 0.39 0.75 1.5 3 6 12 24 48 ms ms ms ms µs µs µs µs s s s s s s s s Summit Microelectronics, Inc 2076 1.6 06/30/04 6 SMR100 Preliminary Information PACKAGE OUTLINE 8 Pin SOIC Package Ref. JEDEC MS-012 1 0.150 - 0.157 (3.80 - 4.00) Inches (Millimeters) 0.189 - 0.196 (4.80 - 5.00) 0.053 - 0.069 (1.35 - 1.75) 0.010 - 0.020 ×45º (0.25 - 0.50) 0.013 - 0.020 (0.33 - 0.51) 0.004 - 0.010 (0.10 - 0.25) .05 (1.27) TYP. 0.016 - 0.050 (0.40 - 1.27) 0.228 - 0.244 (5.80 - 6.20) 8 Pin SOIC Summit Microelectronics, Inc 2076 1.6 06/30/04 7 SMR100 Preliminary Information PACKAGE OUTLINE (CONTINUED) 6 Ball Ultra CSPTM – Chip Scale Package Summit Microelectronics, Inc 2076 1.6 06/30/04 8 SMR100 Preliminary Information PART MARKING Drawing not to scale Product Tracking Code (Summit use) Part Number suffix-nnn (Customer specific ordering requirements) Date Code Y = Single digit year (4=2004, 5=2005, etc) Ball A1 Identifier SUMMIT SMR100S Annn Summit Part Number xx AYYWW Status Tracking Code (Blank, MS, ES, 01, 02,...) (Summit Use) ORDERING INFORMATION The default device ordering number is SMR100E-100 and is programmed as described in the AC Operating Characteristics table on page 6 and tested over the commercial temperature range. NOTICE NOTE 1 - This is a Preliminary Information data sheet that describes a Summit product currently in pre-production with limited characterization. Revision 1.6 - This document supersedes all previous versions. Data Sheet updates can be accessed by “right” or “left” mouse clicking on the link: http://www.summitmicro.com/ Device Errata sheets can be accessed by “right” or “left” mouse clicking on the link: http://www.summitmicro.com/errata/ SUMMIT Microelectronics, Inc. reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. SUMMIT Microelectronics, Inc. assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infringement. Charts and schedules contained herein reflect representative operating parameters, and may vary depending upon a user’s specific application. While the information in this publication has been carefully checked, SUMMIT Microelectronics, Inc. shall not be liable for any damages arising as a result of any error or omission. SUMMIT Microelectronics, Inc. does not recommend the use of any of its products in life support or aviation applications where the failure or malfunction of the product can reasonably be expected to cause any failure of either system or to significantly affect their safety or effectiveness. Products are not authorized for use in such applications unless SUMMIT Microelectronics, Inc. receives written assurances, to its satisfaction, that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; and (c) potential liability of SUMMIT Microelectronics, Inc. is adequately protected under the circumstances. © Copyright 2004 SUMMIT MICROELECTRONICS, Inc. Ultra CSP TM Summit Microelectronics, Inc Annn SSYWW Date Code (YYWW) Lot tracking code (Summit use) Part Number suffix (Contains Customer specific ordering requirements) Product Tracking Code (Summit use) Pin 1 Identifier Drawing not to scale SMR100 Summit Part Number E nnn Package E = 6 Ball Ultra CSPTM S = 8 Pin SOIC Customer specific requirements are contained in the suffix such as Hex code, Hex code revision, etc. Part Number Suffix Programmable Analog for a Digital World™ is a registered name of FlipChip International, LLC. 2076 1.6 06/30/04 9