S34063

1.5 A, Step−Up/Down/ Inverting Switching Regulators The STC 34063 Series is a monolithic control circuit containing the primary functions required for DC−to−DC converters. These devices consist of an internal temperature compensated reference, comparator, controlled duty cycle oscillator with an active current limit circuit, driver and high current output switch. This series was specifically designed to be incorporated in Step−Down and Step−Up and Voltage−Inverting applications with a minimum number of external components. PDIP−8 8 1 SO−8 8 1 PIN CONNECTIONS Switch Collector Switch Emitter Timing Capacitor GN D Driver Collector Ipk Sense VCC Comparator Inverting Input • • • • • • • Operation from 2.5 V to 30 V Input Low Standby Current Current Limiting Output Switch Current to 1.5 A Output Voltage Adjustable from 1.25 to 30V Frequency Operation from 100Hz to 100 kHz Precision 1%Reference 1 2 3 4 8 7 6 5 (Top View) Drive 8 Collector SQ 7 R 100 Ipk Oscillator CT 6 VCC Comparator + − Comparator 5 Inverting Input (Bottom View) 1.25 V Reference Regulator Q2 Q1 1 Switch Collector Ipk Sense 2 Switch Emitter 3 Timing Capacitor 4 GN D This device contains 51 active transistors. Figure 1. Representative Schematic Diagram 1 S34063 S34063 MAXIMUM RATINGS Rating Power Supply Voltage Comparator Input Voltage Range Switch Collector Voltage Switch Emitter Voltage (VPin 1 = 40 V) Switch Collector to Emitter Voltage Driver Collector Voltage Driver Collector Current (Note 1) Switch Current Power Dissipation and Thermal Characteristics Plastic Package, P, P1 Suffix TA = 25°C Thermal Resistance SOIC Package, D Suffix TA = 25°C Thermal Resistance Operating Junction Temperature Operating Ambient Temperature Range S3406 Storage Temperature Range Tstg PD RqJA PD RqJA TJ TAS 0 to +70 −65 to +150 °C 1.25 100 625 160 +150 W °C/W mW °C/W °C Symbol VCC VIR VC(switch) VE(switch) VCE(switch) VC(driver) IC(driver) ISW Value 40 −0.3 to + 40 40 40 40 40 100 1.5 Unit Vdc Vdc Vdc Vdc Vdc Vdc mA A ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, TA = Tlow to Thigh [Note 4], unless otherwise specified.) Characteristics OSCILLATOR Frequency (VPin 5 = 0 V, CT = 1.0 nF, TA = 25°C) Charge Current (VCC = 5.0 V to 40 V, TA = 25°C) Discharge Current (VCC = 5.0 V to 40 V, TA = 25°C) Discharge to Charge Current Ratio (Pin 7 to VCC, TA = 25°C) Current Limit Sense Voltage (Ichg = Idischg, TA = 25°C) OUTPUT SWITCH (Note 5) Saturation Voltage, Darlington Connection ( ISW = 1.0 A, Pins 1, 8 connected) Saturation Voltage (Note 6) (ISW = 1.0 A, RPin 8 = 82 W to VCC, Forced b ] 20) DC Current Gain (ISW = 1.0 A, VCE = 5.0 V, TA = 25°C) Collector Off−State Current (VCE = 40 V) COMPARATOR Threshold Voltage TA = 25°C TA = Tlow to Thigh Threshold Voltage Line Regulation (VCC = 5.0 V to 40 V) S34063 S33063 Input Bias Current (Vin = 0 V) TOTAL DEVICE Supply Current (VCC = 5.0 V to 40 V, CT = 1.0 nF, Pin 7 = VCC, VPin 5 > Vth, Pin 2 = GND, remaining pins open) ICC − − 4.0 mA Vth 1.225 1.21 Regline − − IIB − 1.4 1.4 −20 5.0 6.0 −400 nA 1.25 − 1.275 1.29 mV V VCE(sat) VCE(sat) hFE IC(off) − − 50 − 1.0 0.45 75 0.01 1.3 0.7 − 100 V V − mA fosc Ichg Idischg Idischg/Ichg Vipk(sense) 24 24 140 5.2 250 33 35 220 6.5 300 42 42 260 7.5 350 kHz mA mA − mV Symbol Min Typ Max Unit 2 S34063 t on−off , OUTPUT SWITCH ON-OFF TIME ( µs) 1000 500 200 100 50 20 10 5.0 2.0 1.0 0.01 0.02 0.05 0.1 0.2 0.5 1.0 2.0 CT, OSCILLATOR TIMING CAPACITOR (nF) 5.0 10 toff V OSC, OSCILLATOR VOLTAGE (V) VCC = 5.0 V Pin 7 = VCC Pin 5 = GND TA = 25°C ton VCC = 5.0 V Pin 7 = VCC Pin 2 = GND Pins 1, 5, 8 = Open CT = 1.0 nF TA = 25°C 10 ms/DIV Figure 2. Output Switch On−Off Time versus Oscillator Timing Capacitor 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.0 0 0.2 0.4 0.6 0.8 1.0 1.2 IE, EMITTER CURRENT (A) 1.4 1.6 VCC = 5.0 V Pins 1, 7, 8 = VCC Pins 3, 5 = GND TA = 25°C (See Note 7) VCE(sat), SATURATION VOLTAGE (V) VCE(sat), SATURATION VOLTAGE (V) 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 Figure 3. Timing Capacitor Waveform Darlington Connection VCC = 5.0 V Pin 7 = VCC Pins 2, 3, 5 = GND TA = 25°C (See Note 7) Forced b = 20 0.2 0.4 0.6 0.8 1.0 1.2 IC, COLLECTOR CURRENT(A) 1.4 1.6 Figure 4. Emitter Follower Configuration Output Saturation Voltage versus Emitter Current VIPK(sense), CURRENT LIMIT SENSE VOLTAGE (V) Figure 5. Common Emitter Configuration Output Switch Saturation Voltage versus Collector Current 3.6 3.2 I CC, SUPPLY CURRENT (mA) 400 380 360 340 320 300 280 260 240 220 200 −55 −25 0 25 50 75 TA, AMBIENT TEMPERATURE (°C) 100 125 VCC = 5.0 V Ichg = Idischg 2.8 2.4 2.0 1.6 1.2 0.8 0.4 0 0 5.0 10 15 20 25 30 VCC, SUPPLY VOLTAGE (V) 35 40 CT = 1.0 nF Pin 7 = VCC Pin 2 = GND Figure 6. Current Limit Sense Voltage versus Temperature Figure 7. Standby Supply Current versus Supply Voltage 7. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient temperature as possible. 3 200 mV/DIV 170 mH L 8 180 SQ R 7 Ipk OSC 6 + 100 + − S34063 1 Q2 Q1 2 1N5819 Rsc 0.22 Vin 12 V VCC CT 3 CT Comp. 1.25 V Ref Reg 4 1500 pF 1.0 mH 5 R2 R1 2.2 k 47 k Vout 28 V/175 mA + 330 CO + 100 Vout Optional Filter Test Line Regulation Load Regulation Output Ripple Efficiency Output Ripple With Optional Filter Conditions Vin = 8.0 V to 16 V, IO = 175 mA Vin = 12 V, IO = 75 mA to 175 mA Vin = 12 V, IO = 175 mA Vin = 12 V, IO = 175 mA Vin = 12 V, IO = 175 mA Results 30 mV = ±0.05% 10 mV = ±0.017% 400 mVpp 87.7% 40 mVpp Figure 8. Step−Up Converter 8 1 Vout R 8 1 Vout 7 2 Rsc 7 2 Rsc Vin 6 Vin 6 R ³ 0 for constant Vin Figure 9. External Current Boost Connections for IC Peak Greater than 1.5 A 9a. External NPN Switch 9b. External NPN Saturated Switch (See Note 8) 8. If the output switch is driven into hard saturation (non−Darlington configuration) at low switch currents (≤ 300 mA) and high driver currents (≥ 30 mA), it may take up to 2.0 ms to come out of saturation. This condition will shorten the off time at frequencies ≥ 30 kHz, and is magnified at high temperatures. This condition does not occur with a Darlington configuration, since the output switch cannot saturate. If a non−Darlington configuration is used, the following output drive condition is recommended. 4 S34063 8 SQ R 7 Ipk OSC 6 100 + VCC + − 1 Q2 Q1 2 CT 1N5819 3 L CT 470 pF 4 1.0 mH + CO Vout 100 220 mH Rsc 0.33 Vin 25 V Comp. 1.25 V Ref Reg 5 R2 3.6 k R1 1.2 k 470 + Vout 5.0 V/500 mA Optional Filter Test Line Regulation Load Regulation Output Ripple Short Circuit Current Efficiency Output Ripple With Optional Filter Conditions Vin = 15 V to 25 V, IO = 500 mA Vin = 25 V, IO = 50 mA to 500 mA Vin = 25 V, IO = 500 mA Vin = 25 V, RL = 0.1 W Vin = 25 V, IO = 500 mA Vin = 25 V, IO = 500 mA Results 12 mV = ±0.12% 3.0 mV = ±0.03% 120 mVpp 1.1 A 83.7% 40 mVpp Figure 10. Step−Down Converter 8 1 8 1 V 7 Rsc Vin 6 2 Vout Rsc Vin 7 2 6 Figure 11. External Current Boost Connections for IC Peak Greater than 1.5 A 11a. External NPN Switch 11b. External PNP Saturated Switch 5 S34063 8 SQ R 7 Ipk OSC 6 + 100 + − 1 Q2 Q1 2 L 3 1.25 V Ref Reg 4 R1 953 1.0 mH Vout −12 V/100 mA 1000 mf + CO + 100 Vout + 1500 pF 1N5819 88 mH Rsc 0.24 Vin 4.5 V to 6.0 V VCC CT Comp. 5 R2 8.2 k Optional Filter Test Line Regulation Load Regulation Output Ripple Short Circuit Current Efficiency Output Ripple With Optional Filter Conditions Vin = 4.5 V to 6.0 V, IO = 100 mA Vin = 5.0 V, IO = 10 mA to 100 mA Vin = 5.0 V, IO = 100 mA Vin = 5.0 V, RL = 0.1 W Vin = 5.0 V, IO = 100 mA Vin = 5.0 V, IO = 100 mA Results 3.0 mV = ± 0.012% 0.022 V = ± 0.09% 500 mVpp 910 mA 62.2% 70 mVpp Figure 12. Voltage Inverting Converter 8 1 8 1 Vout 7 2 Vout 7 2 Vin 6 Vin 6 Figure 13. External Current Boost Connections for IC Peak Greater than 1.5 A 13a. External NPN Switch 13b. External PNP Saturated Switch 6