2N7007

2N7007 N-Channel Enhancement-Mode Vertical DMOS FET Ordering Information BVDSS / BVDGS 240V RDS(ON) (max) 45Ω ID(ON) (min) 150mA Order Number / Package TO-92 2N7007 Features s Free from secondary breakdown s Low power drive requirement s Ease of paralleling s Low CISS and fast switching speeds s Excellent thermal stability s Integral Source-Drain diode s High input impedance and high gain s Complementary N- and P-channel devices Advanced DMOS Technology These enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, these devices are free from thermal runaway and thermally-induced secondary breakdown. Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Applications s Motor controls s Converters s Amplifiers s Switches s Power supply circuits s Drivers (relays, hammers, solenoids, lamps, memories, displays, bipolar transistors, etc.) Package Options Absolute Maximum Ratings Drain-to-Source Voltage Drain-to-Gate Voltage Gate-to-Source Voltage Operating and Storage Temperature Soldering Temperature* * Distance of 1.6 mm from case for 10 seconds. Note 1: See Package Outline section for dimensions. BVDSS BVDGS ±30V -55°C to +150°C 300°C SGD TO-92 7-13 2N7007 Thermal Characteristics Package TO-92 ID (continuous)* 65mA ID (pulsed) 260mA Power Dissipation @ TC = 25°C 1W θjc °C/W 125 θja °C/W 170 IDR* 65mA IDRM 260mA * ID (continuous) is limited by max rated Tj. Electrical Characteristics (@ 25°C unless otherwise specified) Symbol BVDSS VGS(th) IGSS IDSS Parameter Drain-to-Source Breakdown Voltage Gate Threshold Voltage Gate Body Leakage Zero Gate Voltage Drain Current Min 240 1 2.5 10 100 1 ID(ON) RDS(ON) GFS CISS COSS CRSS t(ON) t(OFF) VSD ON-State Drain Current 50 150 Static Drain-to-Source ON-State Resistance 45 45 Forward Transconductance Input Capacitance Common Source Output Capacitance Reverse Transfer Capacitance Turn-ON Time Turn-OFF Time Diode Forward Voltage Drop 30 30 15 10 30 20 1.2 V ns pF VGS = 0V, VDS = 25V f = 1 MHz VDD = 60V, ID = 50 mA, RGEN = 25Ω ISD = 65mA, VGS = 0V mA Ω m Ω Typ Max Unit V V nA nA µA Conditions ID = 100µA, VGS = 0V VGS = VDS, ID = 250µA VGS = ±20V, VDS = 0V VGS = 0V, VDS = 120V VGS = 0V, VDS = 120V TA = 125°C VGS = 4.5V, VDS = 20V VGS = 10V, VDS = 20V VGS = 4.5V, ID = 20mA VGS = 10V, ID = 50mA VDS = 10V, ID = 50mA Notes: 1. All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.) 2. All A.C. parameters sample tested. Switching Waveforms and Test Circuit VDD 10V 90% INPUT 0V 10% t(ON) td(ON) VDD OUTPUT 0V 90% 90% tr t(OFF) td(OFF) tF D.U.T. 10% 10% INPUT PULSE GENERATOR Rgen RL OUTPUT 7-14