PS10

PS10 - Active High PS11 - Active Low PS10/PS11 Initial Release Quad Power Sequencing Controller Features Sequencing of Four or More* Supplies, ICs, or Subsystems Independently Programmable Delays Between Open Drain PWRGD Flags (5ms to 200ms) ±10V to ±90V Operation Tracking in Combination with Schottky Diodes Input Supervisors Including: o UV/OV Lock Out/Enable o Power-On-Reset (POR) Low Power Consumption, 0.4mA Supply Current Small SO-14 Package *By Daisy-Chaining PS10/11’s Description Many of today’s high performance FPGA’s, Microprocessors, DSP and industrial/embedded subsystems require sequencing of the input power. Historically this has been accomplished: i) discretely using comparators, references & RC circuits; ii) using expensive programmable controllers; or iii) with low voltage sequencers requiring resistor drop downs and several high voltage optocoupler or level shift components. The PS10/11 saves board space, improves accuracy, eliminates optocouplers or level shifts and reduces overall component count by combining four timers, programmable input UV/OV supervisors, a programmable POR and four 90V open drain outputs. A high reliability, high voltage, junction isolated process allows the PS10/11 to be connected directly across the high voltage input rails. The power-on-reset interval (POR) may be programmed by a capacitor on Cramp. To sequence additional systems, PS10/11 may be daisy chained together. If at any time the input supply falls outside the UV/OV detector range the PWRGD outputs will immediately become INACTIVE. Down sequencing may be accomplished with additional components (see page 11). The PS10/PS11 is available in a space saving SO-14 package. Applications Power Supply Sequencing -48V Telecom and Networking Distributed Systems -24V Cellular and Fixed Wireless Systems -24V PBX Systems +48V Storage Systems FPGA, Microprocessor Tracking Industrial/Embedded System Timing/Sequencing High Voltage MEMs Driver’s Supply Sequencing High Voltage Display Driver’s Supply Sequencing Typical Application Circuit GND or +48V 487K 6 UV 14 VIN PWRGD-D / PWRGD-D PWRGD-C / PWRGD-C 6.81K 5 7 OV VEE PWRGD-B / PWRGD-B 1 2 3 4 /EN DC/DC CONVERTER Waveform (49.9k pull-up on PS11 PWRGD pins) /EN DC/DC CONVERTER +12V COM +5V COM PS10/PS11 TB 11 TC 12 TD 13 PWRGD-A / PWRGD-A 9.76K Ramp 10 /EN DC/DC CONVERTER +3.3V COM RTB RTC RTD 10nF /EN +2.5V COM -48V or GND DC/DC CONVERTER Notes: 1. Under Voltage Shutdown (UV) set to 37V. 2. Over Voltage Shutdown (OV) to 57.8V. Relative to Negative Rail A051204 Supertex, Inc. • 1235 Bordeaux Drive, Sunnyvale, CA 94089 • Tel: (408) 222-8888 • FAX: (408) 222-4895 • www.supertex.com 1 PS10/PS11 Absolute Maximum Ratings* VEE referenced to VIN pin VPWRGD referenced to VEE voltage VUV and VOV referenced to VEE Voltage Operating Ambient Temperature Operating Junction Temperature Storage Temperature Range Power Dissipation @ 25°C, 14-Pin SOIC +0.3V to -100V -0.3V to +100V -0.3V to 12V -40°C to +85°C -40°C to +125°C -65° to +150°C 750mW Ordering Information Active State of Power Good Flags High Low Package Options 14 Pin SOIC PS10NG PS11NG *Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. Electrical Characteristics (-10V ≤ V Symbol Parameter IN ≤ -90V, TA = 25°C unless otherwise specified) Min Typ Max Units Conditions Supply (Referenced to VIN pin) VEE IEE Supply Voltage Supply Current -90 400 -10 450 V µA VEE = -48V OV and UV Control (Referenced to VEE pin) VUVH VUVL VUVHY IUV VOVH VOVL VOVHY IOV # UV High Threshold# UV Low Threshold UV Hysteresis # # 1.16 1.06 1.22 1.12 100 1.28 1.18 V V mV Low to High Transition High to Low Transition UV Input Current OV High Threshold OV Low Threshold OV Hysteresis # # 1.0 1.16 1.06 1.22 1.12 100 1.0 1.28 1.18 # nA V V mV nA VUV = VEE + 1.9V Low to High Transition High to Low Transition OV Input Current VUV = VEE + 1.9V Specifications apply over 0°C ≤ TA ≤ 70°C Power Good Timing (Test Conditions: CRAMP = 10nF, VUV = VEE + 1.9V, VOV = VEE + 0.5V) IRAMP tPWRGD-A tPWRGD-B tPWRGD-B tPWRGD-C tPWRGD-C tPWRGD-D tPWRGD-D Ramp Pin Output Current Time from UV High to PWRGD-A Maximum time from PWRGD-A to PWRGD-B Minimum time from PWRGD-A to PWRGD-B Maximum time from PWRGD-B to PWRGD-C Minimum time from PWRGD-B to PWRGD-C Maximum time from PWRGD-C to PWRGD-D Minimum time from PWRGD-C to PWRGD-D 150 3.0 150 3.0 150 3.0 10 8.8 200* 5.0* 200* 5.0* 200* 5.0* 250 8.0 250 8.0 250 8.0 µA ms ms ms ms ms ms ms VEE = -48V, CRAMP = 10nF, see Typical Application Circuit RTB = 120kΩ RTB = 3kΩ RTC = 120kΩ RTC = 3kΩ RTD = 120kΩ RTD = 3kΩ *Note: Variations will track. For example if tPWRGD-A is 250ms then so will be tPWRGD-B/C/D. Contact factory for tighter tolerance version. Power Good Outputs (Test Conditions: VUV = VEE + 1.9V, VOV = VEE + 0.5V) VPWRGD-x(hi) VPWRGD-x(lo) IPWRGD-x(lk) Power Good Pin Breakdown Voltage Power Good Pin Output Low Voltage Maximum Leakage Current 2 90 0.4