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TC2320TG

TC2320TG

  • 厂商:

    SUTEX

  • 封装:

  • 描述:

    TC2320TG - N- and P- Channel Enhancement-Mode Dual MOSFET - Supertex, Inc

  • 数据手册
  • 价格&库存
TC2320TG 数据手册
TC2320 TC2320 N- and P- Channel Enhancement-Mode Dual MOSFET BVDSS/BVDGS N-Channel 200V P-Channel -200V RDS(ON) (max) N-Channel 7.0 P-Channel 12 Order Number/Package SO-8 TC2320TG Features ❑ Low threshold ❑ Low on resistance ❑ Independent, electrically isolated N- and P-channels ❑ Low input capacitance ❑ Fast switching speeds ❑ Free from secondary breakdowns ❑ Low input and output leakage Low Threshold DMOS Technology The Supertex TC2320TG consist of a high voltage low threshold Nchannel and P-channel MOSFET in an SO-8 package. These low threshold enhancement-mode (normally-off) transistors utilize an advanced vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, these devices are free from thermal runaway and thermally-induced secondary breakdown. Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Application ❑ Medical Ultrasound Transmitters ❑ High voltage pulsers ❑ Amplifiers ❑ Buffers ❑ Piezoelectric transducer drivers ❑ General purpose line drivers ❑ Logic level interfaces Package Option S1 1 N-Channel BVDSS BVDGS ±20V -55°C to +150°C 300°C 8 7 6 P-Channel D1 D1 D2 D2 Absolute Maximum Ratings* Drain-to-Source Voltage Drain-to-Gate Voltage Gate-to-Source Voltage Operating and Storage Temperature Soldering Temperature* *Distance of 1.6mm from case for 10 seconds. G1 S2 G2 2 3 4 5 SO-8 Package (top view) 04/23/02 Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website. 1 TC2320 N-Channel Electrical Characteristics (@ 25°C unless otherwise specified) Symbol BVDSS VGS(th) ∆V GS(th) IGSS IDSS Parameter Drain-to-Source Breakdown Voltage Gate Threshold Voltage Change in VGS(th) with Temperature Gate Body Leakage Zero Gate Voltage Drain Current Min 200 0.6 2.0 -4.5 100 1.0 10.0 1.0 ID(ON) RDS(ON) ∆RDS(ON) GFS CISS COSS CRSS td(ON) tr td(OFF) tf VSD trr Notes: 1.All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.) 2.All A.C. parameters sample tested. Typ Max Unit V V mV/°C nA µA µA mA Conditions ID = 100µA, VGS = 0V VGS = VDS, ID = 1mA ID = 1mA, VGS = VDS VGS = ±20V, VDS = 0V VGS = 0V, VDS = 100V VGS = 0V, VDS = Max Rating VGS = 0V, VDS = 0.8 Max Rating TA = 125°C VGS = 4.5V, VDS = 25V VGS = 10V, VDS = 25V VGS = 4.5V, ID = 150mA VGS = 10V, ID = 1.0A VGS = 4.5V, ID = 150mA VDS = 25V, ID = 200mA VGS = 0V, VDS = 25V, f = 1MHz ON-State Drain Current Static Drain-to-Source ON-State Resistance Change in RDS(ON) with Temperature Forward Transconductance Input Capacitance Common Source Output Capacitance Reverse Transfer Capacitance Turn-ON Delay Time Rise Time Turn-OFF Delay Time Fall Time Diode Forward Voltage Drop Reverse Recovery Time 0.6 1.2 8.0 7.0 1.0 150 110 60 23 20 15 25 25 1.8 300 V ns ns pF A Ω Ω %/°C m Switching Waveforms and Test Circuit 10V 90% INPUT 0V PULSE GENERATOR Rgen 10% t(ON) t(OFF) tr td(OFF) tF td(ON) VDD 10% 10% INPUT OUTPUT 0V 90% 90% 2 Ω VDD = 25V ID = 150mA RGEN = 25Ω ISD = 200mA, VGS = 0V ISD = 200mA, VGS = 0V VDD RL OUTPUT D.U.T. TC2320 P-Channel Electrical Characteristics (@ 25°C unless otherwise specified) Symbol BVDSS VGS(th) ∆VGS(th) IGSS IDSS Parameter Drain-to-Source Breakdown Voltage Gate Threshold Voltage Change in VGS(th) with Temperature Gate Body Leakage Zero Gate Voltage Drain Current Min -200 -1.0 -2.4 4.5 -100 -10 -1.0 ID(ON) RDS(ON) ∆RDS(ON) GFS CISS COSS CRSS td(ON) tr td(OFF) tf VSD trr Notes: 1.All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.) 2.All A.C. parameters sample tested. Typ Max Unit V V mV/°C nA µA mA Conditions VGS = 0V, ID = -2mA VGS = VDS, ID= -1mA VGS = VDS, ID= -1mA VGS = ± 20V, VDS = 0V VGS = 0V, VDS = Max Rating VGS = 0V, VDS = 0.8 Max Rating TA = 125°C VGS = -4.5V, VDS = -25V VGS = -10V, VDS = -25V VGS = -4.5V, ID = -100mA VGS = -10V, ID = -200mA VGS = -10V, ID = -200mA VDS = -25V, ID = -200mA VGS = 0V, VDS = -25V f = 1 MHz ON-State Drain Current -0.25 -0.75 -0.7 -2.1 10 8.0 15 12 1.7 A Ω Static Drain-to-Source ON-State Resistance Change in RDS(ON) with Temperature Forward Transconductance Input Capacitance Common Source Output Capacitance Reverse Transfer Capacitance Turn-ON Delay Time Rise Time Turn-OFF Delay Time Fall Time Diode Forward Voltage Drop Reverse Recovery Time 100 %/°C m 250 75 20 10 125 85 35 10 15 20 15 -1.8 300 pF ns V ns Switching Waveforms and Test Circuit 0V 10% INPUT -10V PULSE GENERATOR 90% t(ON) Rgen t(OFF) tr td(OFF) tF INPUT td(ON) 0V 90% OUTPUT VDD 90% 10% 10% ©2002 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited. 3 1235 Bordeaux Drive, Sunnyvale, CA 94089 TEL: (408) 744-0100 • FAX: (408) 222-4895 www.supertex.com Ω VGS = 0V, ISD = -0.5A VGS = 0V, ISD = -0.5A D.U.T. OUTPUT RL VDD 03/23/02
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