TN1506NW

TN1504/TN1506/TN1510 Low Threshold N-Channel Enhancement-Mode Vertical DMOS FETs Features ► ► ► ► ► ► ► ► Low threshold - 2.0V max. High input impedance Low input capacitance - 50pF typical Fast switching speeds Low on resistance Free from secondary breakdown Low input and output leakage Complementary N- and P-channel devices General Description These low threshold enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors, and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, these devices are free from thermal runaway and thermally-induced secondary breakdown. Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Applications ► ► ► ► ► ► ► Logic level interfaces – ideal for TTL and CMOS Solid state relays Battery operated systems Photo voltaic drives Analog switches General purpose line drivers Telecom switches Absolute Maximum Ratings Parameter Drain-to-source voltage Drain-to-source voltage Drain-to-source voltage Operating and storage temperature O Value BVDSS BVDGS ±20V -55 C to +150OC Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. Ordering Information Device TN1504 TN1506 TN1510 * Die in wafer form. Order Number Die* TN1504NW TN1506NW TN1510NW BVDSS/ BVDGS 40V 60V 100V RDS(ON) (max) 3.0Ω 3.0Ω 3.0Ω VGS(th) (max) 2.0V 2.0V 2.0V ID(ON) (min) 2.0A 2.0A 2.0A 1 TN1504/TN1506/TN1510 Electrical Characteristics (@25 C unless otherwise specified) O Symbol BVDSS VGS(th) ∆VGS(th) IGSS IDSS Parameter TN1504 Drain-to-source breakdown voltage Gate threshold voltage Change in VGS(th) with temperature Gate body leakage TN1506 TN1510 Min 40 60 100 0.6 - Typ - Max - Units V Conditions VGS= 0V, ID = 1.0mA VGS = VDS, ID = 0.5mA VGS = VDS, ID = 1.0mA VGS = ±20V, VDS = 0V VGS =0V, VDS = Max Rating -3.8 0.1 2.0 -5.0 100 10 V mV/OC nA Zero gate voltage drain current - 500 μA VGS = 0V, VDS = 0.8 Max Rating TA = 125OC VGS = 5V, VDS = 25V VGS = 10V, VDS = 25V VGS = 4.5V, ID = 250mA VGS = 10V, ID = 500mA VGS = 10V, ID = 0.5A VDS = 25V, ID = 500mA VGS = 0V, VDS = 25V f = 1 MHz ID(ON) RDS(ON) ∆RDS(ON) GFS CISS COSS CRSS td(ON) tr td(OFF) tf VSD trr ON-state drain current Static drain-to-source ON-state resistance Change in RDS(ON) with temperature Forward transconductance Input capacitance Common source output capacitance Reverse transfer capacitance Turn-ON delay time Rise time Turn-OFF delay time Fall time Diode forward voltage drop Reverse recovery time 225 - 1.4 3.4 2.0 1.6 0.6 400 50 25 4.0 2.0 3.0 6.0 3.0 1.0 400 4.5 3.0 1.1 60 35 8.05 5.0 5.0 7.0 6.0 1.5 - A Ω %/OC mmho pF ns VDD = 25V, ID = 1.0A RGEN = 25Ω V ns VGS = 0V, ISD = 0.5A VGS = 0V, ISD = 0.5A Notes: 1. All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.) 2. All A.C. parameters sample tested. Switching Waveforms and Test Circuit VDD 10V 90% INPUT 0V 10% t(ON) PULSE GENERATOR t(OFF) tr td(OFF) tF RL OUTPUT RGEN td(ON) VDD 10% 10% INPUT D.U.T. OUTPUT 0V 90% 90% Doc.# DSFP-TN1504/TN1506/TN1510 062706 2