VP1304 VP1306 VP1310 P-Channel Enhancement-Mode Vertical DMOS FETs
Ordering Information
BVDSS / BVDGS -40V -60V -100V RDS(ON) (max) 25Ω 25Ω 25Ω ID(ON) (min) -0.25A -0.25A -0.25A Order Number / Package TO-92 VP1304N3 VP1306N3 VP1310N3
Features
Free from secondary breakdown Low power drive requirement Ease of paralleling Low CISS and fast switching speeds Excellent thermal stability Integral Source-Drain diode High input impedance and high gain Complementary N- and P-channel devices
Advanced DMOS Technology
These enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, these devices are free from thermal runaway and thermally-induced secondary breakdown. Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired.
9
Applications
Motor controls Converters Amplifiers Switches Power supply circuits Drivers (relays, hammers, solenoids, lamps, memories, displays, bipolar transistors, etc.)
Package Options
Absolute Maximum Ratings
Drain-to-Source Voltage Drain-to-Gate Voltage Gate-to-Source Voltage Operating and Storage Temperature Soldering Temperature*
* Distance of 1.6 mm from case for 10 seconds.
SGD
BVDSS BVDGS ± 20V -55°C to +150°C 300°C
TO-92
Note: See Package Outline section for dimensions.
7-251
VP1304/VP1306/VP1310
Thermal Characteristics
Package TO-92 ID (continuous)* -0.15A
TA = 25°C
ID (pulsed) -0.65A
Power Dissipation @ TC = 25°C 1.0W
°C/W
125
θjc
°C/W
170
θja
IDR* -0.15A
IDRM -0.65A
* ID (continuous) is limited by max rated Tj.
Electrical Characteristics (@ 25°C unless otherwise specified)
Symbol BVDSS Parameter VP1310 Drain-to-Source Breakdown Voltage Gate Threshold Voltage Change in VGS(th) with Temperature Gate Body Leakage Zero Gate Voltage Drain Current VP1306 VP1304 VGS(th) ∆V GS(th) IGSS IDSS Min -100 -60 -40 -1.5 -3.2 -0.1 -3.5 -3.85 -100 -10 -500 ID(ON) RDS(ON) ∆RDS(ON) GFS CISS COSS CRSS td(ON) tr td(OFF) tf VSD trr ON-State Drain Current -0.08 -0.25 Static Drain-to-Source ON-State Resistance Change in RDS(ON) with Temperature Forward Transconductance Input Capacitance Common Source Output Capacitance Reverse Transfer Capacitance Turn-ON Delay Time Rise Time Turn-OFF Delay Time Fall Time Diode Forward Voltage Drop Reverse Recovery Time 75 -0.23 -0.7 32 19 0.8 120 20 12 3 3 3 3 3 -1.2 350 35 15 5 5 5 5 8 -1.7 V ns ISD = -0.25A, VGS = 0V ISD = -0.25A, VGS = 0V ns VDD = -25V ID = -250mA RGEN = 25Ω pF VGS = 0V, VDS = -25V f = 1 MHz 40 25 1.1 Ω %/°C m Ω µA A V mV/°C nA VGS = VDS, ID = -1mA VGS = VDS, ID = -1mA VGS = ±20V, VDS = 0V VGS = 0V, VDS = Max Rating VGS = 0V, VDS = 0.8 Max Rating TA = 125°C VGS = -5V, VDS = -25V VGS = -10V, VDS = -25V VGS = -5V, ID = -50mA VGS = -10V, ID = -250mA VGS = -10V, ID = -250mA VDS = -25V, ID = -200mA V ID = -1mA, VGS = 0V Typ Max Unit Conditions
Notes: 1. All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.) 2. All A.C. parameters sample tested.
Switching Waveforms and Test Circuit
0V INPUT -10V t(ON) td(ON) 0V 90% OUTPUT VDD 10% 10% VDD 90% tr 90% t(OFF) td(OFF) tF INPUT RL D.U.T. OUTPUT 10% PULSE GENERATOR Rgen
7-252
VP1304/VP1306/VP1310
Typical Performance Curves
Output Characteristics
-1.0 -0.5 VGS = -10V -0.8 VGS = -10V -0.4
Saturation Characteristics
-8V
ID (amperes)
ID (amperes)
-0.6
-8V
-0.3
-6V
-0.4
-0.2
-6V
-0.2
-0.1
-4V -3V
-4V -3V
0 0 -10 -20 -30 -40 -50 0 0 -2 -4 -6 -8 -10
VDS (volts) Transconductance vs. Drain Current
0.2 2.5
VDS (volts) Power Dissipation vs. Ambient Temperature
VDS = -25V
2.0
TA= -55°C
9
GFS (siemens)
0.1
TA = 125°C
PD (watts)
TA = 25°C
1.5
1.0
0.5
TO-92
0 0 -0.2 -0.4 -0.6 -0.8 -1.0
0 0 25 50 75 100 125 150
ID (amperes) Maximum Rated Safe Operating Area
-10 1.0
TC (°C) Thermal Response Characteristics
ID (amperes)
-1.0 TO-92 (pulsed)
Thermal Resistance (normalized)
0.5
TO-92 (DC) -0.1
TO-92 P D = 1W T C = 2 5 °C
0 0.001 0.01 0.1 1.0 10
TA = 25°C
-0.01 -0.1
-1.0
-10
-100
VDS (volts)
tp (seconds)
7-253
VP1304/VP1306/VP1310
Typical Performance Curves
BVDSS Variation with Temperature
100 1.1 80
On-Resistance vs. Drain Current
VGS = -5V
BVDSS (normalized)
RDS(ON) (ohms)
60
VGS = -10V
1.0
40
20 0.9 0 -50 0 50 100 150 0 -0.2 -0.4 -0.6 -0.8 -1.0
Tj (°C) Transfer Characteristics
-1.0
ID (amperes) V(th) and RDS Variation with Temperature
2.0
VDS = -25V
-0.8
1.2
RDS(ON) @ -10V, -0.25A
1.6
TA = -55°C
VGS(th) (normalized)
ID (amperes)
25°C
-0.6
1.1 1.2 1.0 0.8 0.9 0.4 0.8
-0.4
125°C
-0.2
V(th) @ -1mA
0
0 0 -2 -4 -6 -8 -10 -50 0 50 100 150
VGS (volts) Capacitance vs. Drain-to-Source Voltage
40 -10
Tj (°C) Gate Drive Dynamic Characteristics
f = 1MHz
-8 30
VDS = -10V
C (picofarads)
VGS (volts)
-6
20
CISS
VDS = -40V
-4
40 pF
10
COSS
-2
CRSS
0 0 -10 -20 -30 -40 0 0
25 pF
0.2 0.3
0.1
0.4
0.5
VDS (volts)
QG (nanocoulombs)
7-254
RDS(ON) (normalized)
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