SPE0525

SPE0525 5-Line ESD Protection Array DESCRIPTION The SPE0525 are designed by TVS array that is to protect sensitive electronics from damage or latch-up due to ESD. They are designed for use in applications where board space is at a premium. SPE0525 is bidirectional devices that will protect up to five lines, and may be used on lines where the signal polarities swing above and below ground . SPE0525 offer desirable characteristics for board level protection including fast response time, low operating and clamping voltage, and no device degradation. SPE0525 may be used to meet the immunity requirements of IEC 61000-4-2, level 4. The small SOT-23-6L package makes them ideal for use in portable electronics such as cell phones, PDA’s, notebook computers, and digital cameras. APPLICATIONS Cellular Handsets and Accessories Cordless Phone PDA Notebooks and Handhelds Portable Instrumentation Digital Cameras MP3 Player FEATURES Transient protection for data lines to IEC 61000-4-2 (ESD) ±15kV (air), ±8kV (contact) IEC 61000-4-4 (EFT) 40A (5/50ns) Protects five bidirectional I/O lines Working voltage: 5V Low leakage current Low operating and clamping voltages PIN CONFIGURATION ( SOT-23-6L ) PART MARKING 2009/01/10 Ver.1 Page 1 SPE0525 5-Line ESD Protection Array ORDERING INFORMATION Part Number Package Part Marking 25YW SPE0525S26RGB SOT-23-6L ※ Week Code : A ~ Z( 1 ~ 26 ) ; a ~ z( 27 ~ 52 ) ※ SPE0525S26RGB : Tape Reel ; Pb – Free ; Halogen – Free ABSOULTE MAXIMUM RATINGS (TA=25℃ Unless otherwise noted) Parameter Peak Pulse Power ( tp = 8/20 μs ) Maximum Peak Pulse Current ( tp = 8/20 μs ) ESD per ICE 61000 – 4 – 2 (Air ) ESD per ICE 61000 – 4 – 2 (Contact ) Operating Junction Temperature Storage Temperature Range Lead Soldering Temperature Symbol Ppk Ipp Vpp Vpp TJ TSTG TL Typical 250 7 ±15 ±8 -55 ~ 150 -55 ~ 150 260 ( 10sec ) Unit W A KV KV ℃ ℃ ℃ ELECTRICAL CHARACTERISTICS (TA=25℃ Unless otherwise noted) Parameter Reverse Stand – Off Voltage Reverse Breakdown Voltage Reverse Leakage Current Reverse Leakage Current Clamping Voltage Clamping Voltage Junction Capacitance Symbol VRWM VBR IR IR VC VC Cj It = 1mA VRWM = 5V , T=25℃ VRWM = 3V , T=25℃ Ipp = 1A , tp = 8/20 μs Ipp = 7A , tp = 8/20 μs Between I/O Pin and GND VR = 0V , f = 1MHz 2 6 0.01 0.01 Conditions Min. Typ Max. 5 8.5 1 0.5 11.5 15 3 Unit V V μA μA V V pF 2009/01/10 Ver.1 Page 2 SPE0525 5-Line ESD Protection Array TYPICAL CHARACTERISTICS Clamping Voltage (Ipp = 1A , tp = 8/20 μs ) Clamping Voltage (Ipp = 7A , tp = 8/20 μs ) 2009/01/10 Ver.1 Page 3 SPE0525 5-Line ESD Protection Array TYPICAL CHARACTERISTICS Fig 1 : Junction Capacitance V.S Reverse Voltage Applied Fig 2 : Peak Plus Power V.S Exponential Plus Duration Fig 3 : Relative Variation of Peal Plus Power V.S Initial Junction Temperature Fig 4 : Forward Voltage Drop V.S Peak Forward Current 2009/01/10 Ver.1 Page 4 SPE0525 5-Line ESD Protection Array APPLICATION NOTE Device Connection for Protection of Five Data Lines SPE0525 is designed to protect up to five bidirectional data lines. The device is connected as follows: 1. Bidirectional protection of five I/O lines is achieved by connecting pins 1, 3, 4, 5, and 6 to the data lines. Pin 2 is connected to ground. The ground connection should be made directly to the ground plane for best results. The path length is kept as short as possible to reduce the effects of parasitic inductance in the board traces. Circuit Board Layout Recommendations for Suppression of ESD Good circuit board layout is critical for the suppression of ESD induced transients. The following guidelines are recommended: 1. Place the TVS near the input terminals or connectors to restrict transient coupling. 2. Minimize the path length between the TVS and the protected line. 3. Minimize all conductive loops including power and ground loops. 4. The ESD transient return path to ground should be kept as short as possible. 5. Never run critical signals near board edges. 6. Use ground planes whenever possible. 2009/01/10 Ver.1 Page 5 SPE0525 5-Line ESD Protection Array SOT-23-6L PACKAGE OUTLINE 2009/01/10 Ver.1 Page 6 SPE0525 5-Line ESD Protection Array Information provided is alleged to be exact and consistent. SYNC Power Corporation presumes no responsibility for the penalties of use of such information or for any violation of patents or other rights of third parties which may result from its use. No license is granted by allegation or otherwise under any patent or patent rights of SYNC Power Corporation. Conditions mentioned in this publication are subject to change without notice. This publication surpasses and replaces all information previously supplied. SYNC Power Corporation products are not authorized for use as critical components in life support devices or systems without express written approval of SYNC Power Corporation. ©The SYNC Power logo is a registered trademark of SYNC Power Corporation ©2004 SYNC Power Corporation – Printed in Taiwan – All Rights Reserved SYNC Power Corporation 7F-2, No.3-1, Park Street NanKang District (NKSP), Taipei, Taiwan, 115, R.O.C Phone: 886-2-2655-8178 Fax: 886-2-2655-8468 ©http://www.syncpower.com 2009/01/10 Ver.1 Page 7