IQ65033QMA10

Technical Specification IQ65033QMA10 36-75V @ 10 A Input/Output 3.3 V & 5.0 V MGMT Power Quarter-Brick ATCA Power Interface Module The IQ65033QMA10 iQor™ Power Interface Module integrates all features required by the AdvancedTCA Base Specification into a Quarter-Brick footprint. The iQor offers industry leading external hold-up capacitor volumetric density for a compact overall solution. At a 90V hold-up capacitor voltage (trimmable 50-95 V), only 564 µF is required to achieve 8.70ms hold-up time at 200Win. The -48 V output voltage is conditioned for smooth operation through severe input transient events. The iQor is designed thermally and electrically to drive high power wide-range-input DC/DC converters such as the 300 W SynQor PQ60120QEA25. RoHS Compliant see last page. Operational Features • Input ORing for A & B power feeds (MOSFET-based for low power dissipation) • Hot swap control with seamless ride-through of input voltage transient • EMI filter meets CISPR 22 Class B when used as directed (see applications section) • External hold-up capacitor trimmable from 50-95 V • Automatic discharge of external hold-up capacitor • Isolated management power of 3.3 V at 3.6 A and 5.0 V at 150 mA • Dual input side enable • I2C interface data reporting (optional) IQ65033QMA10 Module Protection Features • Management power over-voltage protection • Management power over-current protection • Main output over-current protection • Thermal shutdown protects the unit from abnormal environmental conditions • Input fuse/feed loss alarm Mechanical Features • Industry standard quarter-brick size: 1.45" x 2.3" (36.8x58.4 mm) • Overall height of 0.54" (13.7 mm), permits better airflow and smaller card pitch • Total weight: 1.2 oz (34 g) • Flanged pins designed to permit surface mount soldering (avoid wave solder) using FPiP technique • External hold-up capacitor footprint much smaller than other solutions currently available on the market Product # IQ65033QMA10 Phone 1-888-567-9596 Safety Features • 2250V, 30 MΩ VRTN_A/B to LOGIC_GND and SHELF_GND isolation • UL/cUL 60950-1 recognized (US & Canada), basic insulation rating • TUV certified to EN60950-1 • Meets 72/23/EEC and 93/68/EEC directives which facilitates CE Marking in user’s end product • Board and plastic components meet UL94V-0 flammability requirements Doc.# 005-IQ5033S Rev. G 05/04/09 Page 1 www.synqor.com Technical Specification MECHANICAL DIAGRAM Top View 0.950 (24.13) 2.30 (58.42) 0.150 0.150 0.150 (3.81) (3.81) (3.81) Input: Outputs: Current: Package: 36-75 V 5.0 V/ 3.3 V 10 A Quarter-brick 0.100 (2.54) 0.200 (5.08) 0.200 (5.08) 1.45 0.200 (36.83) (5.08) 0.200 (5.08) 0.200 (5.08) 0.225 (5.72) 1 2 3 4 5 6 7 18 17 16 15 14 13 12 11 10 9 8 0.150 (3.81) 0.150 (3.81) 2.00 (50.8) Bottom side Clearance 0.064 ±0.028 (1.63 ±0.71) Side View Overall Height 0.54 (13.7) See Note 2 1.45 (36.83) Load Board Flanged Pin See Note 8 Lowest Component NOTES 1) All Pins are 0.040" (1.02 mm) diameter with 0.080" (2.03 mm) diameter standoff shoulders. 2) Other pin extension lengths available. Recommended pin length is 0.03" (0.76 mm) greater than the PCB thickness. 3) All Pins: Material - Copper Alloy Finish - Matte Tin over Nickel plate 4) Undimensioned components are shown for visual reference only. 5) All dimensions in inches (mm) Tolerances: x.xx +0.02" (x.x +0.5 mm) x.xxx +0.010" (x.xx +0.25 mm) 6) Weight: 1.2 oz (34 g) typical 7) Workmanship: Meets or exceeds IPC-A-610C Class II 8) The flanged pins are designed to permit surface mount soldering (allowing to avoid the wave soldering process) through the use of the flanged pin-in-paste technique. PIN DESIGNATIONS Negative A Feed (Externally Fused) Negative B Feed (Externally Fused) Positive A Feed (Externally Fused) Positive B Feed (Externally Fused) Enable A Input (Externally Fused) (Short Pin Tied to VRTN_A on Backplane) Enable B Input (Externally Fused) (Short Pin Tied to VRTN_B on Backplane) Shelf Ground 5.0V (Relative to LOGIC_GND) 3.3V (Relative to LOGIC_GND) I2C Address Input * (Connect External Resistor to LOGIC_GND) ** I2C Data (Relative to LOGIC_GND) * I2C Clock (Relative to LOGIC_GND) * Logic Ground Isolated A/B Feed Loss or Open Fuse Alarm (Relative to LOGIC_GND) Negative Output to Payload Power Converter Hold-Up Voltage Trim (Connect External Resistor to -48V_OUT) Positive Output to Payload Power Converter Positive Connection to Hold-Up Capacitor (Negative Connection to -48V_OUT) 05/04/09 Page 2 Pin No. Name 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 -48V_A -48V_B VRTN_A VRTN_B ENABLE_A ENABLE_B SHELF_GND 5.0V 3.3V I2C_ADR I2C_DAT I2C_CLK LOGIC_GND ALARM -48V_OUT HU_TRIM VRTN_OUT HU_CAP Function * Pins 10, 11, and 12 are only available on the full feature version. See the ordering page for more information. ** Single resistor connected externally to LOGIC_GND selects the three least significant bits of I2C Address “0101xxx”. Product # IQ65033QMA10 Phone 1-888-567-9596 17 18 www.synqor.com Doc.# 005-IQ5033S Rev. G Technical Specification IQ65033QMA10 ELECTRICAL CHARACTERISTICS Parameter \ ABSOLUTE MAXIMUM RATINGS Input Voltage Continuous Transient Reverse Polarity Isolation Voltage (VRTN_A/B to LOGIC_GND) (VRTN_A/B to SHELF_GND) Operating Temperature Storage Temperature Hold-up Capacitor Voltage (Relative to -48V_OUT) -48V DUAL FEED INPUT CHARACTERISTICS Input Voltage Range Operating Current Disabled Input Current below Turn-Off Threshold Enabled No-Load Input Current Internal Input Filter Capacitance (Not Hot-Swapped) Recommended EARLY_A/B Resistors Recommended Input Fuses 3.3V ISOLATED MANAGEMENT POWER Startup Delay At 36Vin At 48Vin At 75Vin Turn-On Rise Time Input Under-Voltage Lockout Turn-On Voltage Threshold (ATCA) Turn-Off Voltage Threshold (ATCA) Turn-On Voltage Threshold (NEDS) Turn-Off Voltage Threshold (NEDS) Turn-On Voltage Threshold (ETSI) Turn-Off Voltage Threshold (ETSI) Total Output Voltage Range Output Voltage Ripple and Noise Peak-to-Peak RMS Operating Output Current Range Output DC Current-Limit Inception Current Limit Shutdown Voltage Hiccup Mode Restart Time Back-Drive Current Maximum Output Capacitance Switching Frequency Over-Voltage Protection Setpoint 5.0V POWER (Derived From 3.3V Converter) Total Output Voltage Range Operating Output Current Range Short Circuit Current Back-Drive Current Maximum Output Capacitance TEMPERATURE LIMITS FOR POWER DERATING CURVES Semiconductor Junction Temperature Board Temperature Transformer Temperature Input: Outputs: Current: Package: 36-75 V 5.0 V/ 3.3 V 10 A Quarter-brick Specifications subject to change without notice. Specifications in bold are guaranteed by design over the temperature range -40º to 125ºC. Min. Typ. Max. -75 -100 +75 2250 2250 100 125 100 Units V V V V V °C °C V V A mA mA µF W A Notes & Conditions Limited by internal TVS zener diode 1ms transient, square wave No damage, low current, output diode clamped -40 -55 Subject to thermal derating; see Figures 1 & 3 -34 -48 8 21 18 100 -75 10 10 30 22 15 Subject to the Threshold Protocol used 25ºC 950 LFM, Vin = -48V; see Figure 1 Vin = -48V Should be precharged by resistors to EARLY_A/B pins Surge rated 2010 case size (KOA SG73 series or equiv.) 0.15 1 -33.5 -32.0 -33.5 -32.0 -25.5 -24.0 3.170 0.43 0.31 0.20 5 -34.5 -34.0 -34.5 -34.0 -26.5 -26.0 3.350 40 16 0.50 Time from ENABLE_A/B to 3.3/5.0Vout s s s ms V V V V V V V mV mV A A V ms mA µF kHz V V mA mA mA µF °C °C °C 20 -36.0 -35.5 -36.0 -35.5 -28.0 -27.5 3.430 75 30 3.6 6.9 0% to 90%; see Figure 10 At Mangement Power Converter input; see Figure A “ “ “ “ ; overriden by enable “ ; overriden by enable Including line, load, sample, life, and temp See Figure 12 Full load, 10µF ceramic, 500MHz bandwidth “ Subject to thermal derating; see Figures 1 & 3 Initiates hiccup mode Vin = -48V Negative current drawn from output source Management power converter 0 3.9 5.4 1.5 130 200 4.10 4.80 0 1 220 4.33 5.00 400 10 1000 240 4.55 5.20 150 1 1000 125 125 125 Including line, load, sample, life, and temp Independent Thermal Protection Negative current drawn from output source Package rated to 150°C UL rated max operating temp 130°C See Figure 3 for derating curve Product # IQ65033QMA10 Phone 1-888-567-9596 www.synqor.com Doc.# 005-IQ5033S Rev. G 05/04/09 Page 3 Technical Specification Input: Outputs: Current: Package: 36-75 V 5.0 V/ 3.3 V 10 A Quarter-brick IQ65033QMA10 ELECTRICAL CHARACTERISTICS (Continued) Parameter \ DUAL ENABLE INPUT CHARACTERISTICS ENABLE_A/B Threshold ATCA 26.0 28.5 31.0 NEDS (ON\OFF) 40.0\36.0 42.5\39.0 45.0\42.0 ETSI 32.0 34.0 36.0 Current Drain per Enable Pin (Vin = -75V) 0.36 -48V OUTPUT Efficiency 300W Output Power 97.7 98.2 200W Output Power 98.0 98.5 Equivalent Resistance From Input Feed 120 200 Recommended External Output Filter Capacitance 80 100 270 Hot-Swap Startup Ramp dV/dt 150 200 250 Output Voltage Delay 250 650 Input Current Limit (Turns Off Hot-Swap Momentarily) 15 17.5 20 Input dV/dt Limit (Turns Off Hot-Swap Momentarily) 40 Short Circuit Duration to Initiate Hiccup Mode 2 Restart Time in Hiccup Mode 1.8 2.0 2.2 INPUT ORING ORing MOSFET Turn On Current 0.4 1.0 2.4 ORing MOSFET Turn Off Current 0.1 0.4 1.1 ORing MOSFET Current Hysteresis 0.3 0.6 1.3 Turn On Time 600 Turn Off Time 0.25 HOLD-UP CAPACITOR INTERFACE Hold-up Capacitor Trim Range 50 90 95 Hold-up Capacitor Charge Accuracy 87.2 90.0 92.8 External Hold-up Voltage Trim Resistor Power Dissipation 160 Hold-up Capacitor Charge Current 40 Switching Frequency 405 450 495 -48V_OUT Threshold To Arm Hold-up (ATCA/NEDS options) -36.9 -38.9 -40.9 To Initiate Hold-up (ATCA/NEDS) -36.4 -38.5 -40.4 To Arm Hold-up Connect (ETSI) -32.4 -34.5 -36.4 To Initiate Hold-up Connect (ETSI) -32.4 -34.5 -36.4 dV/dt on Hold-up Connect 80 Duration of Hold-up Connect 0.1 Delay Before Hold-up Connect is (Re)Armed 2 Hold-up Capacitor Discharge Resistance 1.55 1.65 1.75 Maximum Hold-up Capacitance 3300 ISOLATED ALARM OUTPUT (ALARM = HIZ)5 Input A/B Feed Voltage Alarm Threshold 36.4 38.4 40.4 Open Circuit Voltage 40 V On-State Voltage 0.2 0.4 On-State Transistor Collector Current 50 mA Off-State Transistor Collector Current 1 µA Specifications subject to change without notice. Specifications in bold are guaranteed by design over the temperature range -40º to 125ºC. Min. Typ. Max. Units V V V V mA Notes & Conditions At input feed voltage -48V_A/B; see Figure A “ “ No load on 3.3V/5.0V outputs, Vin = -48V mW µF V/s ms A V/ms ms s A A A µs µs V V µW mA KHz V V V V V/ms s s kΩ µF V V See Note 2 No load; depends on external cap.; see Figure 5 Hold-up still active “ Can be set either above or below input voltage 2.49kΩ external trim resistance, 1% 100ppm/ºC Hold-up power converter See Note 3 At VRTN_OUT w.r.t. -48V_OUT; see Figure A “ “ “ See Note 4 48V output still enabled Yields 55ms (200 W at 90 V cap charge) At input feed voltage -48V_A/B; see Figure A At 50mA Note Note Note Note Note 1: 2: 3: 4: 5: If the 5.0 V load current exceeds 100 mA, up to 200 mV of additional voltage drop is possible on the 5.0 V output. Maximum DC load at startup is 50 mA. Full load can be applied 700 ms after enable or 400 ms after the management power is up and running. Hold-up operation with Vin < 43 V not required by ATCA specification. 48 V output does not recover after hold-up event unless input is above Arm Hold-up threshold. Does not inhibit 48 V output and is non-latching. Product # IQ65033QMA10 Phone 1-888-567-9596 www.synqor.com Doc.# 005-IQ5033S Rev. G 05/04/09 Page 4 Technical Specification Input: Outputs: Current: Package: 36-75 V 5.0 V/ 3.3 V 10 A Quarter-brick IQ65033QMA10 ELECTRICAL CHARACTERISTICS (Continued) Parameter P I2C DATA REPORTING INTERFACE Maximum Clock Rate Measurement Error Feed Voltage A/B Holdup Voltage -48V_OUT Current Temperature OVER-TEMPERATURE PROTECTION Shutdown Point Restart Hysteresis RELIABILITY CHARACTERISTICS Calculated MTBF (Telcordia) Calculated MTBF (MIL-217) Field Demonstrated MTBF Specifications subject to change without notice. Specifications in bold are guaranteed by design over the temperature range -40º to 125ºC. Min. Typ. 100 Max. 400 +3 +3 +3 +3 Units kHz % % % °C °C °C Notes & Conditions Clock stretching happens at the maximum rate 135 10 3.6 3.27 Does not shut down Management Power Automatic restart 106 Hrs. TR-NWT-000332; 80% load,300LFM, 40oC Ta 106 Hrs. MIL-HDBK-217F; 80% load, 300LFM, 40oC Ta 106 Hrs. See website for details STANDARDS COMPLIANCE Parameter P Notes File # E194341, Basic insulation & pollution degree 2 Certified by TUV Test on entire assembly; board & plastic components UL94V-0 compliant ESD test, 8kV - NP, 15kV air - NP (Normal Performance) Section 7 - electrical safety, Section 9 - bonding/grounding STANDARDS COMPLIANCE UL/cUL 60950-1 EN60950-1 72/23/EEC 93/68/EEC Needle Flame Test (IEC 695-2-2) IEC 61000-4-2 GR-1089-CORE Telcordia (Bellcore) GR-513 • An external input fuse must always be used to meet these safety requirements. Contact SynQor for official safety certificates on new releases or download from the SynQor website. QUALIFICATION TESTING Parameter P # Units 32 5 5 10 5 5 5 15 pins Test Conditions 10-55Hz sweep, 0.060” total excursion,1 min./sweep, 120 sweeps for 3 axes QUALIFICATION TESTING Life Test Vibration Mechanical Shock Temperature Cycling Power/Thermal Cycling Design Marginality Humidity Solderability 95% rated Vin and load, units at derating point, 1000 hours 100g minimum, 2 drops in x and y axis, 1 drop in z axis -40°C to 100°C, unit temp. ramp 15°C/min., 500 cycles Toperating = min to max, Vin = min to max, full load, 100 cycles Tmin-10°C to Tmax+10°C, 5°C steps, Vin = min to max, 0-105% load 85°C, 85% RH, 1000 hours, 2 minutes on and 6 hours off MIL-STD-883, method 2003 • Extensive characterization testing of all SynQor products and manufacturing processes is performed to ensure that we supply robust, reliable product. Contact the factory for official product family qualification documents. Product # IQ65033QMA10 Phone 1-888-567-9596 www.synqor.com Doc.# 005-IQ5033S Rev. G 05/04/09 Page 5 Technical Specification 10 9 8 Input: Outputs: Current: Package: 36-75 V 5.0 V/ 3.3 V 10 A Quarter-brick Iout (A) 7 6 5 4 3 10 25 40 55 70 85 400 LFM (2.0 m/s) 300 LFM (1.5 m/s) 200 LFM (1.0 m/s) 100 LFM (0.5 m/s) Ambient Air Temperature (°C) Figure 1: -48V output (maximum power) derating curves vs. ambient air temperature for airflow rates of 100 LFM through 400 LFM with air flowing across the converter from pin 7 to pin 1 (48 Vin, 3.3V mgmt power output @ 1.5 A). 4.0 Figure 2: Thermal plot of converter at 6.2A load current from -48V output (298W) with 55°C air flowing at the rate of 200 LFM. Air is flowing across the converter from pin 7 to pin 1 (48 Vin, 3.3V output @ 1.5 A). 3.5 3.0 Iout (A) 2.5 2.0 400 LFM (2.0 m/s) 300 LFM (1.5 m/s) 1.5 200 LFM (1.0 m/s) 100 LFM (0.5 m/s) 1.0 10 25 40 55 70 85 Ambient Air Temperature (°C) Figure 3: 3.3V output (maximum power) derating curves vs. ambient air temperature for airflow rates of 100 LFM through 400 LFM with air flowing across the converter from pin 7 to pin 1 (48 Vin, main output power output @ 4 A). Figure 4: Thermal plot of converter at 2.9A load current from 3.3V output (9.6W) with 55°C air flowing at the rate of 200 LFM. Air is flowing across the converter from pin 7 to pin 1 (48 Vin, -48V output @ 4 A). Figure 5: 48V hot-swap turn-on transient (100uF electrolytic filter capacitor CF). Top trace: VRTN_OUT w.r.t. -48V_OUT (20V/div), Bottom trace: Input Feed Current (2A/div). Product # IQ65033QMA10 Phone 1-888-567-9596 Figure 6: 8.70ms zero volt transient (564uF electrolytic hold-up capacitor CH, 100uF electrolytic filter capacitor CF). Ch 1: Input Feed A/B Voltage (20V/div). Ch 2: VRTN_OUT w.r.t. -48V_OUT (20V/div). Ch 3: HU_CAP w.r.t. -48V_OUT (20V/div). Ch 4: 3.3V_OUT (200mV/div). Doc.# 005-IQ5033S Rev. G 05/04/09 Page 6 www.synqor.com Technical Specification Input: Outputs: Current: Package: 36-75 V 5.0 V/ 3.3 V 10 A Quarter-brick Figure 7: Instantaneous input transient from 48V Feed A to 60V Feed B. Ch 1: Input Feed A Voltage (20V/div). Ch 2: Input Feed B Voltage (20V/ div). Ch 3: VRTN_OUT w.r.t. -48V_OUT (20V/div). Ch 4: 3.3V_OUT (200mV/div). 8 7 Figure 8: Inductive Switching event on Feed A from 48V to 0V to TVS Zener clamping voltage. No load on -48V output. Ch1: Input Feed A Voltage (20V/div). Ch3: VRTN_OUT w.r.t. -48V_OUT (20V/div). Ch 4: 3.3V_OUT (50mV/div). Power Dissipation (W) 6 5 4 3 2 1 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 36 Vin 48 Vin 75 Vin Load Current (A) Figure 9: Power dissipation vs. 3.3V load current with hot-swap switch enabled. Figure 10: Management Power turn on transient at 50% load (4ms/div). Load capacitance: 10uF ceramic capacitor. Ch 2: 3.3Vout (1V/div). Ch 3: 5.0Vout (1V/div). Figure 11: 3.3Vout response to a step-change in load current (50%75%-50% of Iout(max): dI/dt = 1A/us). Load capacitance: 10uF ceramic capacitor. Top trace: 3.3Vout (500mV/div). Bottom trace: Iout (1A/ div). Product # IQ65033QMA10 Phone 1-888-567-9596 Figure 12: 3.3Vout ripple at nominal input voltage at rated load current (20mV/div). Load capacitance: 10uF ceramic capacitor. Bandwidth: 500MHz. Doc.# 005-IQ5033S Rev. G 05/04/09 Page 7 www.synqor.com Technical Specification 5 6 ENABLE_A ENABLE_B Input: Outputs: Current: Package: 36-75 V 5.0 V/ 3.3 V 10 A Quarter-brick HU_CAP 18 VRTN_A 3 Enable Logic Temp sense FET control VRTN_B Hold-up connect control circuits E A F dV/dt sense VRTN_OUT 17 4 FET control -48_A 1 E B F EMI Filter Hot Swap Control Logic Currentcontrolled holdup charging converter HU_TRIM 16 C FET control -48_B 2 -48V_OUT 15 D FET control A B Management Power converter LOGIC_GND I2C Clock Discharge Isolation barrier 3.3V 8 9 5.0 V E F I2C Add. I2C Data 10 11 12 14 ALARM 13 7 SHELF_GND C D Monitoring circuits Figure A: Internal Block Diagram FEATURE DESCRIPTIONS Input ORing MOSFETs: ORing of dual -48V feeds is provided by four MOSFETs, which are individually controlled so as to operate as an ideal diode (see Figure A). If there is an input feed short of any kind, a control circuit will detect reverse current and turn off the MOSFET in 250ns (typ.), to avoid disturbing the other feed voltage. At zero current, the MOSFET is guaranteed to be off. In the case of a fuse failure, this triggers the ALARM output, due to an apparent input feed loss. Current hysteresis prevents limit cycling around the transition point between body diode and MOSFET conduction. ALARM Output: The ALARM pin gives an external indication of a fault condition. It is an isolated and buffered open-collector output, which is normally pulled low. In the presence of an input feed loss (which can be caused by a fuse failure), the ALARM output will be tri-stated. Product # IQ65033QMA10 Phone 1-888-567-9596 External Input Fuse Failure Detection: At zero current, the input ORing MOSFETs are guaranteed to be off. In the case of a fuse failure, an on-board bleed resistor pulls the input feed voltage down. This triggers the ALARM output due to an apparent input feed loss. There are two main down-sides to this approach. First, there is no way to distinguish between a feed loss and a fuse failure. Second, an enable fuse loss is not detected, since the enables are diode OR’d. The full featured version of the iQor offers additional data reporting that makes full fuse detection possible. Among other data, each feed voltage and each enable voltage is reported through the I2C port. These voltages can be compared with the voltages reported by the shelf manager to determine whether any board fuse is blown. www.synqor.com Doc.# 005-IQ5033S Rev. G 05/04/09 Page 8 Technical Specification Input Enable: The ENABLE_A/B signals connect to VRTN_A/B on the backplane via the shortest pins in the zone 1 connector. They are the last pins to mate during board insertion, and the first to disconnect during board extraction. The ENABLE_A and ENABLE_B signals are diode-ORed together which lets either signal enable the module. Whenever both ENABLE pins are open, the hot-swap switch is opened. This prevents -48V output power from being drawn though the EARLY pre-charge resistors. The ENABLE signals also control the management power. On board insertion, the management power remains off until at least one of ENABLE_A/B is connected. On board extraction, the management power is disabled at the end of the 100ms hold-up period, and remains off until ENABLE_A/B is reconnected. This prevents the IPMI controller from reading an invalid hardware address when a board is partially inserted. Management power flows through the EARLY pre-charge resistors for a maximum of 100ms, which provides a margin similar to the pre-charge event in terms of resistor safe-operating-area. EARLY Precharge Resistors: The EARLY_A/B signals connect to the longest pins in the zone 1 power connector, and therefore first to mate during board insertion. External resistors connected between these signals and VRTN_A/B allow the relatively small EMI filter capacitance to be pre-charged before the main power pins make contact. A 100W surge rated 2010 case size resistor is recommended (KOA SG73 series or equivalent). Hot Swap - Thermal Shutdown: To protect the unit from damage in an abnormal thermal environment, the hot-swap switch will be disabled when the thermal sensor temperature rises above the turn-off threshold. The switch will be automatically enabled again when the temperature goes below the turn-on threshold. The management power remains on during an over-temperature condition. The full featured version of the iQor reports the actual temperature through the I2C port. Hot Swap - Over-Current Protection: If the -48V output current rises above the current limit threshold, the hot-swap switch will be disabled, and will immediately enter another soft-start sequence. If an output short is detected, the hot-swap switch will be disabled and will enter a hiccup mode of operation with automatic restart. The full featured version of the iQor reports actual output current through the I2C port. Hot Swap - Transient Suppression: Input transient events can occur if there is a short on an adjacent board or backplane. The short builds up a large current in the wiring inductance, and when a fuse blows, the voltage behind the fuse spikes very quickly. This can cause a loss of redundancy since many other boards could be exposed to this spike. Input: Outputs: Current: Package: 36-75 V 5.0 V/ 3.3 V 10 A Quarter-brick The iQor unit conditions the -48V output, providing for seamless ride-through of input voltage transients. If the positive dV/ dt of the input voltage is too high, the hot-swap switch will be disabled and will immediately enter another soft-start sequence. This limits the dV/dt seen on the -48V output, which prevents the 12V payload power converter from having such a large glitch on its output that it shuts down. The -48V output hold-up function remains active throughout, in case the hot-swap switch is forced off for too long. Passive Transient Suppression: Each input feed has a dedicated internal bidirectional TVS zener diode, rated for a minimum clamp voltage of 77.8V at 1mA. A TVS diode short due to electrical overstress will not disable the iQor module: a fuse will open, and the module can continue to run from the other feed. External Hold-up Capacitor Charge: A current controlled DC-DC converter charges the external hold-up capacitor to a voltage of 50V-95V, set by an external resistor. The charge voltage can range either above or below the input feed voltage. Constant current charging takes place whenever the hot-swap switch is enabled. Hold-up Capacitor Connect: When the hot-swap switch is enabled, 2 seconds are allocated to charge the hold-up capacitor. After this time, a comparator is armed, which connects the hold-up capacitor to the -48V output should the output ever drop below the given connect threshold. A current limit circuit protects against damage during a short circuit condition. A dV/dt limit circuit regulates the hold-up connect switch turn-on speed. When the comparator is tripped, the hold-up connect switch remains closed for 100ms, is off for 2 seconds to allow the hold-up capacitor to recharge, and then is automatically rearmed (if the output voltage is above the given arm threshold). Hold-up Capacitor Discharge: Whenever the hot-swap switch is disabled, an internal resistor bank is connected across the hold-up capacitor. This is intended to reduce the voltage on the hold-up capacitor below 60V within 1 second. Management Power: An isolated management power converter delivers both 3.3V and a low power 5.0V relative to LOGIC_GND. Over-current protection operates in constant current with a hiccup mode if the output voltage drops too far. Output over-voltage circuitry is included with a redundant reference and optocoupler. Product # IQ65033QMA10 Phone 1-888-567-9596 www.synqor.com Doc.# 005-IQ5033S Rev. G 05/04/09 Page 9 Technical Specification Hot Swap – Shutdown Timing: In the event of a sudden loss of input voltage (see Figure B), a hold-up event will be triggered. When the output voltage (plus a diode drop for the hot-swap body diode) decays to the management power under-voltage turn-off threshold, the main -48V output and the 3.3V/5.0V outputs will shut down simultaneously. Input: Outputs: Current: Package: 36-75 V 5.0 V/ 3.3 V 10 A Quarter-brick In the event of a gradual loss of input voltage (see Figure C), the main -48V output will shut down 100ms after the beginning of the hold-up event. The -48V output will enter a hiccup mode of operation for input voltages below the Hold-up Arm Threshold. Management power will continue to run until the input voltage (plus 0V to 1.2V for the ORing MOSFETs) decays to the management power under-voltage turn-off threshold. 48V Input voltage 0 Holdup time, tH Holdup event 48V Payload output 48V 0 39 V typ. (Depends on version) 34.6 V typ. 3.3V Management power 0 Alarm 0 (Pull-up voltage lost) Figure B: Sudden Loss of Input Power 48V 38.4 V typ. Higher of A/B input feed voltages VRTN A/B - (-48V_A/B) 0 Holdup event 48V 38.9 V typ. 34.0 (Depends on version) -48V output voltage VRTNOUT - (-48V_OUT) 0 38.5 V typical (Depends on version) 100ms Output is off after delay if input voltage doesn’t recover above 38.9V typ. 3.3V 0 Management power output (3.3V) - LOGIC_GND Management power turned off at higher of ENABLE threshold or MP UVLO . Alarm - (LOGIC_GND) (Pullup voltage lost) Figure C: Gradual Loss of Input Power Product # IQ65033QMA10 Phone 1-888-567-9596 www.synqor.com Doc.# 005-IQ5033S Rev. G 05/04/09 Page 10 Technical Specification EXTERNAL HOLD-UP CAPACITOR SELECTION CH is the hold-up capacitance (electrolytic capacitors typically have a ±20% tolerance): 2t P CH = H H V²H – V²U Equation A 100 90 80 70 60 50 40 30 20 10 0 0 1 2 3 41.0V Input: Outputs: Current: Package: 36-75 V 5.0 V/ 3.3 V 10 A Quarter-brick Input Feed Voltage (V) Typically a strong function of VH (see Figure D). The ATCA specification requirement is 8.70ms (see Figure E). Where: VH = hold-up capacitor charge voltage. VU = minimum operating voltage on the 48V output; the greater of the under-voltage lockout threshold of the payload power converter, and the under-voltage lockout threshold of the management power converter. tH = time from when the highest input feed voltage drops below VF, to the time when the highest input feed voltage rises above VU. VF = voltage at which the hold-up capacitor is engaged. PH = power drawn from the hold-up capacitor, the sum of the input power of the payload power converter, and the input power of the 3.3V mgmt power converter (see Figure 9): P Equation B PH = OUT 12V + PIN 3.3V 43.0V 36.0V 4 5 8.70ms 6 7 8 9 10 Time (ms) η12V Figure E: The PICMG 3.0 R2.0 AdvancedTCA Base Specification requires continuous operation through a zero-volt transient, lasting 5ms (Section 4.1.2.2). However, this is not a square wave: the voltage starts at a minimum amplitude of -43V, falls at 50V/ms, remains at 0V for 5ms, and then rises at 12.5V/ms. At the worst case values of the hold-up connect threshold and the management power under-voltage lockout threshold, the required hold-up time is 8.70ms. POUT12V = output power delivered by the payload converter. η12V = efficiency of the 12V payload converter. PIN.3.3V = 3.3V input management converter power. 20 PH=200W CF=100µF VI=- 43V EXTERNAL HOLD-UP CAPACITOR VOLTAGE RATING Operating electrolytic capacitors near their voltage rating does not significantly affect their reliability, as it does with tantalum or ceramic type capacitors. The operating life of electrolytic capacitors is primarily determined by the capacitor internal temperature. The capacitor lifetime roughly doubles for every 10ºC reduction in internal temperature. SynQor recommends running 100V rated electrolytic capacitors at 90V, which dramatically increases hold-up time for a given capacitor volume (see Figure D). A built-in circuit automatically discharges the hold-up capacitor when the input voltage is removed. Hold-up Time (ms) 15 10 5 90V 80V 70V 0 300 400 500 600 700 800 900 1000 Hold-up Capacitance (µF) Figure D: Hold-up Time (ms) vs. Hold-up Capacitance (µF) at Hold-up Charge Voltages of 70V, 80V, and 90V (see Equation A). The AdvancedTCA hold-up time requirement is at most 8.70ms (solid horizontal line). The capacitor tolerance is not factored into this result. Error bars indicate the worst case range of hold-up time for a given hold-up capacitance. Product # IQ65033QMA10 Phone 1-888-567-9596 www.synqor.com Doc.# 005-IQ5033S Rev. G 05/04/09 Page 11 Technical Specification EXTERNAL HOLD-UP TRIM RESISTOR SELECTION Rtrim is the external hold-up trim resistance for a given desired nominal hold-up capacitor charge voltage (VHU) (see Figure F): Rtrim = 100000 Input: Outputs: Current: Package: 36-75 V 5.0 V/ 3.3 V 10 A Quarter-brick ( 500,000 – 10,000 VHU – 50.0 ) Ω Equation C External Hold-up Trim Resistance ( Ω ) 10000 1000 50 60 70 80 90 100 Hold-up Charge Voltage (V) Figure F: Plot of Equation C, used to choose the external trim resistor value based on the desired Hold-up Capacitor charge voltage. Error bars indicate the worst case range of charge voltage for a given external trim resistor value (assumes 1%, 100ppm for external trim resistor tolerance). Worst case calculation over temp range -40ºC to 125ºC. * Shield plane should extend under payload power converter Holdup capacitor 10Ohms Shield Plane* 10nF CH 100µF 100V -48V A Early A -48V B Early B RTN 48V A RTN 48V B Enable A Enable B Shelf Gnd 100Ohms -48V_A -48V_B R trim (from IPM) PQ60120QEA25 HU_CAP VRTN_OUT HU_TRIM -48V_OUT 10nF Payload Power Converter 12V ALARM LOGIC_GND Alarm 100Ohms VRTN_A VRTN_B ENABLE_A ENABLE_B SHELF_GND I2C interface on fullfeatured version only SynQor iQor ATCA Power Input Module I2C CLOCK I2C DATA I2C ADDRESS 3.3kOhms 3.3 V 5.0V 3.3V to IPM Blue LED bias Figure G: Application Diagram Product # IQ65033QMA10 Phone 1-888-567-9596 www.synqor.com Doc.# 005-IQ5033S Rev. G 05/04/09 Page 12 Technical Specification FULL FEATURE APPLICATION NOTES I2C Data Reporting Interface: Available on the full feature version of the module, the iQor I2C Serial Interface monitors 5 analog parameters and 6 status bits. The actual analog parameter values are calculated by multiplying by the specified scaling factors (see Table 1). The status bits are interpreted in Table 2. The initial value of all registers is zero. Data in the registers begins updating 300 ms after management power startup, and continues updating at approximately 100 ms intervals during steady-state operation. All registers are updated simulatneously. Input: Outputs: Current: Package: 36-75 V 5.0 V/ 3.3 V 10 A Quarter-brick I2C Protocol: Reading from any internal register of the iQor monitor requires that an internal (pseudo) register, Data_Pointer, be initialized prior to reading (see Figure H). Data_Pointer is write-only. It is written from the second byte of any I2C WRITE message (the first byte is the 7 bit I2C Address and the R√W bit). Subsequent data bytes in a WRITE message (3rd Byte and beyond) only increment Data_Pointer. Any READ message will return the value of the internal register referenced by Data_Pointer and increments Data_Pointer by one. For instance, if the master acknowledges (AK), the next internal register referenced by Data_Pointer will be returned and Data_Pointer will be incremented by one. This process is repeated until the master does not acknowledge (NACK) and issues a STOP bit. Data_Pointer is an 8bit value. It is initialized to 00h at reset, and after reaching FFh, it will not overflow. Writing to registers not defined in Table 1 has no effect. Reading from these undefined registers will return 00h. In both cases Data_Pointer is incremented. Data_Pointer Parameter Value 1Eh 1Fh 21h 22h 23h 28h Status Bits HU_CAP -48V_Current -48V_A -48V_B Temperature Description Digital Signals (see Table 2) Voltage between HU_ CAP and -48V_OUT -48V Output Current Voltage between VRTN_A and -48V_A Voltage between VRTN_B and -48V_B Average Unit Temperature Scaling Factor N/A 0.398 V/bit 0.094 A/bit 0.325 V/bit 0.325 V/bit (1.961 ºC/bit) – 50 ºC Table 1: Internal register memory map. Bit 0 1 2 3 4 Name ENABLE_A ENABLE_B ALARM N/A HOLDUP Description Enable A Signal State Enable B Signal State Alarm Signal State Reserved Holdup Switch State Hotswap Switch State -48V Output Under-Voltage Alarm Reserved Value 0 1 0 1 0 1 0 1 0 1 0 1 Translation EN_A is Disabled EN_A is Enabled EN_B is Disabled EN_B is Enabled Primary side Alarm is not SET Primary side Alarm is SET Holdup Cap is not connected to -48V Out Holdup Cap is connected to -48V Out Hotswap switch is OFF Hotswap switch is ON Output voltage is below threshold Output voltage is above threshold Figure H: Typical I2C read transmission. Note: S = START, W = WRITE, R = READ, AK = acknowledged, NACK = NOT acknowledged, P = STOP. Clear boxes originate in the I2C Master and shaded boxes originate in the I2C Slave. Example from the point of view of the I2C Master: 1) START transmission. 2) Send 56h (addresses unit for writing, given address 56h was selected as shown in Table 4). 3) Send 22h (loads 22h into Data_Pointer). 4) STOP transmission. 5) START next transmission. 6) Send 57h (addresses unit for reading). 7) Unit will respond with the value of -48V_A (register 22h as shown in Table 1). 8) ACK (Data_Pointer is automatically incremented to 23h). 9) Unit will respond with the value of -48V_B (register 23h). 10) NACK. 11) Stop Transmission. 5 HOTSWAP VOUT_ LOW N/A 6 7 Table 2: The status byte represents 6 different digital signals and their digital state. Note: 1) Bit0 ⇒ LSb, Bit7 ⇒ MSb. Product # IQ65033QMA10 Phone 1-888-567-9596 www.synqor.com Doc.# 005-IQ5033S Rev. G 05/04/09 Page 13 Technical Specification I2C Address structure: 7 bit I2C Address + R√W bit Four bits are fixed (0101), three bits (xyz) are variable, and the least-significant bit is the read/write bit. 8 bit I C Address 2 Input: Outputs: Current: Package: 36-75 V 5.0 V/ 3.3 V 10 A Quarter-brick I2C Address selection: The three bits (xyz) of the I2C Address are set with a single external resistor from the I2C_ADR (pin 10) to LOGIC_GND (pin 13). The 8 possible addresses are shown in Table 4 with the respective resistance values. External programming resistances for I2C address selection I2C address for write (R√W = 0) 5Eh 5Ch 5Ah 58h 56h 54h 52h 50h xyz from Table 3 111 110 101 100 011 010 001 000 R (W) Open 100000 40200 20000 10000 4020 2000 Short 0101 xyz* R√W Table 3: I2C address structure. Table 4: I2C address selection. Product # IQ65033QMA10 Phone 1-888-567-9596 www.synqor.com Doc.# 005-IQ5033S Rev. G 05/04/09 Page 14 Technical Specification PART NUMBERING SYSTEM The part numbering system for SynQor’s dc-dc converters follows the format shown in the example below. IQ 65 033 Q M A 10 SNS -G 6/6 RoHS Options Output Current Thermal Design Performance Level Package Size Output Voltage Input Voltage Product Family Model Number IQ65033QMA10xyz-G (see Ordering Information) Input: Outputs: Current: Package: ORDERING INFORMATION 36-75 V 5.0 V/ 3.3 V 10 A Quarter-brick The tables below show the valid model numbers and ordering options for converters in this product family. When ordering SynQor converters, please ensure that you use the complete 15 character part number consisting of the 12 character base part number and the additional 3 characters for options. Add “-G” to the model number for 6/6 RoHS compliance. Input Voltage 36 - 75 V MGMT Power 5.0 V & 3.3 V 36-75V Input/ Output Current 10 A The first 12 characters comprise the base part number and the last 3 characters indicate available options. The “-G” suffix indicates 6/6 RoHS compliance. The following options must be included in place of the x y z spaces in the model numbers listed above. Options Description: x y z Threshold Protocols S - Standard (ATCA) N - NEDS E - ETSI Pin Style K - 0.110" N - 0.145" R - 0.180" Y - 0.250" Feature Set S - Standard F - Full Feature Application Notes A variety of application notes and technical white papers can be downloaded in pdf format from our website. RoHS Compliance: The EU led RoHS (Restriction of Hazardous Substances) Directive bans the use of Lead, Cadmium, Hexavalent Chromium, Mercury, Polybrominated Biphenyls (PBB), and Polybrominated Diphenyl Ether (PBDE) in Electrical and Electronic Equipment. This SynQor product is 6/6 RoHS compliant. For more information please refer to SynQor’s RoHS addendum available at our RoHS Compliance / Lead Free Initiative web page or e-mail us at rohs@synqor.com. Not all combinations make valid part numbers, please contact SynQor for availability. See the Product Summary web page for more options. PATENTS SynQor holds the following patents, one or more of which might apply to this product: 5,999,417 6,594,159 6,927,987 7,119,524 6,222,742 6,731,520 7,050,309 7,269,034 6,545,890 6,894,468 7,072,190 7,272,021 6,577,109 6,896,526 7,085,146 7,272,023 Contact SynQor for further information: Phone: Toll Free: Fax: E-mail: Web: Address: 978-849-0600 888-567-9596 978-849-0602 power@synqor.com www.synqor.com 155 Swanson Road Boxborough, MA 01719 USA Phone 1-888-567-9596 Warranty SynQor offers a three (3) year limited warranty. Complete warranty information is listed on our website or is available upon request from SynQor. Information furnished by SynQor is believed to be accurate and reliable. However, no responsibility is assumed by SynQor for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of SynQor. Product # IQ65033QMA10 www.synqor.com Doc.# 005-IQ5033S Rev. G 05/04/09 Page 15