STM1E-SFPxx 155Mbps Copper Transceiver Final Datasheet
Features
• • • • • • • • • • • • • Compatible with the Multi-Source Agreement (MSA) for SFP transceivers 75Ω media interface compliant with ITU-T G.703 and Telcordia GR-253 for CMI coded 155Mbps electrical interfaces ITU-T G.783 compatible loss of signal detect Transmit power down and tri-state control Handles over 12.7dB of cable loss Extended Temperature operation: -20 C to 85 C 75Ω DIN 1.0/2.3 female coaxial media interface supports Type A and Type D coupling Low power dissipation (0.6 W typical) Compliant with RoHS 6/6 (lead-free) Compatible with existing OC3/STM1o line cards using the pluggable SFP form factor Provides end user flexibility on a per port basis Reduces cost to system developers for offering STM-1 electrical interfaces Eliminates risk of laser wear out for central office interconnects
Benefits
Description
The STM1E-SFPxx is a Small Form-factor Pluggable (SFP) module compatible with the Multi Source Agreement (MSA) for SFP transceivers. The module utilizes the latest generation of Line Interface Units (LIUs) for 155 Mbit/s electrical interfaces (STM-1e, ES1) from Teridian Semiconductor Corporation (TSC). It also includes all the necessary components for interfacing to 75Ω telecommunications coaxial cable. The Teridian 78P2351R physical layer IC includes Clock & Data Recovery in both directions and a CMI encoder/decoder for transparent NRZ to CMI line code conversion. It provides Receive Loss of Signal (LOS) detection for electrical CMI interfaces and the option to disable (and tri-state) the transmit driver. A serial interface provides access to an on board EEPROM for identification information.
Tx Disable Tx Data Rx Data Rx LOS TERIDIAN 78P2351R STM1e Line Interface Unit
STM1e (electrical) output signal Magnetics & Protection 1.0/2.3 Mini-coax STM1e (electrical) input signal
MOD_DEF[2:0]
EEPROM
XO
Figure 1: Transceiver Functional Diagram
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Data and Control Interface
The STM1E-SFPxx data I/Os accept and provide differential signals at 155.52Mbit/s. AC-coupling for both transmit and receive traces is handled internally and is thus not required on the host board. The receive data outputs (RD+/-) provide the recovered STM1/STS3 data to the host in NRZ coding. During Rx LOS of signal conditions, the receive outputs are squelched. The RD+/- traces on the host card should be of equal length and differentially terminated with 100Ω at the user SerDes. The transmit data inputs (TD+/-) accept STM1/STS3 NRZ data at CML or LVPECL levels. The transmit timing is recovered inside the 78P2351R LIU and used for the CMI line encoding and transmit pulse driver. The TD+/- traces on the host card should be of equal length. The physical layer IC used in the STM1E-SFPxx does not require reset or software configuration. Only an optional Transmit Disable control pin is available for enabling or powering down the transmit driver. For status monitoring, a Receive Loss of Signal indicator is provided. Loss of Signal detection for STM-1e (electrical) interfaces is inherently different from optical LOS detection. Reference Receiver Loss of Signal Condition section for more info on LOS detection criteria for STM-1e (ES1) interfaces.
3.3V VccT 78P2351R LIU
VccR
4.7K
Tx_Disable
3.3V 82 82 to circuit to circuit 130 130
VCC
TD+ TD-
0.1uF 0.1uF
Protocol IC & SerDes RD+
100 0.1uF 0.1uF 170 170 20 20
Magnetics & Coax I/F
from circuit
75 ohm coax pair
VCC
RD-
from circuit
Rx_LOS
PLD / PAL
4.7K 4.7K 4.7K 4.7K
MOD_DEF2 MOD_DEF1 MOD_DEF0 3.3V
EEPROM
STM1E-SFPxx
Figure 2: Typical Application Configuration
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Serial ID Interface
The STM1E-SFPxx supports the 2-wire serial EEPROM protocol for the ATMEL AT24C01 as defined by the MSA. The serial interface provides access to identification information. The memory is organized as byte wide data words that can be addresses individually or sequentially at device address 1010000X (A0h).
Special Design Considerations for Using STM1E-SFPxx Transceivers
Host enclosures that use SFP devices should provide appropriate clearances between the SFP transceivers to allow room for the larger width of the 1.0/2.3 mini-coax front end. For most systems a nominal centerline-tocenterline spacing of 16.25mm (0.640”) is sufficient, but preferred coax cable types and routing clearances may require additional spacing. NOTE: To accommodate the preferred Type D coax coupling and cable types, the width of the nosepiece or front end was designed to exceed the MSA requirements of 13.7mm (+/- 0.1). o o Reference INF-8074 [Appendix A, Table 1, Designator A] for MSA recommendations Reference Mechanical Drawings section for STM1E-SFPxx transceiver dimensions.
The SFP transceiver insertion slot should be clear of nearby moldings and covers that might block convenient access to the unique latching mechanism used in the STM1E-SFPxx. A bail-style de-latch was not feasible with a coaxial network interface so a simple push button actuator was employed. Detaching the coax cable from the STM1E-SFPxx is not required for de-latching the transceiver from the host card. NOTES: 1. In order to secure the larger push button de-latch mechanism, the length of the bottom of the transceiver exceeds the maximum MSA requirements of 2.0mm. o o Reference INF-8074 [Appendix A, Table 1, Designator Y] for MSA recommendations Reference Mechanical Drawings section for STM1E-SFPxx transceiver dimensions.
2. Note: Double-sided board mounting is generally not recommended due to the limited clearance for de-latching the STM1E-SFPxx transceiver.
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Mating the STM1E-SFPxx PCB to Host Connector
The SFP utilizes a printed circuit board (PCB) to mate with a host card equipped an SFP electrical connector. The pads are designed for sequenced mating as follows: 1. Ground contacts first 2. Power contacts second 3. Data & Control contacts third The design of the mating portion of the transceiver printed circuit board is illustrated below. Reference INF-8074 for generic SFP guidelines for the host board.
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Host Interface Pinout
Pin 1 2 3 4 5 6 7 8 Name VeeT Tx Fault Tx Disable MOD-DEF2 MOD-DEF1 MOD-DEF0 Rate Select RLOS Description Transmitter ground. Not supported in STM1E-SFPxx. Grounded internally. Transmit Disable. When pin is high or open, the transmitter is powered down and tri-stated. Module Definition 2. Bi-directional data pin of two wire serial ID interface. This pin is open-drain and may be wired-ORed with other open-drain or open-collector devices. Module Definition 1. Clock pin of two wire serial ID interface. Data is clocked into EEPROM device on the positive edge and clocked out on the negative edge. Module Definition 0. Grounded internally. Used to notify host system that an SFP is present. Not supported in STM1E-SFPxx. Floating internally. Receive Loss of Signal. Asserted when the received signal is less than approximately 19dB below nominal for 110 UI. The RLOS condition is cleared when the received signal is greater than approximately 18dB below nominal for 110 UI. Receiver ground. Receiver ground. Receiver ground. Recovered receive NRZ data output (inverted). Recovered receive NRZ data output. Receiver ground. Receiver power supply (+3.3V). Transmitter power supply (+3.3V). Transmitter ground. Transmit NRZ data input. Transmit NRZ data input (inverted). Transmitter ground. Notes Note 1
Note 2
9 VeeR Note 1 10 VeeR Note 1 11 VeeR Note 1 12 RD13 RD+ 14 VeeR Note 1 15 VccR Note 3 16 VccT Note 3 17 VeeT Note 1 18 TD+ 19 TD20 VeeT Note 1 Notes: 1. Transmit and Receive grounds are connected directly together internally. For STM1E-SFP08 version, circuit grounds are also connected to frame/chassis ground. 2. During Rx LOS conditions, the receive data outputs RD+/- are squelched. See Receiver Loss of Signal Condition section for more information on LOS detection for STM-1e interfaces. 3. Transmit and Receive power supplies are connected together internally.
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ABSOLUTE MAXIMUM RATINGS Operation beyond these limits may permanently damage the device. PARAMETER Supply Voltage (VccT, VccR) Storage Temperature RATING -0.5 to 3.6 VDC -65 to 150 °C
RECOMMENDED OPERATING CONDITIONS Unless otherwise noted all specifications are valid over these temperatures and supply voltage ranges. PARAMETER DC Voltage Supply (VccT, VccR) Ambient Operating Temperature DC CHARACTERISTICS: PARAMETER Supply Current Receive-only Supply Current DIGITAL I/O CHARACTERISTICS: Tx Disable input: PARAMETER Input Voltage Low Input Voltage High TD+/- data inputs: PARAMETER Single-ended Signal Swing RD+/- data outputs: PARAMETER Single-ended Signal Swing Rise & Fall Time RxLOS output: PARAMETER Output Voltage Low Pull-up Resistor SYMBOL Vol Rpu CONDITIONS Iol = 8mA MIN NOM 4.7 MAX 0.4 UNIT V kΩ SYMBOL Vpk Tf CONDITIONS Differentially terminated with100Ω 10-90% MIN 0.5 NOM 0.7 0.8 MAX 1.0 1.2 UNIT V ns SYMBOL Vpki CONDITIONS MIN 0.3 NOM MAX 1.2 UNIT V SYMBOL Vil Vih 2.0 CONDITIONS MIN NOM MAX 0.8 UNIT V V SYMBOL Idd Iddr CONDITIONS Max cable length Transmitter disabled MIN NOM 170 100 MAX 190 UNIT mA mA RATING 3.15 to 3.45 VDC -20 to 85°C
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TRANSMITTER SPECIFICATIONS FOR CMI (COAX) INTERFACE Bit Rate: 155.52Mbits/s ± 20ppm Line Code: Coded Mark Inversion (CMI) Relevant Specification: ITU-T G.703, ANSI T1.102, Telcordia GR-253-CORE With the coaxial output port driving a 75Ω load, the output pulses conform to the templates in ITU-T G.703 and G.783. These specifications are tested during production test. PARAMETER Peak-to-peak Output Voltage Rise/ Fall Time CONDITION Template, steady state 10-90% Negative Transitions Transition Timing Tolerance Positive Transitions at Interval Boundaries Positive Transitions at midinterval Return Loss 7MHz to 240MHz -0.1 -0.5 -0.35 15 MIN 0.9 NOM MAX 1.1 2 0.1 0.5 0.35 dB Ns UNIT V ns
TRANSMITTER OUTPUT JITTER The transmit jitter specification ensures compliance with ITU-T G.813, G.823, G.825, G.958 and Telcordia GR-253-CORE for STS-3/STM-1. Transmit output jitter is not tested during production test.
Jitter Detector Transmitter Output
20dB/decade
Measured Jitter Amplitude
f1
f2
PARAMETER Transmitter Output Jitter
CONDITION 200 Hz to 3.5 MHz, measured with respect to CKREF for 60s
MIN
NOM 0.055
MAX 0.075
UNIT UIpp
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RECEIVER SPECIFICATIONS FOR CMI (COAX) INTERFACE The input signal is assumed compliant with ITU-T G.703 and can be attenuated by the dispersive loss of a cable. The minimum cable loss is 0dB and the maximum is –12.7dB at 78MHz.
PARAMETER
Flat-loss Tolerance Latency DLL Lock Time Return Loss
CONDITION
0 to 12.7dB cable (loss) attenuation
MIN
-2
TYP
5 1
MAX
4 10 10
UNIT
dB UI µs dB
7MHz to 240MHz
15
RECEIVER JITTER TOLERANCE The STM1E-SFPxx exceeds all relevant jitter tolerance specifications shown in Figure 10. Receive jitter tolerance is not tested during production test.
100
155Mbps Electrical (CMI) Interfaces G.825 - STM-1e Tolerance (for 2048 kbps networks) G.825 - STM-1e Tolerance (for 1544 kbps networks)
10
Jitter Tolerance ( UIpp )
1
0.1
0.01 1.E+00
10Hz
100Hz
1kHz
10kHz
100kHz
1MHz
10MHz
Jitter Frequency
Figure 10: Jitter Tolerance - electrical (CMI) interfaces PARAMETER CONDITION 10Hz to 19.3Hz 19.3Hz to 500Hz STM-1e Jitter Tolerance 500Hz to 6.5kHz 6.5kHz to 65kHz 65kHz to 1.3MHz 0.15 1.5 9800 f-1 0.30 MIN 38.9 750 f-1 NOM MAX UNIT UIpp µs UIpp µs UIpp
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RECEIVER JITTER TRANSFER FUNCTION The receiver clock recovery loop filter characteristics such that the receiver has the following transfer function. The corner frequency of the DLL is approximately 120 kHz. Receiver jitter transfer function is not tested during production test.
0
-1
-2
-3
-4
-5
-6
-7
-8
-9
- 10 1.00E+03
1.00E+04
1.00E+05
1.00E+06
1.00E+07
Figure 11: Jitter Transfer
PARAMETER Receiver Jitter transfer function Jitter transfer function roll-off
CONDITION below 120 kHz
MIN
NOM
MAX 0.1
UNIT dB dB per decade
20
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Receiver Loss of Signal Condition PARAMETER
LOS threshold LOS timing
CONDITION
MIN
-35 10
TYP
-19 110
MAX
-15 255
UNIT
dB UI
Nominal value Maximum cable loss
3 dB
15dB
Loss of Signal must be cleared Tolerance range LOS can be detected or cleared
35dB
Loss of Signal must be declared
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ENVIRONMENTAL & REGULATORY COMPLIANCE
Description ESD threshold (at electrical pins) Test Method Human Body Model MIL-STD-883 IEC-61000-4-2 *ESD Immunity at faceplate
Contact Discharge
STM1E-SFPxx Result Class 2 (≥ 2000 Volts)
A/B
IEC-61000-4-2
Air Discharge
A B Pass > 6dB Margin
Surge Immunity, 1.0kV
ITU-T K.41 IEC-61000-4-5 FCC Part 15 Class B EN55022 CISPR 22 IEC-801-3 EN55082-1 IEC-61000-4-3 GR-1089 CSA C22.2 UL 60950-1
Radiated Emission
Radiated Immunity
A
Component Recognition
Pass / UL File# E143101
*Immunity performance for ESD Immunity at the faceplate may vary with system design.
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MECHANICAL DRAWINGS
The STM1E-SFPxx is assembled in a Nickel plated Zinc die cast housing. The coaxial connectors feature a Brass body with Gold over Nickel plating and an inner contact made of Beryllium Copper. The STM1E-SFPxx complies with RoHS directive 2002/95/EC (RoHS-6) and is UL94-V0 compliant.
0.098 [2.49]
1.362 [34.59]
1.127 [28.63]
0.516 [13.10]
0.540 [13.70]
2.150 [54.61] MAX. 2.630 +/- 0.008 [66.80+/-0.20]
0.527 [13.40]
0.363 [9.22]
0.334 [8.48]
1.655 [42.04]
0.104 [2.64]
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MECHANICAL DRAWINGS
0.410 MAX.
0.259 [6.58]
0.223 [5.66]
0.315 [8.00]
0.200 [5.08] 0.100 [2.54] 0.610 [15.49] MAX 0.660 [16.76] MAX
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EEPROM CONTENTS
The MOD-DEF interface of the STM1E-SFPxx provides access to serial ID information per MSA guidelines. The data is stored in a write-protected EEPROM at device address A0h. Contact Teridian for availability of custom EEPROM maps.
Address 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 Hex 03 04 FE 00 00 00 00 00 00 00 00 05 02 00 00 00 00 00 78 00 54 45 52 49 44 49 41 4E 20 20 20 20 20 20 20 20 00 00 C0 ASCII Address 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 Hex 39 53 54 4D 31 45 2D 53 46 50 30 Note 1 20 20 20 20 20 Note 2 20 20 00 00 00 Note 5 00 12 00 00 ASCII S T M 1 E S F P 0 Address 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 Hex ASCII Address 117 118 119 120 121 122 123 124 125 126 127 Hex 00 00 00 00 00 00 00 00 00 00 00 ASCII
Note 3
Note 4 20 20 20 20 00 00 00 Note 5 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
T E R I D I A N
Note 3
Notes:
1. Address 50 specified the unique model. 32h used for STM1E-SFP02 and 38h used for STM1E-SFP08. 2. Address 56-57 specifies the product revision code. 3. Address 68-83 specifies a unique serial number 4. Address 84-87 specifies the date code in format YYWW 5. Address 63 and 95 are check sums for bytes 0-62 and bytes 64-94 respectively.
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PRODUCT VERSIONS
Two versions of the STM1E-SFPxx are available to match the grounding implementation of the host system. Schematic design and materials are otherwise identical between the two versions.
STM1E-SFP08: Frame and supply grounds connected together
STM1E-SFP02: Frame (left) and supply (right) grounds isolated at transformer.
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ORDERING INFORMATION
PART DESCRIPTION STM-1e (ES1) SFP Transceiver; Grounds Isolated; Lead-free ORDER NUMBER LABEL MARKING
STM1E-SFP02
STM-1e (ES1) SFP Transceiver; Grounds Connected; Lead-free
STM1E-SFP08
REVISION HISTORY
v2-0 v2-1 v2-2 February 22, 2006: Final Datasheet Initial Release February 7, 2007 Added 6/6 RoHS compliant feature (lead-free) August 2008 Updated the product label with UL logo
This product is sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement and limitation of liability. Teridian Semiconductor Corporation (TSC) reserves the right to make changes in specifications at any time without notice. Accordingly, the reader is cautioned to verify that a data sheet is current before placing orders. TSC assumes no liability for applications assistance.
© 2008 Teridian Semiconductor Corp. 6440 Oak Canyon, Suite 100, Irvine, CA 92618 TEL (714) 508-8800, FAX (714) 508-8877, http://www.Teridian.com
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