D2TO035C43000JTE3

D2TO35 www.vishay.com Vishay Sfernice Surface Mount Power Resistor Thick Film Technology FEATURES • AEC-Q200 qualified • 35 W at 25 °C case temperature • Surface mounted resistor - TO-263 (D2PAK) style package • Wide resistance range from 0.01 Ω to 550 kΩ • Non inductive • Resistor isolated from metal tab • Solder reflow secure at 270 °C/10 s • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 LINKS TO ADDITIONAL RESOURCES 3D 3D 3D Models DIMENSIONS in millimeters Footprint recommendation for solderable contact area: 4.5 1.25 8.7 7.8 min. 1.25 10.5 11.00 1.6 1.50 8.8 8.1 4.02 6.50 8.00 15.4 10.1 5.15 0.2 7.6 2.49 4.00 5 2.8 2.2 1.6 2.40 0.3 0.26 5.08 2 4.5 Tolerance: ± 0.3 mm Notes • For the assembly on board, we recommend the lead (Pb)-free thermal profile as per J-STD-020C • Power dissipation is 3.5 W at an ambient temperature of 25 °C when mounted on a double sided copper board using FR4 HTG, 70 μm of copper, 39 mm x 30 mm x 1.6 mm, with thermal vias STANDARD ELECTRICAL SPECIFICATIONS MODEL SIZE RESISTANCE RANGE Ω D2TO35 TO-263 0.01 to 550K RATED POWER LIMITING ELEMENT TOLERANCE P25 °C VOLTAGE UL ±% W V 35 500 1, 2, 5, 10 TEMPERATURE COEFFICIENT ± ppm/°C CRITICAL RESISTANCE Ω 150, 250, 700, 1100 7.14K MECHANICAL SPECIFICATIONS TECHNICAL SPECIFICATIONS Mechanical Protection Power Rating and Thermal Resistance of the Component Temperature Coefficient Standard Dielectric Strength IEC 60115-1 Insulation Resistance Inductance Resistive Element Substrate Connections Weight Molded Thick film Alumina Tinned copper 2.2 g max. ENVIRONMENTAL SPECIFICATIONS Temperature Range -55 °C to +175 °C IEC 60695-11-5 Flammability Revision: 14-Oct-2021 Application time: ta = 10 s Burning duration: tb < 30 s 35 W at 25 °C (case temperature) RTH (j - c): 4.28 °C/W See Special Feature table ± 150 ppm/°C 2000 VRMS - 1 min - 10 mA max. (between terminals and board) ≥ 104 MΩ ≤ 0.1 μH DIMENSIONS Standard Package TO-263 style (D2PAK) Document Number: 51058 1 For technical questions, contact: sferfixedresistors@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 D2TO35 www.vishay.com Vishay Sfernice SPECIAL FEATURES Resistance Values ≥ 0.010 ≥ 0.045 Tolerances Requirement Temperature Coefficient (TCR) (-55 °C +150 °C) IEC 60115-1 ≥ 0.1 ≥ 0.5 ± 250 ppm/°C ± 150 ppm/°C ± 1 % at ± 10 % ± 1100 ppm/°C ± 700 ppm/°C PERFORMANCE TESTS CONDITIONS REQUIREMENTS IEC 60115-1 §4.13 1.7 Pr 5 s for R < 2 Ω 1.4 Pr 5 s for R ≥ 2 Ω US < 1.5 UL ± (0.25 % + 0.005 Ω) IEC 60115-1 1000 h, 90/30 Pr at +25 °C ± (1 % + 0.005 Ω) 0.5 % + 0.005 Ω AEC-Q200 rev. D conditions: MIL-STD-202 method 108 1000 h, +175 °C, unpowered ± (0.25 % + 0.005 Ω) Temperature Cycling Pre-conditioning 3 reflows according JESTD020D IEC 60068-2-14 test Na 1000 cycles, -55 °C, +175 °C Dwell time - 15 min ± (0.5 % + 0.005 Ω) Moisture Resistance AEC-Q200 rev. D conditions: MIL-STD-202 method 106 10 cycles, 24 h, unpowered ± (0.5 % + 0.005 Ω) Biased Humidity AEC-Q200 rev. D conditions: MIL-STD-202 method 103 1000 h, 85 °C, 85% RH ± (1 % + 0.005 Ω) 0.5 % + 0.005 Ω Operational Life AEC-Q200 rev. D conditions: Pre-conditioning 3 reflows according JESTD020D MIL-STD-202 method 108 2000 h, 90/30, powered, +125 °C ± (1 % + 0.005 Ω) 0.5 % + 0.005 Ω ESD Human Body Model AEC-Q200 rev. D conditions: AEC-Q200-002 25 kVAD ± (0.5 % + 0.005 Ω) Vibration AEC-Q200 rev. D conditions: MIL-STD-202 method 204 5 g’s for 20 min, 12 cycles test from 10 Hz to 2000 Hz ± (0.5 % + 0.005 Ω) 0.2 % + 0.005 Ω Mechanical Shock AEC-Q200 rev. D conditions: MIL-STD-202 method 213 100 g’s, 6 ms, 3.75 m/s 3 shocks/direction ± (0.5 % + 0.005 Ω) 0.2 % + 0.005 Ω Board Flex AEC-Q200 rev. D conditions: AEC-Q200-005 bending 2 mm, 60 s ± (0.25 % + 0.01 Ω) Terminal Strength AEC-Q200 rev. D conditions: AEC-Q200-006 1.8 kgf, 60 s ± (0.25 % + 0.01 Ω) Momentary Overload Load Life High Temperature Exposure ASSEMBLY SPECIFICATIONS For the assembly on board, we recommend the lead (Pb)-free thermal profile as per J-STD-020C TESTS Resistance to Soldering Heat Moisture Sensitivity Level (MSL) Revision: 14-Oct-2021 CONDITIONS REQUIREMENTS IEC 60115-1 IEC 60068-2-58 Solder bath method: 270 °C/10 s ± (0.5 % + 0.005 Ω) IPC/JEDEC® J-STD-020C 85 °C / 85 % RH / 168 h Level: 1 + pass requirements of TCR overload and dielectric strength after MSL Document Number: 51058 2 For technical questions, contact: sferfixedresistors@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 D2TO35 www.vishay.com Vishay Sfernice CHOICE OF THE BOARD The user must choose the board according to the working conditions of the component (power, room temperature). Maximum working temperature must not exceed 175 °C. The dissipated power is simply calculated by the following ratio: (1) ΔT P = ------------------------------------------------------------------------------------------R TH (j - c) + R TH (c - h) + R TH (h - a) P: expressed in W ΔT: difference between maximum working temperature and room temperature or fluid cooling temperature RTH (j - c): thermal resistance value measured between resistive layer and outer side of the resistor. It is the thermal resistance of the component: 4.28 °C/W. RTH (c - h): thermal resistance value measured between outer side of the resistor and upper side of the board. This is the thermal resistance of the solder layer. RTH (h - a): thermal resistance of the board. Example: RTH (c - h) + RTH (h - a) for D2TO35 power rating 3.5 W at ambient temperature +25 °C. Thermal resistance RTH (j - c): 4.28 °C/W Considering equation (1) we have: ΔT = 175 °C - 25 °C = 150 °C RTH (j - c) + RTH (c - h) + RTH (h - a) = ΔT/P = 150/3.5 = 42.8 °C/W RTH (c - h) + RTH (h - a) = 42.8 °C/W - 4.28 °C/W = 38.52 °C/W Single Pulse: These informations are for a single pulse on a cold resistor at 25 °C (not already used for a dissipation) and for pulses of 100 ms maximum duration. The formula used to calculate E is: 2 U- x t E = P x t = ------R with: E (J): pulse energy P (W): pulse power t (s): pulse duration U (V): pulse voltage R (Ω): resistor The energy calculated must be less: than that allowed by the graph. Revision: 14-Oct-2021 Document Number: 51058 3 For technical questions, contact: sferfixedresistors@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 D2TO35 www.vishay.com Vishay Sfernice POWER RATING The temperature of the case should be maintained within the limits specified. Axis Title 10000 120 1000 80 1st line 2nd line 2nd line Rated Power (%) 100 60 100 40 20 10 0 0 20 40 60 80 100 120 140 160 175180 Case Temperature (°C) OVERLOADS In any case the applied voltage must be lower than the maximum overload voltage of 750 V. The values indicated on the graph below are applicable to resistors in air or mounted onto a board. ENERGY CURVE Axis Title 10000 100 10 1st line 2nd line 2nd line Energy (J) 1000 1 0.1 100 0.01 0.001 0.0000001 10 0.000001 0.00001 0.0001 0.001 0.01 0.1 Overloard Duration (s) POWER CURVE Axis Title 10000 10 000 1000 1st line 2nd line 1st line Power (W) 100 000 100 1000 100 0.0000001 10 0.000001 0.00001 0.0001 0.001 0.01 0.1 Overload Duration (s) Revision: 14-Oct-2021 Document Number: 51058 4 For technical questions, contact: sferfixedresistors@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 D2TO35 www.vishay.com Vishay Sfernice IMPEDANCE CURVE 10 Ω to 1 kΩ from 100 kHz to 300 MHz Axis Title 10000 1.90 1.70 10 Ω 1.30 1000 1st line 2nd line 2nd line |Z|/R 1.50 25 Ω 50 Ω, 75 Ω, 100 Ω 1.10 1.00 0.90 250 Ω 100 470 Ω 0.70 0.50 1000 Ω 0.30 100 kHz 1 MHz 10 MHz 100 MHz 10 1000 MHz 300 MHz Frequency (Hz) MARKING PACKAGING Model, style, resistance value (in Ω), tolerance (in %), manufacturing date, Vishay Sfernice trademark • Reel • Tube • Tape dimensions (mm) for reel: 16 5.3 24 16.4 11 ORDERING INFORMATION D2TO 35 C 100 kΩ ±1% XXX e3 MODEL STYLE CONNECTIONS RESISTANCE VALUE TOLERANCE CUSTOM DESIGN LEAD (Pb)-FREE F=±1% G=±2% J=±5% K = ± 10 % Optional on request: shape, etc. SAP PART NUMBERING GUIDELINES D 2 T O 0 3 5 C R 2 0 0 0 K R E 3 GLOBAL MODEL SIZE LEADS OHMIC VALUE TOLERANCE PACKAGING LEAD (Pb)-FREE D2TO 035 C = surface-mount The first four digits are significant figures and the last digit specifies the number of zeros to follow. R designates decimal point. 48R70 = 48.7 Ω 48701 = 48 700 Ω 10002 = 100 000 Ω R0100 = 0.01 Ω R6800 = 0.68 Ω 27000 = 2700 Ω = 2.7 kΩ F=1% G=2% J=5% K = 10 % R = reel 500 pieces T = tube 50 pieces E3 = pure tin Revision: 14-Oct-2021 Document Number: 51058 5 For technical questions, contact: sferfixedresistors@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. 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ALL RIGHTS RESERVED Revision: 09-Jul-2021 1 Document Number: 91000