DG2307DL-T1-GE3

DG2307 Vishay Siliconix High-Speed, Low rON, SPDT Analog Switch (2:1 Multiplexer) DESCRIPTION FEATURES The DG2307 is a single-pole-double-throw switch/2:1 mux designed for 2 to 5.5 V applications. Using Vishay Siliconix proprietary sub-micro CMOS process, the DG2307 achieves low on-resistance, low power consumption. It is 1.6 V TTL logic compatible across the operation voltage range. With its low rON and low parasitic capacitance character, it is ideal for clock signal and high speed data stream switching. It has low insertion lost and negligible propagation delay. The DG2307 can handle both analog and digital signals and permits signals to be transmitted in either direction. When Bn pin is at off status, the path will have a high impedance with respect to the output. Break before make is guaranteed. • • • • • • As a committed partner to the community and the environment, Vishay Siliconix manufactures this product with the lead (Pb)-free device terminations. For analog switching products manufactured with 100 % matte tin device terminations, the lead (Pb)-free "-E3" suffix is being used as a designator. Operates From Single 2 ~ 5.5 V SC70-6 Package 5 Ω Switch Connection Between Ports Minimal Propagation Delay TTL Compatible Input Level RoHS Compliant RoHS COMPLIANT APPLICATIONS • • • • • Cellular Phones PDAs GPS MP3 Data Acquisition FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION SC-70 TRUTH TABLE 6- Pin B1 1 6 S GND 2 5 V+ B0 3 4 A Logic Input (S) Function 0 B0 Connected to A 1 B1 Connected to A Top View Device Marking: G1 ORDERING INFORMATION Document Number: 73361 S-70852-Rev. B, 30-Apr-07 Temp Range Package Part Number - 40 to 85 °C SC70-6 DG2307DL-T1-E3 www.vishay.com 1 DG2307 Vishay Siliconix ABSOLUTE MAXIMUM RATINGS Parameter Limit Reference V+ to GND Unit - 0.3 to + 6 S, A, Ba V - 0.3 to (V+ + 0.3 V) Continuous Current (Any terminal) ± 50 Peak Current (Pulsed at 1 ms, 10 % duty cycle) ± 200 Storage Temperature (D Suffix) Power Dissipation (Packages)b 6-Pin SC70c mA - 65 to 150 °C 250 mW Notes: a. Signals on A, or B or S exceeding V+ will be clamped by internal diodes. Limit forward diode current to maximum current ratings. b. All leads welded or soldered to PC Board. c. Derate 3.1 mW/°C above 70 °C. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. SPECIFICATIONS Limits - 40 to 85 °C Test Conditions Otherwise Unless Specified Symbol V+ = 3.0 V, VS = 0.25 V to 0.7 V+e Tempa Minb High Level Input Voltage VSH V+ = 2.3 to 5.5 V Full 0.7 V+ Low Level Input Voltage VSL V+ = 2.3 to 5.5 V Full Parameter Typc Maxb Unit DC Characteristics 0.3 V+ VBN = 0 V, IA = - 30 mA Full 4 6 VBN = 2.3 V, IA = - 30 mA Full 9 12 VBN = 0 V, IA = - 24 mA Full 6 9 VBN = 1.5 V, IA = - 24 mA Full 13.5 20 V+ = 4.5 V, VBN = 0 V, IA = - 30 mA Room 0.32 V+ = 3.0 V, VBN = 0 V, IA = - 24 mA Room 0.31 IS V+ = 5.5 V, VA = 5.5 V Room Full - 0.1 - 1.0 0.1 - 1.0 Off Stage Switch Leakage IBN(off) V+ = 5.5 V, VA/VB = 0 V/5.5 V Room Full - 0.1 - 1.0 0.1 - 1.0 On State Switch Leakage IBN(on) V+ = 5.5 V, VA/VB = 0 V/5.5 V Room Full - 0.1 - 1.0 0.1 - 1.0 V+ Full 2 5.5 I+ V+ = 5.5 V, VA = VB = V+ or GND Room Full V+ = 4.5 V On Resistance RON V+ = 3.0 V On Resistance Matching Between Channels Input Leakage Current ΔRON V Ω µA Power Supply Power Supply Range Quiescent Supply Current www.vishay.com 2 1 10 µA Document Number: 73361 S-70852-Rev. B, 30-Apr-07 DG2307 Vishay Siliconix SPECIFICATIONS Limits - 40 to 85 °C Test Conditions Otherwise Unless Specified Parameter Symbol V+ = 3.0 V, VS = 0.25 V to 0.7 V+e Tempa Minb Typc Maxb Unit AC Electrical Characteristics Prop Delay Timef tPHL/tPLH Output Enable Timef tPZL/tPZH Output Disable Timef tPLZ/tPHZ Break-Before-Make Timed Charge Injectiond tBBM Q VA = 0 V VLOAD = 2 x V+ for tPZL VLOAD = 0 V for tPZH VLOAD = 2 x V+ for tPLZ VLOAD = 0 V for tPHZ V+ = 2.3 to 2.7 V Full 1.2 V+ = 3.0 to 3.6 V Full 0.8 V+ = 4.5 to 5.5 V Full 0.3 V+ = 2.3 to 2.7 V Room Full 5.9 6.2 V+ = 3.0 to 3.6 V Room Full 4.1 4.5 V+ = 4.5 to 5.5 V Room Full 2.6 2.9 V+ = 2.3 to 2.7 V Room Full 5.9 6.2 V+ = 3.0 to 3.6 V Room Full 4.1 4.5 V+ = 4.5 to 5.5 V Room Full 2.6 2.9 V+ = 2.3 to 2.7 V Full V+ = 3.0 to 3.65 V Full 0.5 V+ = 4.5 to 5.5 V Full 0.5 CL = 0.1 nF, VGEN = 0 V RGEN = 0 Ω ns 0.5 V+ = 5 V Room 7 V+ = 3.3 V Room 3 Room - 57.6 Room - 58.7 pC Analog Switch Characteristics Off Isolationd OIRR Crosstalkd XTALK - 3 db Bandwidthd V+ = 5 V, RL = 50 Ω, f = 10 MHz BW RL = 50 Ω Room 250 CIN V+ = 0 V Room 4.9 Room 6.5 Room 18.5 dB MHz Capacitance Control Pin Capacitanced B Port Off Capacitance d A Port Capacitance When Switch Enabled CIO-B CIO-A(on) V+ = 5 V pF Notes: a. Room = 25 °C, Full = as determined by the operating suffix. b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. c. Typical values are for design aid only, not guaranteed nor subject to production testing. d. Guarantee by design, nor subjected to production test. e. VIN = input voltage to perform proper function. f. Guaranteed by design and not production tested. The bus switch propagation delay is a function of the RC time constant contributed by the on-resistance and the specified load capacitance with an ideal voltage source (zero output impedance) driving the switch. Document Number: 73361 S-70852-Rev. B, 30-Apr-07 www.vishay.com 3 DG2307 Vishay Siliconix LOGIC DIAGRAM (POSITIVE LOGIC) 1 B 6 4 S A 3 B Figure 1. TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 40 V+ = 3.0 V, IB = - 24 mA 10 8 6 0 - 20 - 40 - 60 - 80 V+ = 4.5 V, IB = - 30 mA 4 2 0.0 0.5 1.0 1.5 2.0 VA - Analog Voltage (V) rDS(on) vs. VA vs. VSUPPLY www.vishay.com 4 LOSS 20 12 Loss, OIRR, XTALK (dB) rDS(on) - On Resistance (Ω) 14 OIRR - 100 2.5 - 120 10 K XTALK 100 K 1M 10 M 100 M 1G F - Frequency (Hz) Insertion Loss, Off-Isolation, Crosstalk vs. Frequency Document Number: 73361 S-70852-Rev. B, 30-Apr-07 DG2307 Vishay Siliconix AC LOADING AND WAVEFORMS VLD RL 500 Ω SW Open From Output Under Test GND RL 500 Ω CL 50 pF TEST SW tPLH/tPHL Open tPLZ/tPZL VLD tPHZ/tPZH GND Load Circuit Figure 2. AC Test Circuit tf = 2.5 ns tr = 2.5 ns 3.0 V 90 % Switch Input 90 % 1.5 V 90 % Logic Input 1.5 V 10 % 1.5 V 1.5 V tPLH 10 % tPZL GND tw 3.0 V 90 % 10 % 10 % GND tPLZ VLD 2 tPHL VOH Output tr = 2.5 ns tf = 2.5 ns 1.5 V 1.5 V Output VOL + 0.3 V Waveform 1 SW at V LD 1.5 V VOL tPZH tPHZ VOH VOL VOH - 0.3 V Output Waveform 2 SW at GND Propagation Delay Times 1.5 V 0V Enable and Disable Time - Low- and High-Level Enabling Figure 3. AC Waveforms Notes: a. CL includes probe and jig capacitance. b. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. c. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. d. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω. e. The outputs are measured one at a time with one transition per measurement. f. tPLZ and tPHZ are the same as tdis. g. tPZL and tPZH are the same as tdis. h. tPLH and tPHL are the same as tdis. i. VLD = 2 V+. Document Number: 73361 S-70852-Rev. B, 30-Apr-07 www.vishay.com 5 DG2307 Vishay Siliconix TEST CIRCUITS V+ Logic Input V+ VNO VNC COM NO VIN tr < 5 ns tf < 5 ns H VINL VO NC RL 50 Ω IN CL 35 pF GND VNC = VNO VO 90 % Switch 0V Output tD tD CL (includes fixture and stray capacitance) Figure 4. Break-Before-Make Interval V+ ΔVOUT V+ Rgen VOUT COM NC or NO VOUT + IN Vgen CL = 0.01 nF VIN = 0 - V+ IN On On Off GND Q = ΔVOUT x CL IN depends on switch configuration: input polarity determined by sense of switch. Figure 5. Charge Injection V+ V+ 10 nF 10 nF V+ NC or NO V+ IN COM 0 V, 2.4 V COM Meter COM IN 0 V, 2.4 V RL GND NC or NO GND Analyzer HP4192A Impedance Analyzer or Equivalent f = 1 MHz V COM Off Isolation = 20 log V NO/ NC Figure 6. Off-Isolation Figure 7. Channel Off/On Capacitance Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?73361. www.vishay.com 6 Document Number: 73361 S-70852-Rev. B, 30-Apr-07 Legal Disclaimer Notice Vishay Disclaimer All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 18-Jul-08 www.vishay.com 1