DG408, DG409
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Vishay Siliconix
8-Ch/Dual 4-Ch High-Performance CMOS Analog Multiplexers
DESCRIPTION
FEATURES
The DG408 is an 8 channel single-ended analog multiplexer
designed to connect one of eight inputs to a common output
as determined by a 3-bit binary address (A0, A1, A2). The
DG409 is a dual 4 channel differential analog multiplexer
designed to connect one of four differential inputs to a
common dual output as determined by its 2-bit binary
address (A0, A1). Break-before-make switching action
protects against momentary crosstalk between adjacent
channels.
•
•
•
•
•
•
•
•
An on channel conducts current equally well in both
directions. In the off state each channel blocks voltages up
to the power supply rails. An enable (EN) function allows the
user to reset the multiplexer/demultiplexer to all switches off
for stacking several devices. All control inputs, address (Ax)
and enable (EN) are TTL compatible over the full specified
operating temperature range.
Applications for the DG408, DG409 include high speed data
acquisition, audio signal switching and routing, ATE
systems, and avionics. High performance and low power
dissipation make them ideal for battery operated and
remote instrumentation applications.
Designed in the 44 V silicon-gate CMOS process, the
absolute maximum voltage rating is extended to 44 V.
Additionally, single supply operation is also allowed. An
epitaxial layer prevents latchup.
For additional information please see Technical Article
TA201.
Low on-resistance - RDS(on): 100
Low charge injection - Q: 20 pC
Available
Fast transition time - tTRANS: 160 ns
Available
Low power - ISUPPLY: 10 μA
Single supply capability
44 V supply max. rating
TTL compatible logic
Material categorization: For definitions of compliance
please see www.vishay.com/doc?99912
Note
* This datasheet provides information about parts that are
RoHS-compliant and/or parts that are non-RoHS-compliant. For
example, parts with lead (Pb) terminations are not RoHS-compliant.
Please see the information/tables in this datasheet for details.
BENEFITS
•
•
•
•
•
•
Reduced switching errors
Reduced glitching
Improved data throughput
Reduced power consumption
Increased ruggedness
Wide supply ranges
- Single supply: +5 V to 36 V
- Dual supplies: ± 5 V to ± 20 V
APPLICATIONS
•
•
•
•
•
•
Data acquisition systems
Audio signal routing
ATE systems
Battery powered systems
Single supply systems
Medical instrumentation
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
Dual-In-Line,
SOIC and TSSOP
DG408
A0
EN
VS1
S2
S3
S4
D
1
2
16
Decoders/Drivers
15
3
14
4
13
5
12
6
11
7
10
8
9
Top View
S13-2504-Rev. K, 16-Dec-13
Dual-In-Line,
SOIC and TSSOP
DG409
A1
A0
A2
EN
GND
V-
V+
S1a
S5
S2a
S6
S3a
S7
S4a
S8
Da
1
2
16
Decoders/Drivers
15
3
14
4
13
5
12
6
11
7
10
8
9
A1
GND
V+
S1b
S2b
S3b
S4b
Db
Top View
Document Number: 70062
1
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TRUTH TABLE (DG408)
TRUTH TABLE (DG409)
A2
A1
A0
EN
ON SWITCH
A1
A0
EN
ON SWITCH
X
X
X
0
None
X
X
0
None
0
0
0
1
1
0
0
1
1
0
0
1
1
2
0
1
1
2
0
1
0
1
3
1
0
1
3
0
1
1
1
4
1
1
1
4
1
0
0
1
5
1
0
1
1
6
1
1
0
1
7
1
1
1
1
8
Notes
• Logic “0” = VAL 0.8 V
• Logic “1” = VAH 2.4 V
• X = Do not care
ORDERING INFORMATION (Commercial)
PART
CONFIGURATION
TEMP. RANGE
PACKAGE
ORDERING PART NUMBER
DG408DJ
16-pin plastic DIP
DG408DJ-E3
DG408DY
DG408
8:1 x 1
-40 °C to 85 °C
DG408DY-E3
16-pin SOIC
DG408DY-T1
DG408DY-T1-E3
DG408DQ-E3
16-pin TSSOP
DG408DQ-T1-E3
DG409DJ
16-pin plastic DIP
DG409DJ-E3
DG409DY
DG409
4:1 x 2
-40 °C to 85 °C
DG409DY-E3
16-pin SOIC
DG409DY-T1
DG409DY-T1-E3
DG409DQ-E3
16-pin TSSOP
DG409DQ-T1-E3
Note
• -T1 indicates Tape and Reel, -E3 indicates Lead-Free and RoHS Compliant, NO -E3 indicates standard Tin/Lead finish.
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Voltages Referenced to V-
V+ to V- e
GND to V-
LIMIT
44
-25
Current (any terminal)
30
Peak Current, S or D (pulsed at 1 ms, 10 % duty cycle max.)
100
Power Dissipation (Package) b
V
(V-) - 2 to (V+) + 2
or 20 mA, whichever occurs first
Digital Inputsa, VS, VD
Storage Temperature
UNIT
(DJ, DY suffix)
-65 to 125
16-pin plastic DIP c
450
16-pin narrow SOIC and TSSOP d
600
mA
°C
mW
Notes
a. Signals on SX, DX or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings.
b. All leads soldered or welded to PC board.
c. Derate 6 mW/°C above 75 °C.
d. Derate 7.6 mW/°C above 75 °C.
e. Also applies when V- = GND.
S13-2504-Rev. K, 16-Dec-13
Document Number: 70062
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SPECIFICATIONS a
TEST CONDITIONS UNLESS
OTHERWISE SPECIFIED
D SUFFIX
-40 °C to 85 °C
V+ = 15 V, V- = -15 V
PARAMETER
SYMBOL
VAL = 0.8 V, VAH = 2.4 Vf
TEMP. b
TYP. c
MIN. d
MAX. d
UNIT
V
Analog Switch
Analog Signal Range e
Drain-Source
On-Resistance
RDS(on) Matching Between
Channels g
Source Off Leakage Current
VANALOG
DG409
Drain Off Leakage
Current
Drain On Leakage
Current
15
-
100
Full
-
-
125
-
-
15
RDS(on)
VD = ± 10 V
Room
IS(off)
VS = ± 10 V,
VD = ± 10 V, VEN = 0 V
Room
-
-0.5
0.5
Full
-
-5
5
Room
-
-1
1
Full
-
-20
20
Room
-
-1
1
Full
-
-10
10
Room
-
-1
1
Full
-
-20
20
Room
-
-1
1
Full
-
-10
10
ID(off)
VD = ± 10 V,
VS = ± 10 V,
VEN = 0 V
DG408
DG409
-15
VD = ± 10 V, IS = -10 mA
DG409
DG408
40
RDS(on)
DG408
DG408
Full
Room
ID(on)
VS = VD = ± 10 V
sequence each
switch on
DG409
nA
Digital Control
Logic High Input Voltage
VINH
Full
-
2.4
-
Logic Low Input Voltage
VINL
Full
-
-
0.8
Logic High Input Current
IAH
VA = 2.4 V, 15 V
Full
-
-10
10
Logic Low Input Current
IAL
VEN = 0 V, 2.4 V, VA = 0 V
Full
-
-10
10
Logic Input Capacitance
Cin
f = 1 MHz
Room
8
-
-
Transition Time
tTRANS
see figure 2
Full
160
-
250
Break-Before-Make Interval
tOPEN
see figure 4
Room
-
10
-
Room
115
-
150
see figure 3
Full
-
-
-
Room
105
-
150
Q
CL = 10 nF, VS = 0 V
Room
20
-
-
Off Isolation h
OIRR
VEN = 0 V, RL = 1 k,
f = 1 MHz
Room
-75
-
-
Source Off Capacitance
CS(off)
VEN = 0 V, VS = 0 V,
f = 1 MHz
Room
3
-
-
Room
26
-
-
Room
14
-
-
Room
37
-
-
Room
25
-
-
Full
10
-
75
Full
1
-75
-
Room
0.2
-
0.5
Full
-
-
2
Full
-
-500
-
V
μA
pF
Dynamic Characteristics
Enable Turn-On Time
tON(EN)
Enable Turn-Off Time
tOFF(EN)
Charge Injection
DG408
DG409
DG408
DG409
Drain Off
Capacitance
CD(off)
Drain On
Capacitance
CD(on)
VEN = 0 V,
VD = 0 V,
f = 1 MHz
ns
pC
pF
Power Supplies
Positive Supply Current
I+
Negative Supply Current
I-
Positive Supply Current
I+
Negative Supply Current
I-
S13-2504-Rev. K, 16-Dec-13
VEN = VA = 0 V or 5 V
VEN = VA = 0 V or 5 V
μA
mA
μA
Document Number: 70062
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SPECIFICATIONSa (Single Supply)
TEST CONDITIONS UNLESS
OTHERWISE SPECIFIED
D SUFFIX
-40 °C to 85 °C
V+ = 12 V, V- = 0 V
SYMBOL
VAL = 0.8 V, VAH = 2.4 Vf
TEMP. b
TYP. c
MIN. d
MAX. d
UNIT
RDS(on)
VD = 3 V, 10 V, IS = -1 mA
Room
90
-
-
Switching Time of
Multiplexer e
tTRANS
VS1 = 8 V, VS8 = 0 V, VIN = 2.4 V
Room
180
-
-
Enable Turn-On Time e
tON(EN)
VINH = 2.4 V, VINL = 0 V,
VS1 = 5 V
Room
180
-
-
Enable Turn-Off Time e
tOFF(EN)
Room
120
-
-
CL = 1 nF, VS = 0 V, RS = 0
Room
5
-
-
PARAMETER
Analog Switch
Drain-Source
On-Resistance e,f
Dynamic Characteristics
Charge Injection e
Q
ns
pC
Notes
a. Refer to PROCESS OPTION FLOWCHART.
b. Room = 25 °C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this datasheet.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
g. RDS(on) = RDS(on) max. - RDS(on) min.
h. Worst case isolation occurs on channel 4 due to proximity to the drain pin.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
S13-2504-Rev. K, 16-Dec-13
Document Number: 70062
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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
80
60
VS = 0 V for I D(off)
VS = V D for ID(on)
V+ = 15 V
V- = - 15 V
40
60
CD(on)
DG408 ID(off)
CD(off)
I D (pA)
C S, D (pF)
20
40
DG409 ID(off)
DG409 ID(on)
0
- 20
20
DG408 ID(on)
CS(off)
- 40
0
- 60
- 15
- 10
-5
0
5
10
15
0
2
VANALOG - Analog Voltage (V)
Source/Drain Capacitance vs. Analog Voltage
12
Drain Leakage Current vs. Source/Drain Voltage
(Single 12 V Supply)
100
20
V+ = 15 V
V- = - 15 V
VS = - VD for ID(off)
VD = V S(open) for ID(on)
60
20
15
- 20
- 60
V+ = 12 V
V- = 0 V
-5
DG408 ID(on), ID(off)
- 140
- 15
5
0
DG409 ID(on)
- 100
V+ = 15 V
V- = - 15 V
10
DG409 ID(off)
IS(off) (pA)
I D (pA)
4
6
8
10
VANALOG - Analog Voltage (V)
- 10
- 10
-5
0
5
10
VD or V S - Drain or Source Voltage (V)
- 15
15
- 10
-5
5
0
VS - Source Voltage (V)
10
15
Source Leakage Current vs. Source Voltage
Drain Leakage Current vs. Source/Drain Voltage
2.0
- 100 mA
VSUPPLY = ± 15 V
- 10 mA
1.5
VEN = 2.4 V
I-
V TH (V)
- 1 mA
1.0
- 100 µA
- 10 µA
VEN = 0 V or 5 V
0.5
- 1 µA
0.0
- 0.1 µA
4
8
12
16
20
+ VSUPPLY (V)
Input Switching Threshold vs. Supply Voltage
S13-2504-Rev. K, 16-Dec-13
100
1K
10K
100K
1M
10M
Switching Frequency (Hz)
Negative Supply Current vs. Switching Frequency
Document Number: 70062
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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
100 mA
100 µA
VSUPPLY = 15 V
10 µA
I+
10 mA
1 µA
100 nA
I+, I-
I+
VEN = 2.4 V
1 mA
10 nA
1 nA
100 µA
- (I-)
VEN = 0 V or 5 V
VSUPPLY = ± 15 V
VA = 0 V
VEN = 0 V
100 pA
10 µA
10 pA
100
1K
10K
100K
1M
10M
- 55 - 35
5
- 15
Switching Frequency (Hz)
45
25
85
65
105
125
Temperature (°C)
ISUPPLY vs. Temperature
Positive Supply Current vs. Switching Frequency
90
CL = 10 000 pF
VIN = 5 Vp-p
80
20
70
60
10
Q (pC)
I+ (µA)
15
V+ = 15 V
V- = - 15 V
VIN = 0 V
VEN = 0 V
50
V+ = 15 V
V- = - 15 V
40
30
20
5
10
V+ = 12 V
V- = 0 V
0
0
- 55
- 35 - 15
25
5
65
45
85
105
- 10
- 15
125
- 10
Temperature (°C)
0
-5
5
15
10
VS - Source Voltage (V)
Positive Supply Current vs. Temperature (DG408)
Charge Injection vs. Analog Voltage
160
120
140
V+ = 7.5 V
100
±5V
120
R DS(on) (Ω)
R DS(on) (Ω)
80
±8V
± 10 V
± 12 V
60
10 V
100
12 V
80
15 V
60
20 V
40
22 V
40
0
- 20
V- = 0 V
± 20 V
20
± 15 V
20
0
- 16 - 12
-8
-4
0
4
8
VD - Drain Voltage (V)
RDS(on) vs. VD and Supply
S13-2504-Rev. K, 16-Dec-13
12
16
20
0
4
8
12
16
20
22
VD - Drain Voltage (V)
RDS(on) vs. VD and Supply (Single Supply)
Document Number: 70062
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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
130
80
V+ = 15 V
V- = - 15 V
70
85 °C
60
125 °C
50
90
85 °C
40
RDS(on) ()
R DS(on) (Ω)
125 °C
110
25 °C
30
25 °C
70
0 °C
- 40 °C
50
20
0 °C
- 40 °C
- 55 °C
- 55 °C
30
10
0
V+ = 12 V
V- = 0 V
10
- 15
- 10
-5
5
0
10
0
15
2
RDS(on) vs. VD and Temperature
8
10
12
RDS(on) vs. VD and Temperature (Single Supply)
1
- 150
RL = 1 kΩ
V+ = 15 V
V- = - 15 V
RL = 1 kΩ
- 130
0
V+ = 15 V
V- = - 15 V
Ref. 1 VRMS
-1
LOSS (dB)
- 110
(dB)
6
4
VD - Drain Voltage (V)
VD - Drain Voltage (V)
- 90
Off-Isolation
- 70
-2
-3
-4
Crosstalk
- 50
RL = 50 Ω
-5
-6
- 30
100
1K
10K
100K
1M
10M
10
100M
10 0
1K
10K
100K
1M
10M
100M
f - Frequency (Hz)
f - Frequency (Hz)
Off Isolation and Crosstalk vs. Frequency
Insertion Loss vs. Frequency
140
275
250
120
225
t (ns)
t (ns)
tTRANS
100
tOFF(EN)
200
tTRANS
175
tOFF(EN)
tON(EN)
80
150
tON(EN)
125
60
± 10
± 12
± 14
± 16
± 18
± 20
VSUPPLY (V)
Switching Time vs. Bipolar Supply
S13-2504-Rev. K, 16-Dec-13
± 22
100
8
9
10
11
12
13
14
15
VSUPPLY (V)
Switching Time vs. Single Supply
Document Number: 70062
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SCHEMATIC DIAGRAM (Typical Channel)
V+
VREF
GND
D
A0
V+
Level
Shift
AX
V-
Decode/
Drive
S1
V+
EN
Sn
V-
Fig. 1
TEST CIRCUITS
+ 15 V
V+
A2
S1
A1
± 10 V
S2 - S7
A0
DG408
S8
EN
± 10 V
VO
D
GND
V-
50 %
0V
35 pF
300 Ω
50 Ω
Logic
Input
tr < 20 ns
tf < 20 ns
3V
- 15 V
VS1
90 %
Switch
Output
+ 15 V
VO
0V
V+
A1
A0
± 10 V
S1
90 %
VS8
S1a - S4a, Da
DG409
S4b
S1 ON
GND
S8 ON
VO
Db
EN
tTRANS
tTRANS
± 10 V
V300 Ω
50 Ω
35 pF
- 15 V
Fig. 2 - Transition Time
S13-2504-Rev. K, 16-Dec-13
Document Number: 70062
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TEST CIRCUITS
+ 15 V
V+
S1
-5V
EN
S2 - S8
A0
DG408
A1
A2
GND
VO
D
V-
50 Ω
Logic
Input
50 %
0V
35 pF
1 kΩ
tr < 20 ns
tf < 20 ns
3V
tON(EN)
- 15 V
tOFF(EN)
0V
+ 15 V
10 %
Switch
Output
VO
V+
S1b
90 %
-5V
VO
EN
S1a - S4a, Da
S2b - S4b
A0
DG409
A1
Db
GND
VO
V-
50 Ω
35 pF
1 kΩ
- 15 V
Fig. 3 - Enable Switching Time
+ 15 V
V+
EN
+ 2.4 V
Logic
Input
All S and Da
+5V
tr < 20 ns
tf < 20 ns
3V
50 %
0V
A0
DG408
DG409
A1
A2
GND
50 Ω
Db, D
VO
VS
V-
- 15 V
300 Ω
80 %
Switch
Output
35 pF
VO
0V
tOPEN
Fig. 4 - Break-Before-Make Interval
S13-2504-Rev. K, 16-Dec-13
Document Number: 70062
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TEST CIRCUITS
+ 15 V
Rg
V+
SX
Logic
Input
EN
OFF
ON
OFF
0V
A0
Channel
Select
3V
VO
D
A1
CL
10 nF
A2
GND
V-
ΔVO
Switch
Output
ΔVO is the measured voltage due to charge transfer
error Q, when the channel turns off.
Q = CL x ΔVO
- 15 V
Fig. 5 - Charge Injection
+ 15 V
+ 15 V
VIN
V+
SX
VS
Rg = 50 Ω
VIN
SX
VS
S8
A0
D
V+
S1
S8
VO
A1
A0
A2
EN
GND
RL
1 kΩ
V-
Rg = 50 Ω
VO
D
A1
A2
EN
GND
RL
1 kΩ
V-
- 15 V
VOUT
Off Isolation = 20 log
- 15 V
VIN
Crosstalk = 20 log
VOUT
VIN
Fig. 7 - Crosstalk
Fig. 6 - Off Isolation
VS
S1
+ 15 V
+ 15 V
V+
V+
Rg = 50 Ω
S1
Meter
A2
A0
D
VO
A1
Channel
Select
S8
A1
A0
A2
GND
EN
V-
RL
1 kΩ
- 15 V
Insertion Loss = 20 log
D
GND
VOUT
EN
V-
HP4192A
Impedance
Analyzer
or Equivalent
f = 1 MHz
- 15 V
VIN
Fig. 8 - Insertion Loss
S13-2504-Rev. K, 16-Dec-13
Fig. 9 - Source Drain Capacitance
Document Number: 70062
10
For technical questions, contact: analogswitchtechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG408, DG409
www.vishay.com
Vishay Siliconix
APPLICATION HINTS
Overvoltage Protection
A very convenient form of overvoltage protection consists of
adding two small signal diodes (1N4148, 1N914 type) in
series with the supply pins (see figure 10). This arrangement
effectively blocks the flow of reverse currents. It also floats
the supply pin above or below the normal V+ or V- value. In
this case the overvoltage signal actually becomes the power
supply of the IC. From the point of view of the chip, nothing
has changed, as long as the difference VS - (V-) does not
exceed + 44 V. The addition of these diodes will reduce the
analog signal range to 1 V below V+ and 1 V above V-, but it
preserves the low channel resistance and low leakage
characteristics.
V+
1N4148
SX
D
Vg
DG408
1N4148
V-
Fig. 10 - Overvoltage Protection Using Blocking Diodes
Differential 4-Channel Sequential Multiplexer/Demultiplexer
8-Channel Sequential Multiplexer/Demultiplexer
+ 15 V
V+
S1
GND
V+
S1a
V-
S3
S4
DG408
D
NC
DM7493
QB
QC
S2b
QA
r01
r02 GND
NC
Db
S3b
A1
A2
S4b
A0
EN
QD
AIN
Differential
Analog
Outputs
(Inputs)
S1b
+ 15 V
BIN
Da
DG409
S7
Clock
In
V-
S4a
S6
+ 15 V
GND
S3a
Differential
Analog
Inputs
(Outputs)
S5
S8
A0
- 15 V
S2a
Analog
Output
(Input)
S2
Analog
Inputs
(Outputs)
+ 15 V
- 15 V
Clock
In
J
Q
1/2 MM74C73
CLK
K
CLEAR
+ 15 V
Q
GND
A1
EN
J
Q
1/2 MM74C73
CLK
NC
Q
K
NC
CLEAR
6
Enable In
Reset Enable
(MUX On-Off Control)
Fig. 11
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?70062.
S13-2504-Rev. K, 16-Dec-13
Document Number: 70062
11
For technical questions, contact: analogswitchtechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
Vishay Siliconix
SOIC (NARROW):
16ĆLEAD
JEDEC Part Number: MS-012
MILLIMETERS
16
15
14
13
12
11
10
Dim
A
A1
B
C
D
E
e
H
L
Ĭ
9
E
1
2
3
4
5
6
7
8
INCHES
Min
Max
Min
Max
1.35
1.75
0.053
0.069
0.10
0.20
0.004
0.008
0.38
0.51
0.015
0.020
0.18
0.23
0.007
0.009
9.80
10.00
0.385
0.393
3.80
4.00
0.149
0.157
1.27 BSC
0.050 BSC
5.80
6.20
0.228
0.244
0.50
0.93
0.020
0.037
0_
8_
0_
8_
ECN: S-03946—Rev. F, 09-Jul-01
DWG: 5300
H
D
C
All Leads
e
Document Number: 71194
02-Jul-01
B
A1
L
Ĭ
0.101 mm
0.004 IN
www.vishay.com
1
Package Information
Vishay Siliconix
PDIP: 16ĆLEAD
16
15
14
13
12
11
10
9
E
E1
1
2
3
4
5
6
7
8
D
S
Q1
A
A1
L
15°
MAX
C
B1
e1
Dim
A
A1
B
B1
C
D
E
E1
e1
eA
L
Q1
S
B
eA
MILLIMETERS
Min
Max
INCHES
Min
Max
3.81
5.08
0.150
0.200
0.38
1.27
0.015
0.050
0.38
0.51
0.015
0.020
0.89
1.65
0.035
0.065
0.20
0.30
0.008
0.012
18.93
21.33
0.745
0.840
7.62
8.26
0.300
0.325
5.59
7.11
0.220
0.280
2.29
2.79
0.090
0.110
7.37
7.87
0.290
0.310
2.79
3.81
0.110
0.150
1.27
2.03
0.050
0.080
0.38
1.52
.015
0.060
ECN: S-03946—Rev. D, 09-Jul-01
DWG: 5482
Document Number: 71261
06-Jul-01
www.vishay.com
1
Package Information
Vishay Siliconix
TSSOP: 16-LEAD
DIMENSIONS IN MILLIMETERS
Symbols
Min
Nom
Max
A
-
1.10
1.20
A1
0.05
0.10
0.15
A2
-
1.00
1.05
0.38
B
0.22
0.28
C
-
0.127
-
D
4.90
5.00
5.10
E
6.10
6.40
6.70
E1
4.30
4.40
4.50
e
-
0.65
-
L
0.50
0.60
0.70
L1
0.90
1.00
1.10
y
-
-
0.10
θ1
0°
3°
6°
ECN: S-61920-Rev. D, 23-Oct-06
DWG: 5624
Document Number: 74417
23-Oct-06
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1
PAD Pattern
www.vishay.com
Vishay Siliconix
RECOMMENDED MINIMUM PAD FOR TSSOP-16
0.193
(4.90)
0.171
0.014
0.026
0.012
(0.35)
(0.65)
(0.30)
(4.35)
(7.15)
0.281
0.055
(1.40)
Recommended Minimum Pads
Dimensions in inches (mm)
Revision: 02-Sep-11
1
Document Number: 63550
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Application Note 826
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR SO-16
RECOMMENDED MINIMUM PADS FOR SO-16
0.372
(9.449)
0.152
0.022
0.050
0.028
(0.559)
(1.270)
(0.711)
(3.861)
0.246
(6.248)
0.047
(1.194)
Recommended Minimum Pads
Dimensions in Inches/(mm)
Return to Index
APPLICATION NOTE
Return to Index
www.vishay.com
24
Document Number: 72608
Revision: 21-Jan-08
Legal Disclaimer Notice
www.vishay.com
Vishay
Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,
“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
disclosure relating to any product.
Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or
the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all
liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,
consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular
purpose, non-infringement and merchantability.
Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of
typical requirements that are often placed on Vishay products in generic applications. Such statements are not binding
statements about the suitability of products for a particular application. It is the customer’s responsibility to validate that a
particular product with the properties described in the product specification is suitable for use in a particular application.
Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over
time. All operating parameters, including typical parameters, must be validated for each customer application by the customer’s
technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase,
including but not limited to the warranty expressed therein.
Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining
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Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk.
Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for
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or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners.
© 2017 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED
Revision: 08-Feb-17
1
Document Number: 91000
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